WebSVN – Kolibri OS – Path Comparison – / – /drivers/video/ Rev 4315 and /drivers/video/ Rev 4314

Regard whitespace Rev 4315 → Rev 4314

/drivers/video/Intel-2D/picture.h
File deleted

/drivers/video/Intel-2D/pixlib-sna.c
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_yuv_rgb.g6b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_src_sample_argb.g4b.gen5
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_noca.g5b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_mask_projective.g4b.gen5
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/drivers/video/Intel-2D/render_program/exa_wm_src_projective.g6b
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/drivers/video/Intel-2D/render_program/exa_wm_ca.g4b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_src_sample_argb.g5b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_src_sample_planar.g4b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_write.g4b.gen5
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_mask_projective.g7b
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/drivers/video/Intel-2D/render_program/exa_wm_mask_sample_argb.g6b
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/drivers/video/Intel-2D/render_program/exa_wm_mask_sample_a.g4b.gen5
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/drivers/video/Intel-2D/render_program/exa_wm_src_sample_a.g5b
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/drivers/video/Intel-2D/render_program/exa_wm_write.g4b
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/drivers/video/Intel-2D/render_program/exa_wm_xy.g4b.gen5
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/drivers/video/Intel-2D/render_program/exa_wm_mask_sample_a.g6b
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/drivers/video/Intel-2D/render_program/exa_wm_src_affine.g4b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_mask_affine.g4b.gen5
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/drivers/video/Intel-2D/render_program/exa_wm_mask_affine.g5b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_yuv_rgb.g4b.gen5
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_noca.g4b.gen5
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_src_projective.g4b.gen5
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/drivers/video/Intel-2D/render_program/exa_wm_ca.g4b.gen5
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/drivers/video/Intel-2D/render_program/exa_wm_yuv_rgb.g7b
File deleted

/drivers/video/Intel-2D/render_program/exa_sf_mask.g4b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_noca.g6b
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/drivers/video/Intel-2D/render_program/exa_wm_src_projective.g7b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_ca.g5b
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/drivers/video/Intel-2D/render_program/exa_wm_src_sample_argb.g6b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_src_sample_a.g4b.gen5
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/drivers/video/Intel-2D/render_program/exa_wm_mask_projective.g4b
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/drivers/video/Intel-2D/render_program/exa_wm_src_sample_planar.g5b
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/drivers/video/Intel-2D/render_program/exa_wm_mask_sample_argb.g7b
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/drivers/video/Intel-2D/render_program/exa_wm_src_sample_a.g6b
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/drivers/video/Intel-2D/render_program/exa_wm_write.g5b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_src_affine.g4b.gen5
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_mask_sample_a.g7b
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/drivers/video/Intel-2D/render_program/exa_wm_ca_srcalpha.g4b
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/drivers/video/Intel-2D/render_program/exa_wm_src_affine.g5b
File deleted

/drivers/video/Intel-2D/render_program/exa_sf.g4b.gen5
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/drivers/video/Intel-2D/render_program/exa_wm_mask_affine.g6b
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/drivers/video/Intel-2D/render_program/exa_wm_yuv_rgb.g4b
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/drivers/video/Intel-2D/render_program/exa_wm_src_projective.g4b
File deleted

/drivers/video/Intel-2D/render_program/exa_sf_mask.g5b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_ca.g6b
File deleted

/drivers/video/Intel-2D/render_program/exa_wm_mask_projective.g5b
File deleted

 /drivers/video/Intel-2D/sna/intel.h
 ,0 → 1,152
+/** enumeration of 3d consumers so some can maintain invariant state. */
+enum last_3d {
+    LAST_3D_OTHER,
+    LAST_3D_VIDEO,
+    LAST_3D_RENDER,
+    LAST_3D_ROTATION
+};
+typedef struct intel_screen_private {
+    int cpp;
+#define RENDER_BATCH                I915_EXEC_RENDER
+#define BLT_BATCH                   I915_EXEC_BLT
+    unsigned int current_batch;
+    dri_bufmgr *bufmgr;
+    uint32_t batch_ptr[4096];
+    /** Byte offset in batch_ptr for the next dword to be emitted. */
+    unsigned int batch_used;
+    /** Position in batch_ptr at the start of the current BEGIN_BATCH */
+    unsigned int batch_emit_start;
+    /** Number of bytes to be emitted in the current BEGIN_BATCH. */
+    uint32_t batch_emitting;
+    dri_bo *batch_bo, *last_batch_bo[2];
+    /** Whether we're in a section of code that can't tolerate flushing */
+    Bool in_batch_atomic;
+    /** Ending batch_used that was verified by intel_start_batch_atomic() */
+    int batch_atomic_limit;
+    struct list batch_pixmaps;
+    drm_intel_bo *wa_scratch_bo;
+    unsigned int tiling;
+#define INTEL_TILING_FB     0x1
+#define INTEL_TILING_2D     0x2
+#define INTEL_TILING_3D     0x4
+#define INTEL_TILING_ALL   (~0)
+    Bool has_relaxed_fencing;
+    int Chipset;
+    unsigned int BR[20];
+    void (*vertex_flush) (struct intel_screen_private *intel);
+    void (*batch_flush) (struct intel_screen_private *intel);
+    void (*batch_commit_notify) (struct intel_screen_private *intel);
+    Bool need_sync;
+    int accel_pixmap_offset_alignment;
+    int accel_max_x;
+    int accel_max_y;
+    int max_bo_size;
+    int max_gtt_map_size;
+    int max_tiling_size;
+    struct {
+        drm_intel_bo *gen4_vs_bo;
+        drm_intel_bo *gen4_sf_bo;
+        drm_intel_bo *gen4_wm_packed_bo;
+        drm_intel_bo *gen4_wm_planar_bo;
+        drm_intel_bo *gen4_cc_bo;
+        drm_intel_bo *gen4_cc_vp_bo;
+        drm_intel_bo *gen4_sampler_bo;
+        drm_intel_bo *gen4_sip_kernel_bo;
+        drm_intel_bo *wm_prog_packed_bo;
+        drm_intel_bo *wm_prog_planar_bo;
+        drm_intel_bo *gen6_blend_bo;
+        drm_intel_bo *gen6_depth_stencil_bo;
+    } video;
+    /* Render accel state */
+    float scale_units[2][2];
+    /** Transform pointers for src/mask, or NULL if identity */
+    PictTransform *transform[2];
+    PixmapPtr render_source, render_mask, render_dest;
+    PicturePtr render_source_picture, render_mask_picture, render_dest_picture;
+    Bool needs_3d_invariant;
+    Bool needs_render_state_emit;
+    Bool needs_render_vertex_emit;
+    /* i830 render accel state */
+    uint32_t render_dest_format;
+    uint32_t cblend, ablend, s8_blendctl;
+    /* i915 render accel state */
+    PixmapPtr texture[2];
+    uint32_t mapstate[6];
+    uint32_t samplerstate[6];
+    struct {
+        int op;
+        uint32_t dst_format;
+    } i915_render_state;
+    struct {
+        int num_sf_outputs;
+        int drawrect;
+        uint32_t blend;
+        dri_bo *samplers;
+        dri_bo *kernel;
+    } gen6_render_state;
+    uint32_t prim_offset;
+    void (*prim_emit)(struct intel_screen_private *intel,
+              int srcX, int srcY,
+              int maskX, int maskY,
+              int dstX, int dstY,
+              int w, int h);
+    int floats_per_vertex;
+    int last_floats_per_vertex;
+    uint16_t vertex_offset;
+    uint16_t vertex_count;
+    uint16_t vertex_index;
+    uint16_t vertex_used;
+    uint32_t vertex_id;
+    float vertex_ptr[4*1024];
+    dri_bo *vertex_bo;
+    uint8_t surface_data[16*1024];
+    uint16_t surface_used;
+    uint16_t surface_table;
+    uint32_t surface_reloc;
+    dri_bo *surface_bo;
+    /* 965 render acceleration state */
+    struct gen4_render_state *gen4_render_state;
+    Bool use_pageflipping;
+    Bool use_triple_buffer;
+    Bool force_fallback;
+    Bool has_kernel_flush;
+    Bool needs_flush;
+    enum last_3d last_3d;
+    /**
+     * User option to print acceleration fallback info to the server log.
+     */
+    Bool fallback_debug;
+    unsigned debug_flush;
+    Bool has_prime_vmap_flush;
+} intel_screen_private;

 /drivers/video/Intel-2D/sna/kgem.c
 ,7 → 880,7
 static bool kgem_init_pinned_batches(struct kgem *kgem)
 {
-        int count[2] = { 2, 2 };
+        int count[2] = { 2, 1 };
         int size[2] = { 1, 2 };
         int n, i;

 /drivers/video/Intel-2D/sna/kgem.h
 ,7 → 398,7
         if (kgem->mode == mode)
                 return;
-    kgem->context_switch(kgem, mode);
+//   kgem->context_switch(kgem, mode);
         kgem->mode = mode;
 }
 ,7 → 407,7
         assert(kgem->mode == KGEM_NONE);
         assert(kgem->nbatch == 0);
         assert(!kgem->wedged);
-    kgem->context_switch(kgem, mode);
+//   kgem->context_switch(kgem, mode);
         kgem->mode = mode;
 }

 /drivers/video/Intel-2D/sna/pciaccess.h
 ,0 → 1,537
+/*
+ * (C) Copyright IBM Corporation 2006
+ * Copyright 2009 Red Hat, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
+ * IBM AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+/*
+ * Copyright (c) 2007 Paulo R. Zanoni, Tiago Vignatti
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+/**
+ * \file pciaccess.h
+ *
+ * \author Ian Romanick <idr@us.ibm.com>
+ */
+#ifndef PCIACCESS_H
+#define PCIACCESS_H
+#include <inttypes.h>
+#if __GNUC__ >= 3
+#define __deprecated __attribute__((deprecated))
+#else
+#define __deprecated
+#endif
+typedef uint64_t pciaddr_t;
+struct pci_device;
+struct pci_device_iterator;
+struct pci_id_match;
+struct pci_slot_match;
+#ifdef __cplusplus
+extern "C" {
+#endif
+int pci_device_has_kernel_driver(struct pci_device *dev);
+int pci_device_is_boot_vga(struct pci_device *dev);
+int pci_device_read_rom(struct pci_device *dev, void *buffer);
+int  __deprecated pci_device_map_region(struct pci_device *dev,
+    unsigned region, int write_enable);
+int __deprecated pci_device_unmap_region(struct pci_device *dev,
+    unsigned region);
+int pci_device_map_range(struct pci_device *dev, pciaddr_t base,
+    pciaddr_t size, unsigned map_flags, void **addr);
+int pci_device_unmap_range(struct pci_device *dev, void *memory,
+    pciaddr_t size);
+int __deprecated pci_device_map_memory_range(struct pci_device *dev,
+    pciaddr_t base, pciaddr_t size, int write_enable, void **addr);
+int __deprecated pci_device_unmap_memory_range(struct pci_device *dev,
+    void *memory, pciaddr_t size);
+int pci_device_probe(struct pci_device *dev);
+const struct pci_agp_info *pci_device_get_agp_info(struct pci_device *dev);
+const struct pci_bridge_info *pci_device_get_bridge_info(
+    struct pci_device *dev);
+const struct pci_pcmcia_bridge_info *pci_device_get_pcmcia_bridge_info(
+    struct pci_device *dev);
+int pci_device_get_bridge_buses(struct pci_device *dev, int *primary_bus,
+    int *secondary_bus, int *subordinate_bus);
+int pci_system_init(void);
+void pci_system_init_dev_mem(int fd);
+void pci_system_cleanup(void);
+struct pci_device_iterator *pci_slot_match_iterator_create(
+    const struct pci_slot_match *match);
+struct pci_device_iterator *pci_id_match_iterator_create(
+    const struct pci_id_match *match);
+void pci_iterator_destroy(struct pci_device_iterator *iter);
+struct pci_device *pci_device_next(struct pci_device_iterator *iter);
+struct pci_device *pci_device_find_by_slot(uint32_t domain, uint32_t bus,
+    uint32_t dev, uint32_t func);
+struct pci_device *pci_device_get_parent_bridge(struct pci_device *dev);
+void pci_get_strings(const struct pci_id_match *m,
+    const char **device_name, const char **vendor_name,
+    const char **subdevice_name, const char **subvendor_name);
+const char *pci_device_get_device_name(const struct pci_device *dev);
+const char *pci_device_get_subdevice_name(const struct pci_device *dev);
+const char *pci_device_get_vendor_name(const struct pci_device *dev);
+const char *pci_device_get_subvendor_name(const struct pci_device *dev);
+void pci_device_enable(struct pci_device *dev);
+int pci_device_cfg_read    (struct pci_device *dev, void *data,
+    pciaddr_t offset, pciaddr_t size, pciaddr_t *bytes_read);
+int pci_device_cfg_read_u8 (struct pci_device *dev, uint8_t  *data,
+    pciaddr_t offset);
+int pci_device_cfg_read_u16(struct pci_device *dev, uint16_t *data,
+    pciaddr_t offset);
+int pci_device_cfg_read_u32(struct pci_device *dev, uint32_t *data,
+    pciaddr_t offset);
+int pci_device_cfg_write    (struct pci_device *dev, const void *data,
+    pciaddr_t offset, pciaddr_t size, pciaddr_t *bytes_written);
+int pci_device_cfg_write_u8 (struct pci_device *dev, uint8_t  data,
+    pciaddr_t offset);
+int pci_device_cfg_write_u16(struct pci_device *dev, uint16_t data,
+    pciaddr_t offset);
+int pci_device_cfg_write_u32(struct pci_device *dev, uint32_t data,
+    pciaddr_t offset);
+int pci_device_cfg_write_bits(struct pci_device *dev, uint32_t mask,
+    uint32_t data, pciaddr_t offset);
+#ifdef __cplusplus
+}
+#endif
+/**
+ * \name Mapping flags passed to \c pci_device_map_range
+ */
+/*@{*/
+#define PCI_DEV_MAP_FLAG_WRITABLE       (1U<<0)
+#define PCI_DEV_MAP_FLAG_WRITE_COMBINE  (1U<<1)
+#define PCI_DEV_MAP_FLAG_CACHABLE       (1U<<2)
+/*@}*/
+#define PCI_MATCH_ANY  (~0)
+/**
+ * Compare two PCI ID values (either vendor or device).  This is used
+ * internally to compare the fields of \c pci_id_match to the fields of
+ * \c pci_device.
+ */
+#define PCI_ID_COMPARE(a, b) \
+    (((a) == PCI_MATCH_ANY) || ((a) == (b)))
+/**
+ */
+struct pci_id_match {
+    /**
+     * \name Device / vendor matching controls
+     *
+     * Control the search based on the device, vendor, subdevice, or subvendor
+     * IDs.  Setting any of these fields to \c PCI_MATCH_ANY will cause the
+     * field to not be used in the comparison.
+     */
+    /*@{*/
+    uint32_t    vendor_id;
+    uint32_t    device_id;
+    uint32_t    subvendor_id;
+    uint32_t    subdevice_id;
+    /*@}*/
+    /**
+     * \name Device class matching controls
+     *
+     */
+    /*@{*/
+    uint32_t    device_class;
+    uint32_t    device_class_mask;
+    /*@}*/
+    intptr_t    match_data;
+};
+/**
+ */
+struct pci_slot_match {
+    /**
+     * \name Device slot matching controls
+     *
+     * Control the search based on the domain, bus, slot, and function of
+     * the device.  Setting any of these fields to \c PCI_MATCH_ANY will cause
+     * the field to not be used in the comparison.
+     */
+    /*@{*/
+    uint32_t    domain;
+    uint32_t    bus;
+    uint32_t    dev;
+    uint32_t    func;
+    /*@}*/
+    intptr_t    match_data;
+};
+/**
+ * BAR descriptor for a PCI device.
+ */
+struct pci_mem_region {
+    /**
+     * When the region is mapped, this is the pointer to the memory.
+     *
+     * This field is \b only set when the deprecated \c pci_device_map_region
+     * interface is used.  Use \c pci_device_map_range instead.
+     *
+     * \deprecated
+     */
+    void *memory;
+    /**
+     * Base physical address of the region within its bus / domain.
+     *
+     * \warning
+     * This address is really only useful to other devices in the same
+     * domain.  It's probably \b not the address applications will ever
+     * use.
+     *
+     * \warning
+     * Most (all?) platform back-ends leave this field unset.
+     */
+    pciaddr_t bus_addr;
+    /**
+     * Base physical address of the region from the CPU's point of view.
+     *
+     * This address is typically passed to \c pci_device_map_range to create
+     * a mapping of the region to the CPU's virtual address space.
+     */
+    pciaddr_t base_addr;
+    /**
+     * Size, in bytes, of the region.
+     */
+    pciaddr_t size;
+    /**
+     * Is the region I/O ports or memory?
+     */
+    unsigned is_IO:1;
+    /**
+     * Is the memory region prefetchable?
+     *
+     * \note
+     * This can only be set if \c is_IO is not set.
+     */
+    unsigned is_prefetchable:1;
+    /**
+     * Is the memory at a 64-bit address?
+     *
+     * \note
+     * This can only be set if \c is_IO is not set.
+     */
+    unsigned is_64:1;
+};
+/**
+ * PCI device.
+ *
+ * Contains all of the information about a particular PCI device.
+ */
+struct pci_device {
+    /**
+     * \name Device bus identification.
+     *
+     * Complete bus identification, including domain, of the device.  On
+     * platforms that do not support PCI domains (e.g., 32-bit x86 hardware),
+     * the domain will always be zero.
+     */
+    /*@{*/
+    uint16_t    domain;
+    uint8_t     bus;
+    uint8_t     dev;
+    uint8_t     func;
+    /*@}*/
+    /**
+     * \name Vendor / device ID
+     *
+     * The vendor ID, device ID, and sub-IDs for the device.
+     */
+    /*@{*/
+    uint16_t    vendor_id;
+    uint16_t    device_id;
+    uint16_t    subvendor_id;
+    uint16_t    subdevice_id;
+    /*@}*/
+    /**
+     * Device's class, subclass, and programming interface packed into a
+     * single 32-bit value.  The class is at bits [23:16], subclass is at
+     * bits [15:8], and programming interface is at [7:0].
+     */
+    uint32_t    device_class;
+    /**
+     * Device revision number, as read from the configuration header.
+     */
+    uint8_t     revision;
+    /**
+     * BAR descriptors for the device.
+     */
+    struct pci_mem_region regions[6];
+    /**
+     * Size, in bytes, of the device's expansion ROM.
+     */
+    pciaddr_t   rom_size;
+    /**
+     * IRQ associated with the device.  If there is no IRQ, this value will
+     * be -1.
+     */
+    int irq;
+    /**
+     * Storage for user data.  Users of the library can store arbitrary
+     * data in this pointer.  The library will not use it for any purpose.
+     * It is the user's responsability to free this memory before destroying
+     * the \c pci_device structure.
+     */
+    intptr_t user_data;
+    /**
+      * Used by the VGA arbiter. Type of resource decoded by the device and
+      * the file descriptor (/dev/vga_arbiter). */
+    int vgaarb_rsrc;
+};
+/**
+ * Description of the AGP capability of the device.
+ *
+ * \sa pci_device_get_agp_info
+ */
+struct pci_agp_info {
+    /**
+     * Offset of the AGP registers in the devices configuration register
+     * space.  This is generally used so that the offset of the AGP command
+     * register can be determined.
+     */
+    unsigned    config_offset;
+    /**
+     * \name AGP major / minor version.
+     */
+    /*@{*/
+    uint8_t     major_version;
+    uint8_t     minor_version;
+    /*@}*/
+    /**
+     * Logical OR of the supported AGP rates.  For example, a value of 0x07
+     * means that the device can support 1x, 2x, and 4x.  A value of 0x0c
+     * means that the device can support 8x and 4x.
+     */
+    uint8_t    rates;
+    unsigned int    fast_writes:1;  /**< Are fast-writes supported? */
+    unsigned int    addr64:1;
+    unsigned int    htrans:1;
+    unsigned int    gart64:1;
+    unsigned int    coherent:1;
+    unsigned int    sideband:1;     /**< Is side-band addressing supported? */
+    unsigned int    isochronus:1;
+    uint8_t    async_req_size;
+    uint8_t    calibration_cycle_timing;
+    uint8_t    max_requests;
+};
+/**
+ * Description of a PCI-to-PCI bridge device.
+ *
+ * \sa pci_device_get_bridge_info
+ */
+struct pci_bridge_info {
+    uint8_t    primary_bus;
+    uint8_t    secondary_bus;
+    uint8_t    subordinate_bus;
+    uint8_t    secondary_latency_timer;
+    uint8_t     io_type;
+    uint8_t     mem_type;
+    uint8_t     prefetch_mem_type;
+    uint16_t    secondary_status;
+    uint16_t    bridge_control;
+    uint32_t    io_base;
+    uint32_t    io_limit;
+    uint32_t    mem_base;
+    uint32_t    mem_limit;
+    uint64_t    prefetch_mem_base;
+    uint64_t    prefetch_mem_limit;
+};
+/**
+ * Description of a PCI-to-PCMCIA bridge device.
+ *
+ * \sa pci_device_get_pcmcia_bridge_info
+ */
+struct pci_pcmcia_bridge_info {
+    uint8_t    primary_bus;
+    uint8_t    card_bus;
+    uint8_t    subordinate_bus;
+    uint8_t    cardbus_latency_timer;
+    uint16_t    secondary_status;
+    uint16_t    bridge_control;
+    struct {
+        uint32_t    base;
+        uint32_t    limit;
+    } io[2];
+    struct {
+        uint32_t    base;
+        uint32_t    limit;
+    } mem[2];
+};
+/**
+ * VGA Arbiter definitions, functions and related.
+ */
+/* Legacy VGA regions */
+#define VGA_ARB_RSRC_NONE       0x00
+#define VGA_ARB_RSRC_LEGACY_IO  0x01
+#define VGA_ARB_RSRC_LEGACY_MEM 0x02
+/* Non-legacy access */
+#define VGA_ARB_RSRC_NORMAL_IO  0x04
+#define VGA_ARB_RSRC_NORMAL_MEM 0x08
+int  pci_device_vgaarb_init         (void);
+void pci_device_vgaarb_fini         (void);
+int  pci_device_vgaarb_set_target   (struct pci_device *dev);
+/* use the targetted device */
+int  pci_device_vgaarb_decodes      (int new_vga_rsrc);
+int  pci_device_vgaarb_lock         (void);
+int  pci_device_vgaarb_trylock      (void);
+int  pci_device_vgaarb_unlock       (void);
+/* return the current device count + resource decodes for the device */
+int pci_device_vgaarb_get_info      (struct pci_device *dev, int *vga_count, int *rsrc_decodes);
+/*
+ * I/O space access.
+ */
+struct pci_io_handle;
+struct pci_io_handle *pci_device_open_io(struct pci_device *dev, pciaddr_t base,
+                                         pciaddr_t size);
+struct pci_io_handle *pci_legacy_open_io(struct pci_device *dev, pciaddr_t base,
+                                         pciaddr_t size);
+void pci_device_close_io(struct pci_device *dev, struct pci_io_handle *handle);
+uint32_t pci_io_read32(struct pci_io_handle *handle, uint32_t reg);
+uint16_t pci_io_read16(struct pci_io_handle *handle, uint32_t reg);
+uint8_t pci_io_read8(struct pci_io_handle *handle, uint32_t reg);
+void pci_io_write32(struct pci_io_handle *handle, uint32_t reg, uint32_t data);
+void pci_io_write16(struct pci_io_handle *handle, uint32_t reg, uint16_t data);
+void pci_io_write8(struct pci_io_handle *handle, uint32_t reg, uint8_t data);
+/*
+ * Legacy memory access
+ */
+int pci_device_map_legacy(struct pci_device *dev, pciaddr_t base,
+                          pciaddr_t size, unsigned map_flags, void **addr);
+int pci_device_unmap_legacy(struct pci_device *dev, void *addr, pciaddr_t size);
+#endif /* PCIACCESS_H */

 /drivers/video/Intel-2D/sna/sna.c
 ,14 → 39,14
 #include <memory.h>
 #include <malloc.h>
+#include <kos32sys.h>
+#include <pixlib2.h>
 #include "i915_pciids.h"
 #include "compiler.h"
 #include "sna.h"
+#include "intel_driver.h"
-#include <pixlib2.h>
-#include <kos32sys.h>
 #define to_surface(x) (surface_t*)((x)->handle)
 static struct sna_fb sna_fb;
 ,6 → 92,8
 void kgem_close_batches(struct kgem *kgem);
 void sna_bo_destroy(struct kgem *kgem, struct kgem_bo *bo);
+const struct intel_device_info *
+intel_detect_chipset(struct pci_device *pci);
 static bool sna_solid_cache_init(struct sna *sna);
 ,8 → 936,28
         return (const struct intel_device_info*)ent->match_data;
     else
         return &intel_generic_info;
+#if 0
+        for (i = 0; intel_chipsets[i].name != NULL; i++) {
+                if (DEVICE_ID(pci) == intel_chipsets[i].token) {
+                        name = intel_chipsets[i].name;
+                        break;
 }
+        }
+        if (name == NULL) {
+                xf86DrvMsg(scrn->scrnIndex, X_WARNING, "unknown chipset\n");
+                name = "unknown";
+        } else {
+                xf86DrvMsg(scrn->scrnIndex, from,
+                           "Integrated Graphics Chipset: Intel(R) %s\n",
+                           name);
+        }
+        scrn->chipset = name;
+#endif
+}
 int intel_get_device_id(int fd)
 {
         struct drm_i915_getparam gp;

 /drivers/video/Intel-2D/sna/sna.h
 ,12 → 37,12
 #ifndef _SNA_H_
 #define _SNA_H_
+#include <stdint.h>
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
-#include <stdint.h>
 #include "compiler.h"
 ,8 → 51,8
 #include <errno.h>
 #include <kos32sys.h>
+#include "intel_driver.h"
 #include "pciaccess.h"
-#include "intel_driver.h"
 #include <drm.h>
 #include <i915_drm.h>
 ,7 → 382,6
 struct sna_fb
 {
-    uint32_t  name;
     uint32_t  width;
     uint32_t  height;
     uint32_t  pitch;

 /drivers/video/Intel-2D/intel_driver.h
 ,7 → 116,9
         int gen;
 };
-const struct intel_device_info *intel_detect_chipset(struct pci_device *pci);
+//void intel_detect_chipset(ScrnInfoPtr scrn,
+//             EntityInfoPtr ent,
+//             struct pci_device *pci);
 #endif /* INTEL_DRIVER_H */

 /drivers/video/Intel-2D/pixlib2.c
 ,0 → 1,282
+// -kr -i4 -ts4 -bls -bl -bli0
+#include <stdio.h>
+#include <malloc.h>
+#include <stdbool.h>
+#include <pixlib2.h>
+#include <kos32sys.h>
+#define DISPLAY_VERSION         0x0200  /*      2.00     */
+#define SRV_GETVERSION              0
+#define SRV_GET_CAPS                3
+#define BUFFER_SIZE(n) ((n)*sizeof(uint32_t))
+#define __ALIGN_MASK(x,mask)  (((x)+(mask))&~(mask))
+#define ALIGN(x,a)            __ALIGN_MASK(x,(typeof(x))(a)-1)
+#define to_surface(x) (surface_t*)((x)->handle)
+typedef struct
+{
+        uint32_t width;
+        uint32_t height;
+        void *data;
+        uint32_t pitch;
+        uint32_t bo;
+        uint32_t bo_size;
+        uint32_t flags;
+} surface_t;
+int sna_init(uint32_t service);
+void sna_fini();
+int sna_create_bitmap(bitmap_t * bitmap);
+int sna_destroy_bitmap(bitmap_t * bitmap);
+int sna_lock_bitmap(bitmap_t * bitmap);
+int sna_resize_bitmap(bitmap_t *bitmap);
+//int sna_blit_copy(bitmap_t * src_bitmap, int dst_x, int dst_y,
+//                                int w, int h, int src_x, int src_y);
+int sna_blit_tex(bitmap_t * src_bitmap, bool scale, int dst_x, int dst_y,
+                                 int w, int h, int src_x, int src_y);
+static uint32_t service;
+static uint32_t hw_caps;
+uint32_t init_pixlib(uint32_t caps)
+{
+        uint32_t api_version;
+        ioctl_t io;
+        if (service != 0)
+                return caps & hw_caps;
+        service = get_service("DISPLAY");
+        if (service == 0)
+                goto fail;
+        io.handle = service;
+        io.io_code = SRV_GETVERSION;
+        io.input = NULL;
+        io.inp_size = 0;
+        io.output = &api_version;
+        io.out_size = BUFFER_SIZE(1);
+        if (call_service(&io) != 0)
+                goto fail;
+        if ((DISPLAY_VERSION > (api_version & 0xFFFF)) ||
+                (DISPLAY_VERSION < (api_version >> 16)))
+                goto fail;
+        hw_caps = sna_init(service);
+        if (hw_caps)
+                printf("2D caps %s%s%s\n",
+                           (hw_caps & HW_BIT_BLIT) != 0 ? "HW_BIT_BLIT " : "",
+                           (hw_caps & HW_TEX_BLIT) != 0 ? "HW_TEX_BLIT " : "",
+                           (hw_caps & HW_VID_BLIT) != 0 ? "HW_VID_BLIT " : "");
+        return caps & hw_caps;
+  fail:
+        service = 0;
+        return 0;
+};
+void done_pixlib()
+{
+        if (hw_caps != 0)
+                sna_fini();
+};
+int create_bitmap(bitmap_t * bitmap)
+{
+        uint32_t size, bo_size;
+        uint32_t pitch, max_pitch;
+        void *buffer;
+        surface_t *sf;
+        bitmap->handle = -1;
+        bitmap->data = (void *) -1;
+        bitmap->pitch = -1;
+        if (bitmap->flags &= hw_caps)
+                return sna_create_bitmap(bitmap);
+        pitch = ALIGN(bitmap->width * 4, 16);
+        max_pitch = ALIGN(bitmap->max_width * 4, 16);
+        size = ALIGN(pitch * bitmap->height, 4096);
+        bo_size = ALIGN(max_pitch * bitmap->max_height, 4096);
+        if (bo_size < size)
+                bo_size = size;
+        sf = malloc(sizeof(*sf));
+        if (sf == NULL)
+                return -1;
+        buffer = user_alloc(bo_size);
+        if (buffer == NULL)
+        {
+                free(sf);
+                return -1;
+        };
+        sf->width = bitmap->width;
+        sf->height = bitmap->height;
+        sf->data = buffer;
+        sf->pitch = pitch;
+        sf->bo = 0;
+        sf->bo_size = bo_size;
+        sf->flags = bitmap->flags;
+        bitmap->handle = (uint32_t) sf;
+//    printf("create bitmap %p handle %p data %p  w %d h%d\n",
+//            bitmap, bitmap->handle, bitmap->data, bitmap->width, bitmap->height);
+        return 0;
+};
+int destroy_bitmap(bitmap_t * bitmap)
+{
+        surface_t *sf = to_surface(bitmap);
+        if (sf->flags & hw_caps)
+                return sna_destroy_bitmap(bitmap);
+        user_free(sf->data);
+        free(sf);
+        bitmap->handle = -1;
+        bitmap->data = (void *) -1;
+        bitmap->pitch = -1;
+        return 0;
+};
+int lock_bitmap(bitmap_t * bitmap)
+{
+        surface_t *sf = to_surface(bitmap);
+        if (bitmap->data != (void *) -1)
+                return 0;
+        if (sf->flags & hw_caps)
+                return sna_lock_bitmap(bitmap);
+        bitmap->data = sf->data;
+        bitmap->pitch = sf->pitch;
+        return 0;
+};
+int blit_bitmap(bitmap_t * bitmap, int dst_x, int dst_y,
+                int w, int h, int src_x, int src_y)
+{
+        struct blit_call bc;
+        int ret;
+        surface_t *sf = to_surface(bitmap);
+        if (sf->flags & hw_caps & HW_BIT_BLIT)
+                return sna_blit_tex(bitmap, false, dst_x, dst_y, w, h, src_x, src_y);
+        bc.dstx     = dst_x;
+        bc.dsty     = dst_y;
+        bc.w        = w;
+        bc.h        = h;
+        bc.srcx     = 0;
+        bc.srcy     = 0;
+        bc.srcw     = w;
+        bc.srch     = h;
+        bc.stride   = sf->pitch;
+        bc.bitmap   = sf->data;
+        __asm__ __volatile__(
+    "int $0x40":"=a"(ret):"a"(73), "b"(0x00),
+        "c"(&bc):"memory");
+        bitmap->data = (void *) -1;
+        bitmap->pitch = -1;
+        return ret;
+};
+int fplay_blit_bitmap(bitmap_t * bitmap, int dst_x, int dst_y, int w, int h)
+{
+        struct blit_call bc;
+        int ret;
+        surface_t *sf = to_surface(bitmap);
+        if (sf->flags & hw_caps & HW_TEX_BLIT)
+                return sna_blit_tex(bitmap, true, dst_x, dst_y, w, h, 0, 0);
+        bc.dstx = dst_x;
+        bc.dsty = dst_y;
+        bc.w = w;
+        bc.h = h;
+        bc.srcx = 0;
+        bc.srcy = 0;
+        bc.srcw = w;
+        bc.srch = h;
+        bc.stride = sf->pitch;
+        bc.bitmap = sf->data;
+        __asm__ __volatile__(
+    "int $0x40":"=a"(ret):"a"(73), "b"(0x00),
+        "c"(&bc):"memory");
+        bitmap->data = (void *) -1;
+        bitmap->pitch = -1;
+        return ret;
+};
+int resize_bitmap(bitmap_t * bitmap)
+{
+        uint32_t size;
+        uint32_t pitch;
+//    printf("%s\n", __FUNCTION__);
+        surface_t *sf = to_surface(bitmap);
+        if (sf->flags & hw_caps)
+        {
+                return sna_resize_bitmap(bitmap);
+        };
+        pitch = ALIGN(bitmap->width * 4, 16);
+        size = ALIGN(pitch * bitmap->height, 4096);
+        bitmap->pitch = -1;
+        bitmap->data = (void *) -1;
+        if (size > sf->bo_size)
+        {
+                sf->data = user_realloc(sf->data, size);        /* grow buffer */
+                if (sf->data == NULL)
+                        return -1;
+                sf->bo_size = size;
+        } else if (size < sf->bo_size)
+                user_unmap(sf->data, size, sf->bo_size - size); /* unmap unused pages */
+        sf->width  = bitmap->width;
+        sf->height = bitmap->height;
+        sf->pitch  = pitch;
+        return 0;
+};

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Regard whitespace Rev 4315 → Rev 4314