| /drivers/devman/scan.cc |
|---|
| File deleted |
| /drivers/devman/pci_bind.c |
|---|
| File deleted |
| /drivers/devman/pci_root.c |
|---|
| File deleted |
| /drivers/devman/Makefile |
|---|
| 1,5 → 1,4 |
| CC = gcc |
| FASM = e:/fasm/fasm.exe |
| 28,10 → 27,7 |
| NAME_SRCS= acpi.c \ |
| scan.c \ |
| pci_irq.c \ |
| pci_root.c \ |
| pci/pci.c \ |
| pci/probe.c \ |
| pci_bind.c |
| pci/pci.c |
| all: $(NAME).dll |
| /drivers/devman/acpi.c |
|---|
| 110,13 → 110,30 |
| }; |
| /* |
| int acpi_pci_bind_root(struct acpi_device *device) |
| { |
| device->ops.bind = acpi_pci_bind; |
| device->ops.unbind = acpi_pci_unbind; |
| return 0; |
| } |
| */ |
| static bool pci_use_crs = false; |
| #define IORESOURCE_BUS 0x00001000 |
| struct acpi_pci_root { |
| struct list_head node; |
| struct acpi_device * device; |
| struct acpi_pci_id id; |
| struct pci_bus *bus; |
| u16 segment; |
| struct resource secondary; /* downstream bus range */ |
| }; |
| static LIST_HEAD(acpi_pci_roots); |
| #define ACPI_PCI_ROOT_CLASS "pci_bridge" |
| 162,23 → 179,6 |
| } |
| static void acpi_pci_bridge_scan(struct acpi_device *device) |
| { |
| int status; |
| struct acpi_device *child = NULL; |
| if (device->flags.bus_address) |
| if (device->parent && device->parent->ops.bind) { |
| status = device->parent->ops.bind(device); |
| if (!status) { |
| list_for_each_entry(child, &device->children, node) |
| acpi_pci_bridge_scan(child); |
| } |
| } |
| } |
| struct pci_root_info |
| { |
| struct acpi_device *bridge; |
| 416,7 → 416,7 |
| bus = pci_create_bus(busnum, &pci_root_ops, sd); |
| if (bus) { |
| get_current_resources(device, busnum, domain, bus); |
| bus->subordinate = pci_scan_child_bus(bus); |
| // bus->subordinate = pci_scan_child_bus(bus); |
| } |
| } |
| 528,9 → 528,9 |
| * ----------------------- |
| * Thus binding the ACPI and PCI devices. |
| */ |
| result = acpi_pci_bind_root(device); |
| if (result) |
| goto end; |
| // result = acpi_pci_bind_root(device); |
| // if (result) |
| // goto end; |
| /* |
| * PCI Routing Table |
| 544,8 → 544,8 |
| /* |
| * Scan and bind all _ADR-Based Devices |
| */ |
| list_for_each_entry(child, &device->children, node) |
| acpi_pci_bridge_scan(child); |
| // list_for_each_entry(child, &device->children, node) |
| // acpi_pci_bridge_scan(child); |
| return 0; |
| 762,7 → 762,72 |
| }; |
| #if 0 |
| scan_devices(); |
| { |
| bool retval = false; |
| u32_t bus, last_bus; |
| if( (last_bus = PciApi(1))==-1) |
| return retval; |
| dbgprintf("last bus %x\n", last_bus); |
| for(bus=0; bus <= last_bus; bus++) |
| { |
| u32_t dev; |
| for(dev = 0; dev < 32; dev++) |
| { |
| u32_t fn; |
| for(fn = 0; fn < 8; fn++) |
| { |
| u32_t id; |
| u32_t irq_bios, irq_acpi; |
| u32_t irq_pin; |
| u16_t pcicmd; |
| u32_t tmp; |
| u32_t devfn = (dev<<3 )|fn; |
| id = PciRead32(bus,devfn, PCI_VENDOR_ID); |
| /* some broken boards return 0 or ~0 if a slot is empty: */ |
| if (id == 0xffffffff || id == 0x00000000 || |
| id == 0x0000ffff || id == 0xffff0000) |
| continue; |
| pcicmd = PciRead16(bus,devfn, PCI_COMMAND); |
| if (! pcicmd & PCI_COMMAND_IO) |
| continue; |
| tmp = PciRead32(bus,devfn, 0x3C); |
| irq_bios = tmp & 0xFF; |
| irq_pin = (tmp >> 8) & 0xFF; |
| int slot = (fn >> 3) & 0x1f; |
| irq_acpi = irqtable[ dev * PCI_MAX_PINS +(irq_pin-1) ]; |
| if( irq_acpi < 0) |
| dbgprintf("PCI: no ACPI IRQ routing for " |
| "device %d.%d.%d INT%c\n",bus,dev,fn,'A'+irq_pin-1); |
| dbgprintf("pci device %x_%x bus %d dev %d fn %d," |
| "IRQ PIN %d BIOS IRQ %d ACPI IRQ %d\n", |
| id & 0xFFFF, id>>16, bus, dev, fn, irq_pin, irq_bios, irq_acpi); |
| }; |
| } |
| }; |
| }; |
| #endif |
| #if 0 |
| ACPI_STATUS |
| get_device_by_hid_callback(ACPI_HANDLE obj, u32_t depth, void* context, |
| void** retval) |
| /drivers/devman/acpi_bus.h |
|---|
| 1,38 → 1,5 |
| struct acpi_device; |
| /* |
| * ACPI Driver |
| * ----------- |
| */ |
| typedef int (*acpi_op_add) (struct acpi_device * device); |
| typedef int (*acpi_op_remove) (struct acpi_device * device, int type); |
| typedef int (*acpi_op_start) (struct acpi_device * device); |
| //typedef int (*acpi_op_suspend) (struct acpi_device * device, |
| // pm_message_t state); |
| typedef int (*acpi_op_resume) (struct acpi_device * device); |
| typedef int (*acpi_op_bind) (struct acpi_device * device); |
| typedef int (*acpi_op_unbind) (struct acpi_device * device); |
| typedef void (*acpi_op_notify) (struct acpi_device * device, u32 event); |
| struct acpi_bus_ops { |
| u32 acpi_op_add:1; |
| u32 acpi_op_start:1; |
| }; |
| struct acpi_device_ops { |
| acpi_op_add add; |
| acpi_op_remove remove; |
| acpi_op_start start; |
| // acpi_op_suspend suspend; |
| acpi_op_resume resume; |
| acpi_op_bind bind; |
| acpi_op_unbind unbind; |
| acpi_op_notify notify; |
| }; |
| struct resource_list { |
| struct resource_list *next; |
| struct resource *res; |
| 69,7 → 36,13 |
| #define ACPI_SMBUS_IBM_HID "SMBUSIBM" |
| struct acpi_bus_ops |
| { |
| u32_t acpi_op_add:1; |
| u32_t acpi_op_start:1; |
| }; |
| #define ACPI_ID_LEN 16 /* only 9 bytes needed here, 16 bytes are used */ |
| /* to workaround crosscompile issues */ |
| 133,7 → 106,7 |
| // struct acpi_device_wakeup wakeup; |
| // struct acpi_device_perf performance; |
| // struct acpi_device_dir dir; |
| struct acpi_device_ops ops; |
| // struct acpi_device_ops ops; |
| // struct acpi_driver *driver; |
| void *driver_data; |
| // struct device dev; |
| 142,17 → 115,7 |
| }; |
| struct acpi_pci_root { |
| struct list_head node; |
| struct acpi_device * device; |
| struct acpi_pci_id id; |
| struct pci_bus *bus; |
| u16 segment; |
| struct resource secondary; /* downstream bus range */ |
| }; |
| #define acpi_device_bid(d) ((d)->pnp.bus_id) |
| #define acpi_device_adr(d) ((d)->pnp.bus_address) |
| char *acpi_device_hid(struct acpi_device *device); |
| 163,7 → 126,3 |
| const struct acpi_device_ids *ids); |
| int acpi_pci_irq_add_prt(ACPI_HANDLE handle, struct pci_bus *bus); |
| int acpi_pci_bind_root(struct acpi_device *device); |
| struct pci_dev *acpi_get_pci_dev(ACPI_HANDLE handle); |
| int acpi_is_root_bridge(ACPI_HANDLE handle); |
| /drivers/devman/pci/probe.c |
|---|
| File deleted |
| /drivers/devman/pci/pci.c |
|---|
| 8,7 → 8,6 |
| LIST_HEAD(pci_root_buses); |
| #define IO_SPACE_LIMIT 0xffff |
| #define PCIBIOS_SUCCESSFUL 0x00 |
| struct resource ioport_resource = { |
| .name = "PCI IO", |
| 24,90 → 23,13 |
| .flags = IORESOURCE_MEM, |
| }; |
| #define PCI_FIND_CAP_TTL 48 |
| static int __pci_find_next_cap_ttl(struct pci_bus *bus, unsigned int devfn, |
| u8 pos, int cap, int *ttl) |
| static inline int pci_domain_nr(struct pci_bus *bus) |
| { |
| u8 id; |
| while ((*ttl)--) { |
| pci_bus_read_config_byte(bus, devfn, pos, &pos); |
| if (pos < 0x40) |
| break; |
| pos &= ~3; |
| pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_ID, |
| &id); |
| if (id == 0xff) |
| break; |
| if (id == cap) |
| return pos; |
| pos += PCI_CAP_LIST_NEXT; |
| struct pci_sysdata *sd = bus->sysdata; |
| return sd->domain; |
| } |
| return 0; |
| } |
| static int __pci_find_next_cap(struct pci_bus *bus, unsigned int devfn, |
| u8 pos, int cap) |
| { |
| int ttl = PCI_FIND_CAP_TTL; |
| return __pci_find_next_cap_ttl(bus, devfn, pos, cap, &ttl); |
| } |
| static int __pci_bus_find_cap_start(struct pci_bus *bus, |
| unsigned int devfn, u8 hdr_type) |
| { |
| u16 status; |
| pci_bus_read_config_word(bus, devfn, PCI_STATUS, &status); |
| if (!(status & PCI_STATUS_CAP_LIST)) |
| return 0; |
| switch (hdr_type) { |
| case PCI_HEADER_TYPE_NORMAL: |
| case PCI_HEADER_TYPE_BRIDGE: |
| return PCI_CAPABILITY_LIST; |
| case PCI_HEADER_TYPE_CARDBUS: |
| return PCI_CB_CAPABILITY_LIST; |
| default: |
| return 0; |
| } |
| return 0; |
| } |
| /** |
| * pci_find_capability - query for devices' capabilities |
| * @dev: PCI device to query |
| * @cap: capability code |
| * |
| * Tell if a device supports a given PCI capability. |
| * Returns the address of the requested capability structure within the |
| * device's PCI configuration space or 0 in case the device does not |
| * support it. Possible values for @cap: |
| * |
| * %PCI_CAP_ID_PM Power Management |
| * %PCI_CAP_ID_AGP Accelerated Graphics Port |
| * %PCI_CAP_ID_VPD Vital Product Data |
| * %PCI_CAP_ID_SLOTID Slot Identification |
| * %PCI_CAP_ID_MSI Message Signalled Interrupts |
| * %PCI_CAP_ID_CHSWP CompactPCI HotSwap |
| * %PCI_CAP_ID_PCIX PCI-X |
| * %PCI_CAP_ID_EXP PCI Express |
| */ |
| int pci_find_capability(struct pci_dev *dev, int cap) |
| { |
| int pos; |
| pos = __pci_bus_find_cap_start(dev->bus, dev->devfn, dev->hdr_type); |
| if (pos) |
| pos = __pci_find_next_cap(dev->bus, dev->devfn, pos, cap); |
| return pos; |
| } |
| static struct pci_bus * pci_alloc_bus(void) |
| { |
| struct pci_bus *b; |
| 227,92 → 149,3 |
| } |
| /** |
| * pci_get_slot - locate PCI device for a given PCI slot |
| * @bus: PCI bus on which desired PCI device resides |
| * @devfn: encodes number of PCI slot in which the desired PCI |
| * device resides and the logical device number within that slot |
| * in case of multi-function devices. |
| * |
| * Given a PCI bus and slot/function number, the desired PCI device |
| * is located in the list of PCI devices. |
| * If the device is found, its reference count is increased and this |
| * function returns a pointer to its data structure. The caller must |
| * decrement the reference count by calling pci_dev_put(). |
| * If no device is found, %NULL is returned. |
| */ |
| struct pci_dev * pci_get_slot(struct pci_bus *bus, unsigned int devfn) |
| { |
| struct list_head *tmp; |
| struct pci_dev *dev; |
| // WARN_ON(in_interrupt()); |
| // down_read(&pci_bus_sem); |
| list_for_each(tmp, &bus->devices) { |
| dev = pci_dev_b(tmp); |
| if (dev->devfn == devfn) |
| goto out; |
| } |
| dev = NULL; |
| out: |
| // pci_dev_get(dev); |
| // up_read(&pci_bus_sem); |
| return dev; |
| } |
| /** |
| * pci_find_ext_capability - Find an extended capability |
| * @dev: PCI device to query |
| * @cap: capability code |
| * |
| * Returns the address of the requested extended capability structure |
| * within the device's PCI configuration space or 0 if the device does |
| * not support it. Possible values for @cap: |
| * |
| * %PCI_EXT_CAP_ID_ERR Advanced Error Reporting |
| * %PCI_EXT_CAP_ID_VC Virtual Channel |
| * %PCI_EXT_CAP_ID_DSN Device Serial Number |
| * %PCI_EXT_CAP_ID_PWR Power Budgeting |
| */ |
| int pci_find_ext_capability(struct pci_dev *dev, int cap) |
| { |
| u32 header; |
| int ttl; |
| int pos = PCI_CFG_SPACE_SIZE; |
| /* minimum 8 bytes per capability */ |
| ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8; |
| if (dev->cfg_size <= PCI_CFG_SPACE_SIZE) |
| return 0; |
| if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL) |
| return 0; |
| /* |
| * If we have no capabilities, this is indicated by cap ID, |
| * cap version and next pointer all being 0. |
| */ |
| if (header == 0) |
| return 0; |
| while (ttl-- > 0) { |
| if (PCI_EXT_CAP_ID(header) == cap) |
| return pos; |
| pos = PCI_EXT_CAP_NEXT(header); |
| if (pos < PCI_CFG_SPACE_SIZE) |
| break; |
| if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL) |
| break; |
| } |
| return 0; |
| } |
| /drivers/devman/scan.c |
|---|
| 626,10 → 626,10 |
| /* |
| * Bind _ADR-Based Devices when hot add |
| */ |
| if (device->flags.bus_address) { |
| if (device->parent && device->parent->ops.bind) |
| device->parent->ops.bind(device); |
| } |
| // if (device->flags.bus_address) { |
| // if (device->parent && device->parent->ops.bind) |
| // device->parent->ops.bind(device); |
| // } |
| end: |
| if (!result) { |