/drivers/include/drm/drm_fixed.h |
---|
File deleted |
/drivers/include/drm/drm.h |
---|
450,8 → 450,6 |
enum drm_vblank_seq_type { |
_DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ |
_DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ |
/* bits 1-6 are reserved for high crtcs */ |
_DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e, |
_DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */ |
_DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ |
_DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ |
458,7 → 456,6 |
_DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ |
_DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */ |
}; |
#define _DRM_VBLANK_HIGH_CRTC_SHIFT 1 |
#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE) |
#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \ |
598,12 → 595,6 |
__u64 size; |
}; |
/** DRM_IOCTL_GET_CAP ioctl argument type */ |
struct drm_get_cap { |
__u64 capability; |
__u64 value; |
}; |
#include "drm_mode.h" |
/* |
625,7 → 616,6 |
#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close) |
#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) |
#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) |
#define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap) |
#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) |
#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) |
661,8 → 651,6 |
#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock) |
#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock) |
#define DRM_IOCTL_GEM_PRIME_OPEN DRM_IOWR(0x2e, struct drm_gem_open) |
#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) |
#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) |
#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode) |
697,7 → 685,6 |
#define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd) |
#define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int) |
#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip) |
#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd) |
*/ |
/** |
740,9 → 727,6 |
__u32 reserved; |
}; |
#define DRM_CAP_DUMB_BUFFER 0x1 |
#define DRM_CAP_VBLANK_HIGH_CRTC 0x2 |
/* typedef area */ |
#ifndef __KERNEL__ |
typedef struct drm_clip_rect drm_clip_rect_t; |
/drivers/include/drm/drmP.h |
---|
9,7 → 9,6 |
/* |
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. |
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. |
* Copyright (c) 2009-2010, Code Aurora Forum. |
* All rights reserved. |
* |
* Permission is hereby granted, free of charge, to any person obtaining a |
94,12 → 93,6 |
#define KHZ2PICOS(a) (1000000000UL/(a)) |
/* get_scanout_position() return flags */ |
#define DRM_SCANOUTPOS_VALID (1 << 0) |
#define DRM_SCANOUTPOS_INVBL (1 << 1) |
#define DRM_SCANOUTPOS_ACCURATE (1 << 2) |
extern void drm_ut_debug_printk(unsigned int request_level, |
const char *prefix, |
const char *function_name, |
210,7 → 203,6 |
#define DRIVER_IRQ_VBL2 0x800 |
#define DRIVER_GEM 0x1000 |
#define DRIVER_MODESET 0x2000 |
#define DRIVER_USE_PLATFORM_DEVICE 0x4000 |
/***********************************************************************/ |
/** \name Begin the DRM... */ |
370,7 → 362,6 |
unsigned int cmd; |
int flags; |
drm_ioctl_t *func; |
unsigned int cmd_drv; |
}; |
/** |
377,10 → 368,9 |
* Creates a driver or general drm_ioctl_desc array entry for the given |
* ioctl, for use by drm_ioctl(). |
*/ |
#define DRM_IOCTL_DEF(ioctl, _func, _flags) \ |
[DRM_IOCTL_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags} |
#define DRM_IOCTL_DEF_DRV(ioctl, _func, _flags) \ |
[DRM_IOCTL_NR(DRM_##ioctl)] = {.cmd = DRM_##ioctl, .func = _func, .flags = _flags, .cmd_drv = DRM_IOCTL_##ioctl} |
struct drm_magic_entry { |
struct list_head head; |
struct drm_hash_item hash_item; |
472,8 → 462,6 |
struct drm_event *event; |
struct list_head link; |
struct drm_file *file_priv; |
pid_t pid; /* pid of requester, no guarantee it's valid by the time |
we deliver the event, for tracing only */ |
void (*destroy)(struct drm_pending_event *event); |
}; |
677,7 → 665,7 |
struct kref refcount; |
/** Handle count of this object. Each handle also holds a reference */ |
atomic_t handle_count; /* number of handles on this object */ |
struct kref handlecount; |
/** Related drm device */ |
struct drm_device *dev; |
748,34 → 736,6 |
void *driver_priv; /**< Private structure for driver to use */ |
}; |
/* Size of ringbuffer for vblank timestamps. Just double-buffer |
* in initial implementation. |
*/ |
#define DRM_VBLANKTIME_RBSIZE 2 |
/* Flags and return codes for get_vblank_timestamp() driver function. */ |
#define DRM_CALLED_FROM_VBLIRQ 1 |
#define DRM_VBLANKTIME_SCANOUTPOS_METHOD (1 << 0) |
#define DRM_VBLANKTIME_INVBL (1 << 1) |
/* get_scanout_position() return flags */ |
#define DRM_SCANOUTPOS_VALID (1 << 0) |
#define DRM_SCANOUTPOS_INVBL (1 << 1) |
#define DRM_SCANOUTPOS_ACCURATE (1 << 2) |
struct drm_bus { |
int bus_type; |
int (*get_irq)(struct drm_device *dev); |
const char *(*get_name)(struct drm_device *dev); |
int (*set_busid)(struct drm_device *dev, struct drm_master *master); |
int (*set_unique)(struct drm_device *dev, struct drm_master *master, |
struct drm_unique *unique); |
int (*irq_by_busid)(struct drm_device *dev, struct drm_irq_busid *p); |
/* hooks that are for PCI */ |
int (*agp_init)(struct drm_device *dev); |
}; |
/** |
* DRM driver structure. This structure represent the common code for |
* a family of cards. There will one drm_device for each card present |
792,8 → 752,13 |
int (*suspend) (struct drm_device *, pm_message_t state); |
int (*resume) (struct drm_device *); |
int (*dma_ioctl) (struct drm_device *dev, void *data, struct drm_file *file_priv); |
void (*dma_ready) (struct drm_device *); |
int (*dma_quiescent) (struct drm_device *); |
int (*context_ctor) (struct drm_device *dev, int context); |
int (*context_dtor) (struct drm_device *dev, int context); |
int (*kernel_context_switch) (struct drm_device *dev, int old, |
int new); |
void (*kernel_context_switch_unlock) (struct drm_device *dev); |
/** |
* get_vblank_counter - get raw hardware vblank counter |
853,68 → 818,6 |
*/ |
int (*device_is_agp) (struct drm_device *dev); |
/** |
* Called by vblank timestamping code. |
* |
* Return the current display scanout position from a crtc. |
* |
* \param dev DRM device. |
* \param crtc Id of the crtc to query. |
* \param *vpos Target location for current vertical scanout position. |
* \param *hpos Target location for current horizontal scanout position. |
* |
* Returns vpos as a positive number while in active scanout area. |
* Returns vpos as a negative number inside vblank, counting the number |
* of scanlines to go until end of vblank, e.g., -1 means "one scanline |
* until start of active scanout / end of vblank." |
* |
* \return Flags, or'ed together as follows: |
* |
* DRM_SCANOUTPOS_VALID = Query successful. |
* DRM_SCANOUTPOS_INVBL = Inside vblank. |
* DRM_SCANOUTPOS_ACCURATE = Returned position is accurate. A lack of |
* this flag means that returned position may be offset by a constant |
* but unknown small number of scanlines wrt. real scanout position. |
* |
*/ |
int (*get_scanout_position) (struct drm_device *dev, int crtc, |
int *vpos, int *hpos); |
/** |
* Called by \c drm_get_last_vbltimestamp. Should return a precise |
* timestamp when the most recent VBLANK interval ended or will end. |
* |
* Specifically, the timestamp in @vblank_time should correspond as |
* closely as possible to the time when the first video scanline of |
* the video frame after the end of VBLANK will start scanning out, |
* the time immmediately after end of the VBLANK interval. If the |
* @crtc is currently inside VBLANK, this will be a time in the future. |
* If the @crtc is currently scanning out a frame, this will be the |
* past start time of the current scanout. This is meant to adhere |
* to the OpenML OML_sync_control extension specification. |
* |
* \param dev dev DRM device handle. |
* \param crtc crtc for which timestamp should be returned. |
* \param *max_error Maximum allowable timestamp error in nanoseconds. |
* Implementation should strive to provide timestamp |
* with an error of at most *max_error nanoseconds. |
* Returns true upper bound on error for timestamp. |
* \param *vblank_time Target location for returned vblank timestamp. |
* \param flags 0 = Defaults, no special treatment needed. |
* \param DRM_CALLED_FROM_VBLIRQ = Function is called from vblank |
* irq handler. Some drivers need to apply some workarounds |
* for gpu-specific vblank irq quirks if flag is set. |
* |
* \returns |
* Zero if timestamping isn't supported in current display mode or a |
* negative number on failure. A positive status code on success, |
* which describes how the vblank_time timestamp was computed. |
*/ |
int (*get_vblank_timestamp) (struct drm_device *dev, int crtc, |
int *max_error, |
struct timeval *vblank_time, |
unsigned flags); |
/* these have to be filled in */ |
irqreturn_t(*irq_handler) (DRM_IRQ_ARGS); |
927,6 → 830,8 |
struct drm_file *file_priv); |
void (*reclaim_buffers_idlelocked) (struct drm_device *dev, |
struct drm_file *file_priv); |
resource_size_t (*get_map_ofs) (struct drm_local_map * map); |
resource_size_t (*get_reg_ofs) (struct drm_device *dev); |
void (*set_version) (struct drm_device *dev, |
struct drm_set_version *sv); |
943,6 → 848,8 |
void (*master_drop)(struct drm_device *dev, struct drm_file *file_priv, |
bool from_release); |
int (*proc_init)(struct drm_minor *minor); |
void (*proc_cleanup)(struct drm_minor *minor); |
int (*debugfs_init)(struct drm_minor *minor); |
void (*debugfs_cleanup)(struct drm_minor *minor); |
1045,25 → 952,12 |
struct drm_mode_group mode_group; |
}; |
#endif |
/* mode specified on the command line */ |
struct drm_cmdline_mode { |
bool specified; |
bool refresh_specified; |
bool bpp_specified; |
int xres, yres; |
int bpp; |
int refresh; |
bool rb; |
bool interlace; |
bool cvt; |
bool margins; |
enum drm_connector_force force; |
}; |
#endif |
/** |
* DRM device structure. This structure represent a complete card that |
* may contain multiple heads. |
1109,7 → 1003,7 |
int ctx_count; /**< Number of context handles */ |
struct mutex ctxlist_mutex; /**< For ctxlist */ |
struct idr ctx_idr; |
// struct idr ctx_idr; |
struct list_head vmalist; /**< List of vmas (for debugging) */ |
1130,6 → 1024,7 |
__volatile__ long context_flag; /**< Context swapping flag */ |
__volatile__ long interrupt_flag; /**< Interruption handler flag */ |
__volatile__ long dma_flag; /**< DMA dispatch flag */ |
// struct timer_list timer; /**< Timer for delaying ctx switch */ |
// wait_queue_head_t context_wait; /**< Processes waiting on ctx switch */ |
int last_checked; /**< Last context checked for DMA */ |
int last_context; /**< Last current context */ |
1150,8 → 1045,6 |
// wait_queue_head_t *vbl_queue; /**< VBLANK wait queue */ |
atomic_t *_vblank_count; /**< number of VBLANK interrupts (driver must alloc the right number of counters) */ |
struct timeval *_vblank_time; /**< timestamp of current vblank_count (drivers must alloc right number of fields) */ |
spinlock_t vblank_time_lock; /**< Protects vblank count and time updates during vblank enable/disable */ |
spinlock_t vbl_lock; |
atomic_t *vblank_refcount; /* number of users of vblank interruptsper crtc */ |
u32 *last_vblank; /* protected by dev->vbl_lock, used */ |
1164,12 → 1057,6 |
u32 max_vblank_count; /**< size of vblank counter register */ |
/** |
* List of events |
*/ |
struct list_head vblank_event_list; |
spinlock_t event_lock; |
/*@} */ |
// cycles_t ctx_start; |
// cycles_t lck_start; |
1180,11 → 1067,11 |
// struct drm_agp_head *agp; /**< AGP data */ |
struct device *dev; /**< Device structure */ |
struct pci_dev *pdev; /**< PCI device structure */ |
int pci_vendor; /**< PCI vendor id */ |
int pci_device; /**< PCI device id */ |
unsigned int num_crtcs; /**< Number of CRTCs on this device */ |
// struct drm_sg_mem *sg; /**< Scatter gather memory */ |
int num_crtcs; /**< Number of CRTCs on this device */ |
void *dev_private; /**< device private data */ |
void *mm_private; |
struct address_space *dev_mapping; |
1197,29 → 1084,31 |
// struct drm_minor *control; /**< Control node for card */ |
// struct drm_minor *primary; /**< render type primary screen head */ |
/** \name Drawable information */ |
/*@{ */ |
spinlock_t drw_lock; |
// struct idr drw_idr; |
/*@} */ |
struct drm_mode_config mode_config; /**< Current mode config */ |
/** \name GEM information */ |
/*@{ */ |
spinlock_t object_name_lock; |
struct idr object_name_idr; |
// struct idr object_name_idr; |
atomic_t object_count; |
atomic_t object_memory; |
atomic_t pin_count; |
atomic_t pin_memory; |
atomic_t gtt_count; |
atomic_t gtt_memory; |
uint32_t gtt_total; |
uint32_t invalidate_domains; /* domains pending invalidation */ |
uint32_t flush_domains; /* domains pending flush */ |
/*@} */ |
int switch_power_state; |
}; |
#define DRM_SWITCH_POWER_ON 0 |
#define DRM_SWITCH_POWER_OFF 1 |
#define DRM_SWITCH_POWER_CHANGING 2 |
static __inline__ int drm_device_is_agp(struct drm_device *dev) |
{ |
return pci_find_capability(dev->pdev, PCI_CAP_ID_AGP); |
1302,6 → 1191,8 |
/*@{*/ |
/* Driver support (drm_drv.h) */ |
extern int drm_init(struct drm_driver *driver); |
extern void drm_exit(struct drm_driver *driver); |
extern long drm_ioctl(struct file *filp, |
unsigned int cmd, unsigned long arg); |
extern long drm_compat_ioctl(struct file *filp, |
1309,7 → 1200,6 |
extern int drm_lastclose(struct drm_device *dev); |
/* Device support (drm_fops.h) */ |
extern struct mutex drm_global_mutex; |
extern int drm_open(struct inode *inode, struct file *filp); |
extern int drm_stub_open(struct inode *inode, struct file *filp); |
extern int drm_fasync(int fd, struct file *filp, int on); |
1321,7 → 1211,8 |
extern int drm_mmap(struct file *filp, struct vm_area_struct *vma); |
extern int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma); |
extern void drm_vm_open_locked(struct vm_area_struct *vma); |
extern void drm_vm_close_locked(struct vm_area_struct *vma); |
extern resource_size_t drm_core_get_map_ofs(struct drm_local_map * map); |
extern resource_size_t drm_core_get_reg_ofs(struct drm_device *dev); |
extern unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait); |
/* Memory management support (drm_memory.h) */ |
1331,7 → 1222,8 |
int request, int *eof, void *data); |
extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area); |
extern void drm_free_agp(DRM_AGP_MEM * handle, int pages); |
extern DRM_AGP_MEM *drm_alloc_agp(struct drm_device *dev, int pages, u32 type); |
extern int drm_free_agp(DRM_AGP_MEM * handle, int pages); |
extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start); |
extern DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev, |
struct page **pages, |
1353,8 → 1245,6 |
struct drm_file *file_priv); |
extern int drm_getstats(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
extern int drm_getcap(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
extern int drm_setversion(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
extern int drm_noop(struct drm_device *dev, void *data, |
1385,6 → 1275,17 |
extern int drm_getsareactx(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
/* Drawable IOCTL support (drm_drawable.h) */ |
extern int drm_adddraw(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
extern int drm_rmdraw(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
extern int drm_update_drawable_info(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
extern struct drm_drawable_info *drm_get_drawable_info(struct drm_device *dev, |
drm_drawable_t id); |
extern void drm_drawable_free_all(struct drm_device *dev); |
/* Authentication IOCTL support (drm_auth.h) */ |
extern int drm_getmagic(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
1399,6 → 1300,7 |
struct drm_file *file_priv); |
extern int drm_unlock(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
extern int drm_lock_take(struct drm_lock_data *lock_data, unsigned int context); |
extern int drm_lock_free(struct drm_lock_data *lock_data, unsigned int context); |
extern void drm_idlelock_take(struct drm_lock_data *lock_data); |
extern void drm_idlelock_release(struct drm_lock_data *lock_data); |
1433,6 → 1335,10 |
extern int drm_mapbufs(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
extern int drm_order(unsigned long size); |
extern resource_size_t drm_get_resource_start(struct drm_device *dev, |
unsigned int resource); |
extern resource_size_t drm_get_resource_len(struct drm_device *dev, |
unsigned int resource); |
/* DMA support (drm_dma.h) */ |
extern int drm_dma_setup(struct drm_device *dev); |
1456,31 → 1362,11 |
struct drm_file *filp); |
extern int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq); |
extern u32 drm_vblank_count(struct drm_device *dev, int crtc); |
extern u32 drm_vblank_count_and_time(struct drm_device *dev, int crtc, |
struct timeval *vblanktime); |
extern bool drm_handle_vblank(struct drm_device *dev, int crtc); |
extern void drm_handle_vblank(struct drm_device *dev, int crtc); |
extern int drm_vblank_get(struct drm_device *dev, int crtc); |
extern void drm_vblank_put(struct drm_device *dev, int crtc); |
extern void drm_vblank_off(struct drm_device *dev, int crtc); |
extern void drm_vblank_cleanup(struct drm_device *dev); |
extern u32 drm_get_last_vbltimestamp(struct drm_device *dev, int crtc, |
struct timeval *tvblank, unsigned flags); |
extern int drm_calc_vbltimestamp_from_scanoutpos(struct drm_device *dev, |
int crtc, int *max_error, |
struct timeval *vblank_time, |
unsigned flags, |
struct drm_crtc *refcrtc); |
extern void drm_calc_timestamping_constants(struct drm_crtc *crtc); |
extern bool |
drm_mode_parse_command_line_for_connector(const char *mode_option, |
struct drm_connector *connector, |
struct drm_cmdline_mode *mode); |
extern struct drm_display_mode * |
drm_mode_create_from_cmdline_mode(struct drm_device *dev, |
struct drm_cmdline_mode *cmd); |
/* Modesetting support */ |
extern void drm_vblank_pre_modeset(struct drm_device *dev, int crtc); |
extern void drm_vblank_post_modeset(struct drm_device *dev, int crtc); |
1513,6 → 1399,11 |
extern int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request); |
extern int drm_agp_bind_ioctl(struct drm_device *dev, void *data, |
struct drm_file *file_priv); |
extern DRM_AGP_MEM *drm_agp_allocate_memory(struct agp_bridge_data *bridge, size_t pages, u32 type); |
extern int drm_agp_free_memory(DRM_AGP_MEM * handle); |
extern int drm_agp_bind_memory(DRM_AGP_MEM * handle, off_t start); |
extern int drm_agp_unbind_memory(DRM_AGP_MEM * handle); |
extern void drm_agp_chipset_flush(struct drm_device *dev); |
/* Stub support (drm_stub.h) */ |
extern int drm_setmaster_ioctl(struct drm_device *dev, void *data, |
1522,14 → 1413,12 |
struct drm_master *drm_master_create(struct drm_minor *minor); |
extern struct drm_master *drm_master_get(struct drm_master *master); |
extern void drm_master_put(struct drm_master **master); |
extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent, |
struct drm_driver *driver); |
extern void drm_put_dev(struct drm_device *dev); |
extern int drm_put_minor(struct drm_minor **minor); |
extern unsigned int drm_debug; |
extern unsigned int drm_vblank_offdelay; |
extern unsigned int drm_timestamp_precision; |
extern struct class *drm_class; |
extern struct proc_dir_entry *drm_proc_root; |
extern struct dentry *drm_debugfs_root; |
1562,6 → 1451,7 |
extern int drm_vblank_info(struct seq_file *m, void *data); |
extern int drm_clients_info(struct seq_file *m, void* data); |
extern int drm_gem_name_info(struct seq_file *m, void *data); |
extern int drm_gem_object_info(struct seq_file *m, void* data); |
#if DRM_DEBUG_CODE |
extern int drm_vma_info(struct seq_file *m, void *data); |
1604,13 → 1494,10 |
/* Graphics Execution Manager library functions (drm_gem.c) */ |
int drm_gem_init(struct drm_device *dev); |
void drm_gem_destroy(struct drm_device *dev); |
void drm_gem_object_release(struct drm_gem_object *obj); |
void drm_gem_object_free(struct kref *kref); |
struct drm_gem_object *drm_gem_object_alloc(struct drm_device *dev, |
size_t size); |
int drm_gem_object_init(struct drm_device *dev, |
struct drm_gem_object *obj, size_t size); |
void drm_gem_object_handle_free(struct drm_gem_object *obj); |
void drm_gem_object_handle_free(struct kref *kref); |
void drm_gem_vm_open(struct vm_area_struct *vma); |
void drm_gem_vm_close(struct vm_area_struct *vma); |
int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma); |
/drivers/include/drm/drm_crtc.h |
---|
65,7 → 65,7 |
MODE_H_ILLEGAL, /* mode has illegal horizontal timings */ |
MODE_V_ILLEGAL, /* mode has illegal horizontal timings */ |
MODE_BAD_WIDTH, /* requires an unsupported linepitch */ |
MODE_NOMODE, /* no mode with a matching name */ |
MODE_NOMODE, /* no mode with a maching name */ |
MODE_NO_INTERLACE, /* interlaced mode not supported */ |
MODE_NO_DBLESCAN, /* doublescan mode not supported */ |
MODE_NO_VSCAN, /* multiscan mode not supported */ |
183,27 → 183,56 |
SubPixelNone, |
}; |
#define DRM_COLOR_FORMAT_RGB444 (1<<0) |
#define DRM_COLOR_FORMAT_YCRCB444 (1<<1) |
#define DRM_COLOR_FORMAT_YCRCB422 (1<<2) |
/* |
* Describes a given display (e.g. CRT or flat panel) and its limitations. |
*/ |
struct drm_display_info { |
char name[DRM_DISPLAY_INFO_LEN]; |
/* Input info */ |
bool serration_vsync; |
bool sync_on_green; |
bool composite_sync; |
bool separate_syncs; |
bool blank_to_black; |
unsigned char video_level; |
bool digital; |
/* Physical size */ |
unsigned int width_mm; |
unsigned int height_mm; |
/* Display parameters */ |
unsigned char gamma; /* FIXME: storage format */ |
bool gtf_supported; |
bool standard_color; |
enum { |
monochrome = 0, |
rgb, |
other, |
unknown, |
} display_type; |
bool active_off_supported; |
bool suspend_supported; |
bool standby_supported; |
/* Color info FIXME: storage format */ |
unsigned short redx, redy; |
unsigned short greenx, greeny; |
unsigned short bluex, bluey; |
unsigned short whitex, whitey; |
/* Clock limits FIXME: storage format */ |
unsigned int min_vfreq, max_vfreq; |
unsigned int min_hfreq, max_hfreq; |
unsigned int pixel_clock; |
unsigned int bpc; |
/* White point indices FIXME: storage format */ |
unsigned int wpx1, wpy1; |
unsigned int wpgamma1; |
unsigned int wpx2, wpy2; |
unsigned int wpgamma2; |
enum subpixel_order subpixel_order; |
u32 color_formats; |
char *raw_edid; /* if any */ |
}; |
225,8 → 254,7 |
* the semantics and arguments have a one to one mapping |
* on this function. |
*/ |
int (*dirty)(struct drm_framebuffer *framebuffer, |
struct drm_file *file_priv, unsigned flags, |
int (*dirty)(struct drm_framebuffer *framebuffer, unsigned flags, |
unsigned color, struct drm_clip_rect *clips, |
unsigned num_clips); |
}; |
243,6 → 271,8 |
unsigned int depth; |
int bits_per_pixel; |
int flags; |
struct fb_info *fbdev; |
u32 pseudo_palette[17]; |
struct list_head filp_head; |
/* if you are using the helper */ |
void *helper_private; |
279,7 → 309,6 |
/** |
* drm_crtc_funcs - control CRTCs for a given device |
* @reset: reset CRTC after state has been invalidate (e.g. resume) |
* @dpms: control display power levels |
* @save: save CRTC state |
* @resore: restore CRTC state |
307,8 → 336,6 |
void (*save)(struct drm_crtc *crtc); /* suspend? */ |
/* Restore CRTC state */ |
void (*restore)(struct drm_crtc *crtc); /* resume? */ |
/* Reset CRTC state */ |
void (*reset)(struct drm_crtc *crtc); |
/* cursor controls */ |
int (*cursor_set)(struct drm_crtc *crtc, struct drm_file *file_priv, |
317,7 → 344,7 |
/* Set gamma on the CRTC */ |
void (*gamma_set)(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b, |
uint32_t start, uint32_t size); |
uint32_t size); |
/* Object destroy routine */ |
void (*destroy)(struct drm_crtc *crtc); |
325,7 → 352,7 |
/* |
* Flip to the given framebuffer. This implements the page |
* flip ioctl described in drm_mode.h, specifically, the |
* flip ioctl descibed in drm_mode.h, specifically, the |
* implementation must return immediately and block all |
* rendering to the current fb until the flip has completed. |
* If userspace set the event flag in the ioctl, the event |
342,6 → 369,9 |
* @enabled: is this CRTC enabled? |
* @x: x position on screen |
* @y: y position on screen |
* @desired_mode: new desired mode |
* @desired_x: desired x for desired_mode |
* @desired_y: desired y for desired_mode |
* @funcs: CRTC control functions |
* |
* Each CRTC may have one or more connectors associated with it. This structure |
358,15 → 388,11 |
bool enabled; |
/* Requested mode from modesetting. */ |
struct drm_display_mode mode; |
/* Programmed mode in hw, after adjustments for encoders, |
* crtc, panel scaling etc. Needed for timestamping etc. |
*/ |
struct drm_display_mode hwmode; |
int x, y; |
struct drm_display_mode *desired_mode; |
int desired_x, desired_y; |
const struct drm_crtc_funcs *funcs; |
/* CRTC gamma size for reporting to userspace */ |
373,9 → 399,6 |
uint32_t gamma_size; |
uint16_t *gamma_store; |
/* Constants needed for precise vblank and swap timestamping. */ |
s64 framedur_ns, linedur_ns, pixeldur_ns; |
/* if you are using the helper */ |
void *helper_private; |
}; |
386,7 → 409,6 |
* @dpms: set power state (see drm_crtc_funcs above) |
* @save: save connector state |
* @restore: restore connector state |
* @reset: reset connector after state has been invalidate (e.g. resume) |
* @mode_valid: is this mode valid on the given connector? |
* @mode_fixup: try to fixup proposed mode for this connector |
* @mode_set: set this mode |
404,16 → 426,7 |
void (*dpms)(struct drm_connector *connector, int mode); |
void (*save)(struct drm_connector *connector); |
void (*restore)(struct drm_connector *connector); |
void (*reset)(struct drm_connector *connector); |
/* Check to see if anything is attached to the connector. |
* @force is set to false whilst polling, true when checking the |
* connector due to user request. @force can be used by the driver |
* to avoid expensive, destructive operations during automated |
* probing. |
*/ |
enum drm_connector_status (*detect)(struct drm_connector *connector, |
bool force); |
enum drm_connector_status (*detect)(struct drm_connector *connector); |
int (*fill_modes)(struct drm_connector *connector, uint32_t max_width, uint32_t max_height); |
int (*set_property)(struct drm_connector *connector, struct drm_property *property, |
uint64_t val); |
422,7 → 435,6 |
}; |
struct drm_encoder_funcs { |
void (*reset)(struct drm_encoder *encoder); |
void (*destroy)(struct drm_encoder *encoder); |
}; |
455,15 → 467,6 |
DRM_FORCE_ON_DIGITAL, /* for DVI-I use digital connector */ |
}; |
/* should we poll this connector for connects and disconnects */ |
/* hot plug detectable */ |
#define DRM_CONNECTOR_POLL_HPD (1 << 0) |
/* poll for connections */ |
#define DRM_CONNECTOR_POLL_CONNECT (1 << 1) |
/* can cleanly poll for disconnections without flickering the screen */ |
/* DACs should rarely do this without a lot of testing */ |
#define DRM_CONNECTOR_POLL_DISCONNECT (1 << 2) |
/** |
* drm_connector - central DRM connector control structure |
* @crtc: CRTC this connector is currently connected to, NULL if none |
482,7 → 485,7 |
*/ |
struct drm_connector { |
struct drm_device *dev; |
struct device kdev; |
// struct device kdev; |
struct device_attribute *attr; |
struct list_head head; |
508,8 → 511,6 |
u32 property_ids[DRM_CONNECTOR_MAX_PROPERTY]; |
uint64_t property_values[DRM_CONNECTOR_MAX_PROPERTY]; |
uint8_t polled; /* DRM_CONNECTOR_POLL_* */ |
/* requested DPMS state */ |
int dpms; |
520,6 → 521,7 |
uint32_t encoder_ids[DRM_CONNECTOR_MAX_ENCODER]; |
uint32_t force_encoder_id; |
struct drm_encoder *encoder; /* currently active encoder */ |
void *fb_helper_private; |
}; |
/** |
546,10 → 548,16 |
/** |
* struct drm_mode_config_funcs - configure CRTCs for a given screen layout |
* @resize: adjust CRTCs as necessary for the proposed layout |
* |
* Currently only a resize hook is available. DRM will call back into the |
* driver with a new screen width and height. If the driver can't support |
* the proposed size, it can return false. Otherwise it should adjust |
* the CRTC<->connector mappings as needed and update its view of the screen. |
*/ |
struct drm_mode_config_funcs { |
struct drm_framebuffer *(*fb_create)(struct drm_device *dev, struct drm_file *file_priv, struct drm_mode_fb_cmd *mode_cmd); |
void (*output_poll_changed)(struct drm_device *dev); |
int (*fb_changed)(struct drm_device *dev); |
}; |
struct drm_mode_group { |
582,15 → 590,14 |
struct list_head property_list; |
/* in-kernel framebuffers - hung of filp_head in drm_framebuffer */ |
struct list_head fb_kernel_list; |
int min_width, min_height; |
int max_width, max_height; |
struct drm_mode_config_funcs *funcs; |
resource_size_t fb_base; |
/* output poll support */ |
bool poll_enabled; |
// struct delayed_work output_poll_work; |
/* pointers to standard properties */ |
struct list_head property_blob_list; |
struct drm_property *edid_property; |
659,14 → 666,15 |
extern int drm_mode_group_init_legacy_group(struct drm_device *dev, struct drm_mode_group *group); |
extern struct edid *drm_get_edid(struct drm_connector *connector, |
struct i2c_adapter *adapter); |
//extern int drm_do_probe_ddc_edid(struct i2c_adapter *adapter, |
// unsigned char *buf, int len); |
extern int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid); |
extern void drm_mode_probed_add(struct drm_connector *connector, struct drm_display_mode *mode); |
extern void drm_mode_remove(struct drm_connector *connector, struct drm_display_mode *mode); |
extern struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, |
const struct drm_display_mode *mode); |
struct drm_display_mode *mode); |
extern void drm_mode_debug_printmodeline(struct drm_display_mode *mode); |
extern void drm_mode_config_init(struct drm_device *dev); |
extern void drm_mode_config_reset(struct drm_device *dev); |
extern void drm_mode_config_cleanup(struct drm_device *dev); |
extern void drm_mode_set_name(struct drm_display_mode *mode); |
extern bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2); |
689,8 → 697,8 |
extern void drm_mode_prune_invalid(struct drm_device *dev, |
struct list_head *mode_list, bool verbose); |
extern void drm_mode_sort(struct list_head *mode_list); |
extern int drm_mode_hsync(const struct drm_display_mode *mode); |
extern int drm_mode_vrefresh(const struct drm_display_mode *mode); |
extern int drm_mode_hsync(struct drm_display_mode *mode); |
extern int drm_mode_vrefresh(struct drm_display_mode *mode); |
extern void drm_mode_set_crtcinfo(struct drm_display_mode *p, |
int adjust_flags); |
extern void drm_mode_connector_list_update(struct drm_connector *connector); |
782,9 → 790,7 |
void *data, struct drm_file *file_priv); |
extern int drm_mode_gamma_set_ioctl(struct drm_device *dev, |
void *data, struct drm_file *file_priv); |
extern u8 *drm_find_cea_extension(struct edid *edid); |
extern bool drm_detect_hdmi_monitor(struct edid *edid); |
extern bool drm_detect_monitor_audio(struct edid *edid); |
extern int drm_mode_page_flip_ioctl(struct drm_device *dev, |
void *data, struct drm_file *file_priv); |
extern struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, |
793,14 → 799,8 |
extern struct drm_display_mode *drm_gtf_mode(struct drm_device *dev, |
int hdisplay, int vdisplay, int vrefresh, |
bool interlaced, int margins); |
extern struct drm_display_mode *drm_gtf_mode_complex(struct drm_device *dev, |
int hdisplay, int vdisplay, int vrefresh, |
bool interlaced, int margins, int GTF_M, |
int GTF_2C, int GTF_K, int GTF_2J); |
extern int drm_add_modes_noedid(struct drm_connector *connector, |
int hdisplay, int vdisplay); |
extern bool drm_edid_is_valid(struct edid *edid); |
struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, |
int hsize, int vsize, int fresh); |
#endif /* __DRM_CRTC_H__ */ |
/drivers/include/drm/drm_crtc_helper.h |
---|
39,11 → 39,7 |
#include <linux/fb.h> |
enum mode_set_atomic { |
LEAVE_ATOMIC_MODE_SET, |
ENTER_ATOMIC_MODE_SET, |
}; |
#include "drm_fb_helper.h" |
struct drm_crtc_helper_funcs { |
/* |
* Control power levels on the CRTC. If the mode passed in is |
65,15 → 61,9 |
/* Move the crtc on the current fb to the given position *optional* */ |
int (*mode_set_base)(struct drm_crtc *crtc, int x, int y, |
struct drm_framebuffer *old_fb); |
int (*mode_set_base_atomic)(struct drm_crtc *crtc, |
struct drm_framebuffer *fb, int x, int y, |
enum mode_set_atomic); |
/* reload the current crtc LUT */ |
void (*load_lut)(struct drm_crtc *crtc); |
/* disable crtc when not in use - more explicit than dpms off */ |
void (*disable)(struct drm_crtc *crtc); |
}; |
struct drm_encoder_helper_funcs { |
106,6 → 96,8 |
extern int drm_helper_probe_single_connector_modes(struct drm_connector *connector, uint32_t maxX, uint32_t maxY); |
extern void drm_helper_disable_unused_functions(struct drm_device *dev); |
extern int drm_helper_hotplug_stage_two(struct drm_device *dev); |
extern bool drm_helper_initial_config(struct drm_device *dev); |
extern int drm_crtc_helper_set_config(struct drm_mode_set *set); |
extern bool drm_crtc_helper_set_mode(struct drm_crtc *crtc, |
struct drm_display_mode *mode, |
131,17 → 123,12 |
encoder->helper_private = (void *)funcs; |
} |
static inline void drm_connector_helper_add(struct drm_connector *connector, |
static inline int drm_connector_helper_add(struct drm_connector *connector, |
const struct drm_connector_helper_funcs *funcs) |
{ |
connector->helper_private = (void *)funcs; |
return drm_fb_helper_add_connector(connector); |
} |
extern int drm_helper_resume_force_mode(struct drm_device *dev); |
extern void drm_kms_helper_poll_init(struct drm_device *dev); |
extern void drm_kms_helper_poll_fini(struct drm_device *dev); |
extern void drm_helper_hpd_irq_event(struct drm_device *dev); |
extern void drm_kms_helper_poll_disable(struct drm_device *dev); |
extern void drm_kms_helper_poll_enable(struct drm_device *dev); |
#endif |
/drivers/include/drm/drm_edid.h |
---|
28,12 → 28,6 |
#define EDID_LENGTH 128 |
#define DDC_ADDR 0x50 |
#define CEA_EXT 0x02 |
#define VTB_EXT 0x10 |
#define DI_EXT 0x40 |
#define LS_EXT 0x50 |
#define MI_EXT 0x60 |
struct est_timings { |
u8 t1; |
u8 t2; |
126,7 → 120,7 |
struct detailed_data_string str; |
struct detailed_data_monitor_range range; |
struct detailed_data_wpindex color; |
struct std_timing timings[6]; |
struct std_timing timings[5]; |
struct cvt_timing cvt[4]; |
} data; |
} __attribute__((packed)); |
155,35 → 149,12 |
#define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3) |
#define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4) |
#define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5) |
#define DRM_EDID_INPUT_DIGITAL (1 << 7) |
#define DRM_EDID_DIGITAL_DEPTH_MASK (7 << 4) |
#define DRM_EDID_DIGITAL_DEPTH_UNDEF (0 << 4) |
#define DRM_EDID_DIGITAL_DEPTH_6 (1 << 4) |
#define DRM_EDID_DIGITAL_DEPTH_8 (2 << 4) |
#define DRM_EDID_DIGITAL_DEPTH_10 (3 << 4) |
#define DRM_EDID_DIGITAL_DEPTH_12 (4 << 4) |
#define DRM_EDID_DIGITAL_DEPTH_14 (5 << 4) |
#define DRM_EDID_DIGITAL_DEPTH_16 (6 << 4) |
#define DRM_EDID_DIGITAL_DEPTH_RSVD (7 << 4) |
#define DRM_EDID_DIGITAL_TYPE_UNDEF (0) |
#define DRM_EDID_DIGITAL_TYPE_DVI (1) |
#define DRM_EDID_DIGITAL_TYPE_HDMI_A (2) |
#define DRM_EDID_DIGITAL_TYPE_HDMI_B (3) |
#define DRM_EDID_DIGITAL_TYPE_MDDI (4) |
#define DRM_EDID_DIGITAL_TYPE_DP (5) |
#define DRM_EDID_INPUT_DIGITAL (1 << 7) /* bits below must be zero if set */ |
#define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0) |
#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1) |
#define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2) |
/* If analog */ |
#define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */ |
/* If digital */ |
#define DRM_EDID_FEATURE_COLOR_MASK (3 << 3) |
#define DRM_EDID_FEATURE_RGB (0 << 3) |
#define DRM_EDID_FEATURE_RGB_YCRCB444 (1 << 3) |
#define DRM_EDID_FEATURE_RGB_YCRCB422 (2 << 3) |
#define DRM_EDID_FEATURE_RGB_YCRCB (3 << 3) /* both 4:4:4 and 4:2:2 */ |
#define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5) |
#define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6) |
#define DRM_EDID_FEATURE_PM_STANDBY (1 << 7) |
230,4 → 201,7 |
#define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8)) |
/* define the number of Extension EDID block */ |
#define DRM_MAX_EDID_EXT_NUM 4 |
#endif /* __DRM_EDID_H__ */ |
/drivers/include/drm/drm_pciids.h |
---|
6,7 → 6,6 |
{0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ |
{0x1002, 0x3152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x3154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x3155, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x3E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x3E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x4136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|RADEON_IS_IGP}, \ |
28,6 → 27,7 |
{0x1002, 0x4156, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ |
{0x1002, 0x4237, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP}, \ |
{0x1002, 0x4242, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ |
{0x1002, 0x4243, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ |
{0x1002, 0x4336, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ |
{0x1002, 0x4337, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ |
{0x1002, 0x4437, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ |
84,6 → 84,7 |
{0x1002, 0x5460, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ |
{0x1002, 0x5462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ |
{0x1002, 0x5464, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ |
{0x1002, 0x5657, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x5548, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x5549, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x554A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ |
101,7 → 102,6 |
{0x1002, 0x564F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x5652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x5653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x5657, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x5834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP}, \ |
{0x1002, 0x5835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ |
{0x1002, 0x5954, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ |
141,67 → 141,12 |
{0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6700, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6701, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6703, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6704, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6705, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6706, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6707, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6708, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6709, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6718, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6719, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x671c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x671d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x671f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6721, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6722, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6723, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6725, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6726, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6728, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6729, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6738, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6739, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x673e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6740, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6741, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6742, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6743, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6744, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6745, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6746, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6747, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6748, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6749, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6750, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6758, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6759, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6760, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6761, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6762, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6763, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6764, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6765, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6766, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6767, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6768, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6770, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6779, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6880, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6888, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6889, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x688A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x688C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x688D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6898, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x6899, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x689b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x689c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HEMLOCK|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x689d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HEMLOCK|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x689e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ |
212,12 → 157,9 |
{0x1002, 0x68b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68b8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68b9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68ba, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68be, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68bf, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68c1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68c7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68c8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68c9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ |
231,7 → 173,6 |
{0x1002, 0x68e8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68e9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68f1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68f2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68f8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68f9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x68fe, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ |
372,7 → 313,6 |
{0x1002, 0x9456, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x945A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x945B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x945E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9460, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x946A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
383,7 → 323,6 |
{0x1002, 0x9487, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9488, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9489, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x948A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x948F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9490, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9491, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
426,7 → 365,6 |
{0x1002, 0x9553, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9555, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9557, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x955f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9580, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9581, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
{0x1002, 0x9583, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ |
467,29 → 405,11 |
{0x1002, 0x9614, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9615, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9616, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9640, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9641, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9642, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO2|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9643, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO2|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9644, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO2|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9645, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO2|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\ |
{0x1002, 0x9648, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\ |
{0x1002, 0x964a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x964e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\ |
{0x1002, 0x964f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\ |
{0x1002, 0x9710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9711, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9713, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9714, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9715, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9802, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9804, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9806, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0x1002, 0x9807, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
{0, 0, 0} |
/drivers/include/drm/radeon_drm.h |
---|
547,8 → 547,8 |
#define DRM_IOCTL_RADEON_GEM_WAIT_IDLE DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle) |
#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs) |
#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info) |
#define DRM_IOCTL_RADEON_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) |
#define DRM_IOCTL_RADEON_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) |
#define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) |
#define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) |
#define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy) |
typedef struct drm_radeon_init { |
641,7 → 641,7 |
} drm_radeon_vertex2_t; |
/* v1.3 - obsoletes drm_radeon_vertex2 |
* - allows arbitrarily large cliprect list |
* - allows arbitarily large cliprect list |
* - allows updating of tcl packet, vector and scalar state |
* - allows memory-efficient description of state updates |
* - allows state to be emitted without a primitive |
902,15 → 902,6 |
#define RADEON_INFO_NUM_GB_PIPES 0x01 |
#define RADEON_INFO_NUM_Z_PIPES 0x02 |
#define RADEON_INFO_ACCEL_WORKING 0x03 |
#define RADEON_INFO_CRTC_FROM_ID 0x04 |
#define RADEON_INFO_ACCEL_WORKING2 0x05 |
#define RADEON_INFO_TILING_CONFIG 0x06 |
#define RADEON_INFO_WANT_HYPERZ 0x07 |
#define RADEON_INFO_WANT_CMASK 0x08 /* get access to CMASK on r300 */ |
#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x09 /* clock crystal frequency */ |
#define RADEON_INFO_NUM_BACKENDS 0x0a /* DB/backends for r600+ - need for OQ */ |
#define RADEON_INFO_NUM_TILE_PIPES 0x0b /* tile pipes for r600+ */ |
#define RADEON_INFO_FUSION_GART_WORKING 0x0c /* fusion writes to GTT were broken before this */ |
struct drm_radeon_info { |
uint32_t request; |
/drivers/include/drm/drm_dp_helper.h |
---|
23,9 → 23,6 |
#ifndef _DRM_DP_HELPER_H_ |
#define _DRM_DP_HELPER_H_ |
#include <linux/types.h> |
#include <linux/i2c.h> |
/* From the VESA DisplayPort spec */ |
#define AUX_NATIVE_WRITE 0x8 |
53,7 → 50,6 |
#define DP_MAX_LANE_COUNT 0x002 |
# define DP_MAX_LANE_COUNT_MASK 0x1f |
# define DP_TPS3_SUPPORTED (1 << 6) |
# define DP_ENHANCED_FRAME_CAP (1 << 7) |
#define DP_MAX_DOWNSPREAD 0x003 |
72,13 → 68,10 |
#define DP_MAIN_LINK_CHANNEL_CODING 0x006 |
#define DP_TRAINING_AUX_RD_INTERVAL 0x00e |
/* link configuration */ |
#define DP_LINK_BW_SET 0x100 |
# define DP_LINK_BW_1_62 0x06 |
# define DP_LINK_BW_2_7 0x0a |
# define DP_LINK_BW_5_4 0x14 |
#define DP_LANE_COUNT_SET 0x101 |
# define DP_LANE_COUNT_MASK 0x0f |
88,7 → 81,6 |
# define DP_TRAINING_PATTERN_DISABLE 0 |
# define DP_TRAINING_PATTERN_1 1 |
# define DP_TRAINING_PATTERN_2 2 |
# define DP_TRAINING_PATTERN_3 3 |
# define DP_TRAINING_PATTERN_MASK 0x3 |
# define DP_LINK_QUAL_PATTERN_DISABLE (0 << 2) |
/drivers/include/drm/drm_fb_helper.h |
---|
30,23 → 30,11 |
#ifndef DRM_FB_HELPER_H |
#define DRM_FB_HELPER_H |
struct drm_fb_helper; |
struct drm_fb_helper_crtc { |
uint32_t crtc_id; |
struct drm_mode_set mode_set; |
struct drm_display_mode *desired_mode; |
}; |
struct drm_fb_helper_surface_size { |
u32 fb_width; |
u32 fb_height; |
u32 surface_width; |
u32 surface_height; |
u32 surface_bpp; |
u32 surface_depth; |
}; |
struct drm_fb_helper_funcs { |
void (*gamma_set)(struct drm_crtc *crtc, u16 red, u16 green, |
53,43 → 41,50 |
u16 blue, int regno); |
void (*gamma_get)(struct drm_crtc *crtc, u16 *red, u16 *green, |
u16 *blue, int regno); |
}; |
int (*fb_probe)(struct drm_fb_helper *helper, |
struct drm_fb_helper_surface_size *sizes); |
/* mode specified on the command line */ |
struct drm_fb_helper_cmdline_mode { |
bool specified; |
bool refresh_specified; |
bool bpp_specified; |
int xres, yres; |
int bpp; |
int refresh; |
bool rb; |
bool interlace; |
bool cvt; |
bool margins; |
}; |
struct drm_fb_helper_connector { |
struct drm_connector *connector; |
struct drm_cmdline_mode cmdline_mode; |
struct drm_fb_helper_cmdline_mode cmdline_mode; |
}; |
struct drm_fb_helper { |
struct drm_framebuffer *fb; |
struct drm_framebuffer *saved_fb; |
struct drm_device *dev; |
struct drm_display_mode *mode; |
int crtc_count; |
struct drm_fb_helper_crtc *crtc_info; |
int connector_count; |
struct drm_fb_helper_connector **connector_info; |
struct drm_fb_helper_funcs *funcs; |
int conn_limit; |
struct fb_info *fbdev; |
u32 pseudo_palette[17]; |
struct list_head kernel_fb_list; |
/* we got a hotplug but fbdev wasn't running the console |
delay until next set_par */ |
bool delayed_hotplug; |
}; |
int drm_fb_helper_single_fb_probe(struct drm_fb_helper *helper, |
int preferred_bpp); |
int drm_fb_helper_init(struct drm_device *dev, |
struct drm_fb_helper *helper, int crtc_count, |
int drm_fb_helper_single_fb_probe(struct drm_device *dev, |
int preferred_bpp, |
int (*fb_create)(struct drm_device *dev, |
uint32_t fb_width, |
uint32_t fb_height, |
uint32_t surface_width, |
uint32_t surface_height, |
uint32_t surface_depth, |
uint32_t surface_bpp, |
struct drm_framebuffer **fb_ptr)); |
int drm_fb_helper_init_crtc_count(struct drm_fb_helper *helper, int crtc_count, |
int max_conn); |
void drm_fb_helper_fini(struct drm_fb_helper *helper); |
void drm_fb_helper_free(struct drm_fb_helper *helper); |
int drm_fb_helper_blank(int blank, struct fb_info *info); |
int drm_fb_helper_pan_display(struct fb_var_screeninfo *var, |
struct fb_info *info); |
103,19 → 98,14 |
unsigned transp, |
struct fb_info *info); |
bool drm_fb_helper_restore_fbdev_mode(struct drm_fb_helper *fb_helper); |
void drm_fb_helper_restore(void); |
void drm_fb_helper_fill_var(struct fb_info *info, struct drm_fb_helper *fb_helper, |
void drm_fb_helper_fill_var(struct fb_info *info, struct drm_framebuffer *fb, |
uint32_t fb_width, uint32_t fb_height); |
void drm_fb_helper_fill_fix(struct fb_info *info, uint32_t pitch, |
uint32_t depth); |
int drm_fb_helper_add_connector(struct drm_connector *connector); |
int drm_fb_helper_parse_command_line(struct drm_device *dev); |
int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info); |
int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper); |
bool drm_fb_helper_initial_config(struct drm_fb_helper *fb_helper, int bpp_sel); |
int drm_fb_helper_single_add_all_connectors(struct drm_fb_helper *fb_helper); |
int drm_fb_helper_debug_enter(struct fb_info *info); |
int drm_fb_helper_debug_leave(struct fb_info *info); |
#endif |
/drivers/include/drm/drm_hashtab.h |
---|
45,10 → 45,14 |
}; |
struct drm_open_hash { |
unsigned int size; |
unsigned int order; |
unsigned int fill; |
struct hlist_head *table; |
u8 order; |
int use_vmalloc; |
}; |
extern int drm_ht_create(struct drm_open_hash *ht, unsigned int order); |
extern int drm_ht_insert_item(struct drm_open_hash *ht, struct drm_hash_item *item); |
extern int drm_ht_just_insert_please(struct drm_open_hash *ht, struct drm_hash_item *item, |
/drivers/include/drm/drm_mm.h |
---|
42,58 → 42,23 |
#endif |
struct drm_mm_node { |
struct list_head node_list; |
struct list_head hole_stack; |
unsigned hole_follows : 1; |
unsigned scanned_block : 1; |
unsigned scanned_prev_free : 1; |
unsigned scanned_next_free : 1; |
unsigned scanned_preceeds_hole : 1; |
unsigned allocated : 1; |
struct list_head fl_entry; |
struct list_head ml_entry; |
int free; |
unsigned long start; |
unsigned long size; |
struct drm_mm *mm; |
void *private; |
}; |
struct drm_mm { |
/* List of all memory nodes that immediately precede a free hole. */ |
struct list_head hole_stack; |
/* head_node.node_list is the list of all memory nodes, ordered |
* according to the (increasing) start address of the memory node. */ |
struct drm_mm_node head_node; |
struct list_head fl_entry; |
struct list_head ml_entry; |
struct list_head unused_nodes; |
int num_unused; |
spinlock_t unused_lock; |
unsigned int scan_check_range : 1; |
unsigned scan_alignment; |
unsigned long scan_size; |
unsigned long scan_hit_start; |
unsigned scan_hit_size; |
unsigned scanned_blocks; |
unsigned long scan_start; |
unsigned long scan_end; |
struct drm_mm_node *prev_scanned_node; |
}; |
static inline bool drm_mm_node_allocated(struct drm_mm_node *node) |
{ |
return node->allocated; |
} |
static inline bool drm_mm_initialized(struct drm_mm *mm) |
{ |
return mm->hole_stack.next; |
} |
#define drm_mm_for_each_node(entry, mm) list_for_each_entry(entry, \ |
&(mm)->head_node.node_list, \ |
node_list) |
#define drm_mm_for_each_scanned_node_reverse(entry, n, mm) \ |
for (entry = (mm)->prev_scanned_node, \ |
next = entry ? list_entry(entry->node_list.next, \ |
struct drm_mm_node, node_list) : NULL; \ |
entry != NULL; entry = next, \ |
next = entry ? list_entry(entry->node_list.next, \ |
struct drm_mm_node, node_list) : NULL) \ |
/* |
* Basic range manager support (drm_mm.c) |
*/ |
140,15 → 105,7 |
return drm_mm_get_block_range_generic(parent, size, alignment, |
start, end, 1); |
} |
extern int drm_mm_insert_node(struct drm_mm *mm, struct drm_mm_node *node, |
unsigned long size, unsigned alignment); |
extern int drm_mm_insert_node_in_range(struct drm_mm *mm, |
struct drm_mm_node *node, |
unsigned long size, unsigned alignment, |
unsigned long start, unsigned long end); |
extern void drm_mm_put_block(struct drm_mm_node *cur); |
extern void drm_mm_remove_node(struct drm_mm_node *node); |
extern void drm_mm_replace_node(struct drm_mm_node *old, struct drm_mm_node *new); |
extern struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm, |
unsigned long size, |
unsigned alignment, |
164,6 → 121,11 |
unsigned long size); |
extern void drm_mm_takedown(struct drm_mm *mm); |
extern int drm_mm_clean(struct drm_mm *mm); |
extern unsigned long drm_mm_tail_space(struct drm_mm *mm); |
extern int drm_mm_remove_space_from_tail(struct drm_mm *mm, |
unsigned long size); |
extern int drm_mm_add_space_to_tail(struct drm_mm *mm, |
unsigned long size, int atomic); |
extern int drm_mm_pre_get(struct drm_mm *mm); |
static inline struct drm_mm *drm_get_mm(struct drm_mm_node *block) |
171,15 → 133,6 |
return block->mm; |
} |
void drm_mm_init_scan(struct drm_mm *mm, unsigned long size, |
unsigned alignment); |
void drm_mm_init_scan_with_range(struct drm_mm *mm, unsigned long size, |
unsigned alignment, |
unsigned long start, |
unsigned long end); |
int drm_mm_scan_add_block(struct drm_mm_node *node); |
int drm_mm_scan_remove_block(struct drm_mm_node *node); |
extern void drm_mm_debug_table(struct drm_mm *mm, const char *prefix); |
#ifdef CONFIG_DEBUG_FS |
int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm); |
/drivers/include/drm/drm_mode.h |
---|
74,7 → 74,6 |
/* Dithering mode options */ |
#define DRM_MODE_DITHERING_OFF 0 |
#define DRM_MODE_DITHERING_ON 1 |
#define DRM_MODE_DITHERING_AUTO 2 |
/* Dirty info options */ |
#define DRM_MODE_DIRTY_OFF 0 |
277,7 → 276,7 |
#define DRM_MODE_CURSOR_MOVE (1<<1) |
/* |
* depending on the value in flags different members are used. |
* depending on the value in flags diffrent members are used. |
* |
* CURSOR_BO uses |
* crtc |
344,33 → 343,4 |
__u64 user_data; |
}; |
/* create a dumb scanout buffer */ |
struct drm_mode_create_dumb { |
uint32_t height; |
uint32_t width; |
uint32_t bpp; |
uint32_t flags; |
/* handle, pitch, size will be returned */ |
uint32_t handle; |
uint32_t pitch; |
uint64_t size; |
}; |
/* set up for mmap of a dumb scanout buffer */ |
struct drm_mode_map_dumb { |
/** Handle for the object being mapped. */ |
__u32 handle; |
__u32 pad; |
/** |
* Fake offset to use for subsequent mmap call |
* |
* This is a fixed-size type for 32/64 compatibility. |
*/ |
__u64 offset; |
}; |
struct drm_mode_destroy_dumb { |
uint32_t handle; |
}; |
#endif |
/drivers/include/linux/poison.h |
---|
File deleted |
/drivers/include/linux/sysrq.h |
---|
File deleted |
/drivers/include/linux/mod_devicetable.h |
---|
File deleted |
/drivers/include/linux/slab.h |
---|
File deleted |
/drivers/include/linux/asm/atomic_32.h |
---|
File deleted |
/drivers/include/linux/asm/atomic.h |
---|
1,5 → 1,318 |
#ifdef CONFIG_X86_32 |
# include "atomic_32.h" |
#else |
# include "atomic_64.h" |
#ifndef _ASM_X86_ATOMIC_H |
#define _ASM_X86_ATOMIC_H |
#include <linux/compiler.h> |
#include <linux/types.h> |
//#include <asm/processor.h> |
//#include <asm/alternative.h> |
#include <asm/cmpxchg.h> |
/* |
* Atomic operations that C can't guarantee us. Useful for |
* resource counting etc.. |
*/ |
#define ATOMIC_INIT(i) { (i) } |
/** |
* atomic_read - read atomic variable |
* @v: pointer of type atomic_t |
* |
* Atomically reads the value of @v. |
*/ |
static inline int atomic_read(const atomic_t *v) |
{ |
return (*(volatile int *)&(v)->counter); |
} |
/** |
* atomic_set - set atomic variable |
* @v: pointer of type atomic_t |
* @i: required value |
* |
* Atomically sets the value of @v to @i. |
*/ |
static inline void atomic_set(atomic_t *v, int i) |
{ |
v->counter = i; |
} |
/** |
* atomic_add - add integer to atomic variable |
* @i: integer value to add |
* @v: pointer of type atomic_t |
* |
* Atomically adds @i to @v. |
*/ |
static inline void atomic_add(int i, atomic_t *v) |
{ |
asm volatile(LOCK_PREFIX "addl %1,%0" |
: "+m" (v->counter) |
: "ir" (i)); |
} |
/** |
* atomic_sub - subtract integer from atomic variable |
* @i: integer value to subtract |
* @v: pointer of type atomic_t |
* |
* Atomically subtracts @i from @v. |
*/ |
static inline void atomic_sub(int i, atomic_t *v) |
{ |
asm volatile(LOCK_PREFIX "subl %1,%0" |
: "+m" (v->counter) |
: "ir" (i)); |
} |
/** |
* atomic_sub_and_test - subtract value from variable and test result |
* @i: integer value to subtract |
* @v: pointer of type atomic_t |
* |
* Atomically subtracts @i from @v and returns |
* true if the result is zero, or false for all |
* other cases. |
*/ |
static inline int atomic_sub_and_test(int i, atomic_t *v) |
{ |
unsigned char c; |
asm volatile(LOCK_PREFIX "subl %2,%0; sete %1" |
: "+m" (v->counter), "=qm" (c) |
: "ir" (i) : "memory"); |
return c; |
} |
/** |
* atomic_inc - increment atomic variable |
* @v: pointer of type atomic_t |
* |
* Atomically increments @v by 1. |
*/ |
static inline void atomic_inc(atomic_t *v) |
{ |
asm volatile(LOCK_PREFIX "incl %0" |
: "+m" (v->counter)); |
} |
/** |
* atomic_dec - decrement atomic variable |
* @v: pointer of type atomic_t |
* |
* Atomically decrements @v by 1. |
*/ |
static inline void atomic_dec(atomic_t *v) |
{ |
asm volatile(LOCK_PREFIX "decl %0" |
: "+m" (v->counter)); |
} |
/** |
* atomic_dec_and_test - decrement and test |
* @v: pointer of type atomic_t |
* |
* Atomically decrements @v by 1 and |
* returns true if the result is 0, or false for all other |
* cases. |
*/ |
static inline int atomic_dec_and_test(atomic_t *v) |
{ |
unsigned char c; |
asm volatile(LOCK_PREFIX "decl %0; sete %1" |
: "+m" (v->counter), "=qm" (c) |
: : "memory"); |
return c != 0; |
} |
/** |
* atomic_inc_and_test - increment and test |
* @v: pointer of type atomic_t |
* |
* Atomically increments @v by 1 |
* and returns true if the result is zero, or false for all |
* other cases. |
*/ |
static inline int atomic_inc_and_test(atomic_t *v) |
{ |
unsigned char c; |
asm volatile(LOCK_PREFIX "incl %0; sete %1" |
: "+m" (v->counter), "=qm" (c) |
: : "memory"); |
return c != 0; |
} |
/** |
* atomic_add_negative - add and test if negative |
* @i: integer value to add |
* @v: pointer of type atomic_t |
* |
* Atomically adds @i to @v and returns true |
* if the result is negative, or false when |
* result is greater than or equal to zero. |
*/ |
static inline int atomic_add_negative(int i, atomic_t *v) |
{ |
unsigned char c; |
asm volatile(LOCK_PREFIX "addl %2,%0; sets %1" |
: "+m" (v->counter), "=qm" (c) |
: "ir" (i) : "memory"); |
return c; |
} |
/** |
* atomic_add_return - add integer and return |
* @i: integer value to add |
* @v: pointer of type atomic_t |
* |
* Atomically adds @i to @v and returns @i + @v |
*/ |
static inline int atomic_add_return(int i, atomic_t *v) |
{ |
int __i; |
#ifdef CONFIG_M386 |
unsigned long flags; |
if (unlikely(boot_cpu_data.x86 <= 3)) |
goto no_xadd; |
#endif |
/* Modern 486+ processor */ |
__i = i; |
asm volatile(LOCK_PREFIX "xaddl %0, %1" |
: "+r" (i), "+m" (v->counter) |
: : "memory"); |
return i + __i; |
#ifdef CONFIG_M386 |
no_xadd: /* Legacy 386 processor */ |
raw_local_irq_save(flags); |
__i = atomic_read(v); |
atomic_set(v, i + __i); |
raw_local_irq_restore(flags); |
return i + __i; |
#endif |
} |
/** |
* atomic_sub_return - subtract integer and return |
* @v: pointer of type atomic_t |
* @i: integer value to subtract |
* |
* Atomically subtracts @i from @v and returns @v - @i |
*/ |
static inline int atomic_sub_return(int i, atomic_t *v) |
{ |
return atomic_add_return(-i, v); |
} |
#define atomic_inc_return(v) (atomic_add_return(1, v)) |
#define atomic_dec_return(v) (atomic_sub_return(1, v)) |
static inline int atomic_cmpxchg(atomic_t *v, int old, int new) |
{ |
return cmpxchg(&v->counter, old, new); |
} |
static inline int atomic_xchg(atomic_t *v, int new) |
{ |
return xchg(&v->counter, new); |
} |
/** |
* atomic_add_unless - add unless the number is already a given value |
* @v: pointer of type atomic_t |
* @a: the amount to add to v... |
* @u: ...unless v is equal to u. |
* |
* Atomically adds @a to @v, so long as @v was not already @u. |
* Returns non-zero if @v was not @u, and zero otherwise. |
*/ |
static inline int atomic_add_unless(atomic_t *v, int a, int u) |
{ |
int c, old; |
c = atomic_read(v); |
for (;;) { |
if (unlikely(c == (u))) |
break; |
old = atomic_cmpxchg((v), c, c + (a)); |
if (likely(old == c)) |
break; |
c = old; |
} |
return c != (u); |
} |
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) |
/* |
* atomic_dec_if_positive - decrement by 1 if old value positive |
* @v: pointer of type atomic_t |
* |
* The function returns the old value of *v minus 1, even if |
* the atomic variable, v, was not decremented. |
*/ |
static inline int atomic_dec_if_positive(atomic_t *v) |
{ |
int c, old, dec; |
c = atomic_read(v); |
for (;;) { |
dec = c - 1; |
if (unlikely(dec < 0)) |
break; |
old = atomic_cmpxchg((v), c, dec); |
if (likely(old == c)) |
break; |
c = old; |
} |
return dec; |
} |
/** |
* atomic_inc_short - increment of a short integer |
* @v: pointer to type int |
* |
* Atomically adds 1 to @v |
* Returns the new value of @u |
*/ |
static inline short int atomic_inc_short(short int *v) |
{ |
asm(LOCK_PREFIX "addw $1, %0" : "+m" (*v)); |
return *v; |
} |
#ifdef CONFIG_X86_64 |
/** |
* atomic_or_long - OR of two long integers |
* @v1: pointer to type unsigned long |
* @v2: pointer to type unsigned long |
* |
* Atomically ORs @v1 and @v2 |
* Returns the result of the OR |
*/ |
static inline void atomic_or_long(unsigned long *v1, unsigned long v2) |
{ |
asm(LOCK_PREFIX "orq %1, %0" : "+m" (*v1) : "r" (v2)); |
} |
#endif |
/* These are x86-specific, used by some header files */ |
#define atomic_clear_mask(mask, addr) \ |
asm volatile(LOCK_PREFIX "andl %0,%1" \ |
: : "r" (~(mask)), "m" (*(addr)) : "memory") |
#define atomic_set_mask(mask, addr) \ |
asm volatile(LOCK_PREFIX "orl %0,%1" \ |
: : "r" ((unsigned)(mask)), "m" (*(addr)) \ |
: "memory") |
/* Atomic operations are already serializing on x86 */ |
#define smp_mb__before_atomic_dec() barrier() |
#define smp_mb__after_atomic_dec() barrier() |
#define smp_mb__before_atomic_inc() barrier() |
#define smp_mb__after_atomic_inc() barrier() |
//#include <asm-generic/atomic-long.h> |
#endif /* _ASM_X86_ATOMIC_H */ |
/drivers/include/linux/kernel.h |
---|
12,9 → 12,9 |
#include <linux/types.h> |
#include <linux/compiler.h> |
#define USHRT_MAX ((u16)(~0U)) |
#define SHRT_MAX ((s16)(USHRT_MAX>>1)) |
#define SHRT_MIN ((s16)(-SHRT_MAX - 1)) |
#define USHORT_MAX ((u16)(~0U)) |
#define SHORT_MAX ((s16)(USHORT_MAX>>1)) |
#define SHORT_MIN (-SHORT_MAX - 1) |
#define INT_MAX ((int)(~0U>>1)) |
#define INT_MIN (-INT_MAX - 1) |
#define UINT_MAX (~0U) |
46,6 → 46,7 |
*/ |
#define lower_32_bits(n) ((u32)(n)) |
#define KERN_EMERG "<0>" /* system is unusable */ |
#define KERN_ALERT "<1>" /* action must be taken immediately */ |
#define KERN_CRIT "<2>" /* critical conditions */ |
112,6 → 113,18 |
return kzalloc(n * size, 0); |
} |
extern const char hex_asc[]; |
#define hex_asc_lo(x) hex_asc[((x) & 0x0f)] |
#define hex_asc_hi(x) hex_asc[((x) & 0xf0) >> 4] |
static inline char *pack_hex_byte(char *buf, u8 byte) |
{ |
*buf++ = hex_asc_hi(byte); |
*buf++ = hex_asc_lo(byte); |
return buf; |
} |
void free (void *ptr); |
#endif /* __KERNEL__ */ |
149,7 → 162,6 |
#define preempt_enable_no_resched_notrace() do { } while (0) |
#define preempt_enable_notrace() do { } while (0) |
#define in_dbg_master() (0) |
#endif |
/drivers/include/linux/pci.h |
---|
1,25 → 1,23 |
/* |
* pci.h |
* |
* PCI defines and function prototypes |
* Copyright 1994, Drew Eckhardt |
* Copyright 1997--1999 Martin Mares <mj@ucw.cz> |
* |
* For more information, please consult the following manuals (look at |
* http://www.pcisig.com/ for how to get them): |
* |
* PCI BIOS Specification |
* PCI Local Bus Specification |
* PCI to PCI Bridge Specification |
* PCI System Design Guide |
*/ |
#ifndef __PCI_H__ |
#define __PCI_H__ |
#include <types.h> |
#include <list.h> |
#include <ioport.h> |
#include <pci_regs.h> |
#include <linux/errno.h> |
#ifndef __PCI_H__ |
#define __PCI_H__ |
/* pci_slot represents a physical slot */ |
struct pci_slot { |
struct pci_bus *bus; /* The bus this slot is on */ |
struct list_head list; /* node in list of slots on this bus */ |
// struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ |
unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ |
// struct kobject kobj; |
}; |
#define PCI_ANY_ID (~0) |
149,145 → 147,7 |
#define PCI_CLASS_OTHERS 0xff |
/* |
* Under PCI, each device has 256 bytes of configuration address space, |
* of which the first 64 bytes are standardized as follows: |
*/ |
#define PCI_VENDOR_ID 0x000 /* 16 bits */ |
#define PCI_DEVICE_ID 0x002 /* 16 bits */ |
#define PCI_COMMAND 0x004 /* 16 bits */ |
#define PCI_COMMAND_IO 0x001 /* Enable response in I/O space */ |
#define PCI_COMMAND_MEMORY 0x002 /* Enable response in Memory space */ |
#define PCI_COMMAND_MASTER 0x004 /* Enable bus mastering */ |
#define PCI_COMMAND_SPECIAL 0x008 /* Enable response to special cycles */ |
#define PCI_COMMAND_INVALIDATE 0x010 /* Use memory write and invalidate */ |
#define PCI_COMMAND_VGA_PALETTE 0x020 /* Enable palette snooping */ |
#define PCI_COMMAND_PARITY 0x040 /* Enable parity checking */ |
#define PCI_COMMAND_WAIT 0x080 /* Enable address/data stepping */ |
#define PCI_COMMAND_SERR 0x100 /* Enable SERR */ |
#define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */ |
#define PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */ |
#define PCI_STATUS 0x006 /* 16 bits */ |
#define PCI_STATUS_CAP_LIST 0x010 /* Support Capability List */ |
#define PCI_STATUS_66MHZ 0x020 /* Support 66 Mhz PCI 2.1 bus */ |
#define PCI_STATUS_UDF 0x040 /* Support User Definable Features [obsolete] */ |
#define PCI_STATUS_FAST_BACK 0x080 /* Accept fast-back to back */ |
#define PCI_STATUS_PARITY 0x100 /* Detected parity error */ |
#define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */ |
#define PCI_STATUS_DEVSEL_FAST 0x000 |
#define PCI_STATUS_DEVSEL_MEDIUM 0x200 |
#define PCI_STATUS_DEVSEL_SLOW 0x400 |
#define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */ |
#define PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */ |
#define PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */ |
#define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */ |
#define PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */ |
#define PCI_CLASS_REVISION 0x08 /* High 24 bits are class, low 8 revision */ |
#define PCI_REVISION_ID 0x08 /* Revision ID */ |
#define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */ |
#define PCI_CLASS_DEVICE 0x0a /* Device class */ |
#define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */ |
#define PCI_LATENCY_TIMER 0x0d /* 8 bits */ |
#define PCI_HEADER_TYPE 0x0e /* 8 bits */ |
#define PCI_HEADER_TYPE_NORMAL 0 |
#define PCI_HEADER_TYPE_BRIDGE 1 |
#define PCI_HEADER_TYPE_CARDBUS 2 |
#define PCI_BIST 0x0f /* 8 bits */ |
#define PCI_BIST_CODE_MASK 0x0f /* Return result */ |
#define PCI_BIST_START 0x40 /* 1 to start BIST, 2 secs or less */ |
#define PCI_BIST_CAPABLE 0x80 /* 1 if BIST capable */ |
/* |
* Base addresses specify locations in memory or I/O space. |
* Decoded size can be determined by writing a value of |
* 0xffffffff to the register, and reading it back. Only |
* 1 bits are decoded. |
*/ |
#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ |
#define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */ |
#define PCI_BASE_ADDRESS_2 0x18 /* 32 bits [htype 0 only] */ |
#define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */ |
#define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */ |
#define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */ |
#define PCI_BASE_ADDRESS_SPACE 0x01 /* 0 = memory, 1 = I/O */ |
#define PCI_BASE_ADDRESS_SPACE_IO 0x01 |
#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00 |
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06 |
#define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 /* 32 bit address */ |
#define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 /* Below 1M [obsolete] */ |
#define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */ |
#define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */ |
#define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL) |
#define PCI_BASE_ADDRESS_IO_MASK (~0x03UL) |
/* bit 1 is reserved if address_space = 1 */ |
#define PCI_ROM_ADDRESS1 0x38 /* Same as PCI_ROM_ADDRESS, but for htype 1 */ |
/* Header type 0 (normal devices) */ |
#define PCI_CARDBUS_CIS 0x28 |
#define PCI_SUBSYSTEM_VENDOR_ID 0x2c |
#define PCI_SUBSYSTEM_ID 0x2e |
#define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ |
#define PCI_ROM_ADDRESS_ENABLE 0x01 |
#define PCI_ROM_ADDRESS_MASK (~0x7ffUL) |
#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ |
#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ |
#define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40 |
#define PCI_CB_SUBSYSTEM_ID 0x42 |
#define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */ |
#define PCI_CB_CAPABILITY_LIST 0x14 |
/* Capability lists */ |
#define PCI_CAP_LIST_ID 0 /* Capability ID */ |
#define PCI_CAP_ID_PM 0x01 /* Power Management */ |
#define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */ |
#define PCI_CAP_ID_VPD 0x03 /* Vital Product Data */ |
#define PCI_CAP_ID_SLOTID 0x04 /* Slot Identification */ |
#define PCI_CAP_ID_MSI 0x05 /* Message Signalled Interrupts */ |
#define PCI_CAP_ID_CHSWP 0x06 /* CompactPCI HotSwap */ |
#define PCI_CAP_ID_PCIX 0x07 /* PCI-X */ |
#define PCI_CAP_ID_HT 0x08 /* HyperTransport */ |
#define PCI_CAP_ID_VNDR 0x09 /* Vendor specific capability */ |
#define PCI_CAP_ID_SHPC 0x0C /* PCI Standard Hot-Plug Controller */ |
#define PCI_CAP_ID_EXP 0x10 /* PCI Express */ |
#define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ |
#define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ |
#define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */ |
#define PCI_CAP_SIZEOF 4 |
/* AGP registers */ |
#define PCI_AGP_VERSION 2 /* BCD version number */ |
#define PCI_AGP_RFU 3 /* Rest of capability flags */ |
#define PCI_AGP_STATUS 4 /* Status register */ |
#define PCI_AGP_STATUS_RQ_MASK 0xff000000 /* Maximum number of requests - 1 */ |
#define PCI_AGP_STATUS_SBA 0x0200 /* Sideband addressing supported */ |
#define PCI_AGP_STATUS_64BIT 0x0020 /* 64-bit addressing supported */ |
#define PCI_AGP_STATUS_FW 0x0010 /* FW transfers supported */ |
#define PCI_AGP_STATUS_RATE4 0x0004 /* 4x transfer rate supported */ |
#define PCI_AGP_STATUS_RATE2 0x0002 /* 2x transfer rate supported */ |
#define PCI_AGP_STATUS_RATE1 0x0001 /* 1x transfer rate supported */ |
#define PCI_AGP_COMMAND 8 /* Control register */ |
#define PCI_AGP_COMMAND_RQ_MASK 0xff000000 /* Master: Maximum number of requests */ |
#define PCI_AGP_COMMAND_SBA 0x0200 /* Sideband addressing enabled */ |
#define PCI_AGP_COMMAND_AGP 0x0100 /* Allow processing of AGP transactions */ |
#define PCI_AGP_COMMAND_64BIT 0x0020 /* Allow processing of 64-bit addresses */ |
#define PCI_AGP_COMMAND_FW 0x0010 /* Force FW transfers */ |
#define PCI_AGP_COMMAND_RATE4 0x0004 /* Use 4x rate */ |
#define PCI_AGP_COMMAND_RATE2 0x0002 /* Use 2x rate */ |
#define PCI_AGP_COMMAND_RATE1 0x0001 /* Use 1x rate */ |
#define PCI_AGP_SIZEOF 12 |
#define PCI_MAP_REG_START 0x10 |
#define PCI_MAP_REG_END 0x28 |
#define PCI_MAP_ROM_REG 0x30 |
349,8 → 209,28 |
#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) |
#define PCI_FUNC(devfn) ((devfn) & 0x07) |
/* Ioctls for /proc/bus/pci/X/Y nodes. */ |
#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8) |
#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */ |
#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */ |
#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */ |
#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */ |
typedef unsigned int __bitwise pci_channel_state_t; |
enum pci_channel_state { |
/* I/O channel is in normal state */ |
pci_channel_io_normal = (__force pci_channel_state_t) 1, |
/* I/O to channel is blocked */ |
pci_channel_io_frozen = (__force pci_channel_state_t) 2, |
/* PCI card is dead */ |
pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, |
}; |
typedef unsigned int PCITAG; |
extern inline PCITAG |
359,83 → 239,44 |
return(PCI_MAKE_TAG(busnum,devnum,funcnum)); |
} |
/* This defines the direction arg to the DMA mapping routines. */ |
#define PCI_DMA_BIDIRECTIONAL 0 |
#define PCI_DMA_TODEVICE 1 |
#define PCI_DMA_FROMDEVICE 2 |
#define PCI_DMA_NONE 3 |
struct resource |
{ |
resource_size_t start; |
resource_size_t end; |
// const char *name; |
unsigned long flags; |
// struct resource *parent, *sibling, *child; |
}; |
/* |
* IO resources have these defined flags. |
* For PCI devices, the region numbers are assigned this way: |
*/ |
#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */ |
enum { |
/* #0-5: standard PCI resources */ |
PCI_STD_RESOURCES, |
PCI_STD_RESOURCE_END = 5, |
#define IORESOURCE_IO 0x00000100 /* Resource type */ |
#define IORESOURCE_MEM 0x00000200 |
#define IORESOURCE_IRQ 0x00000400 |
#define IORESOURCE_DMA 0x00000800 |
/* #6: expansion ROM resource */ |
PCI_ROM_RESOURCE, |
#define IORESOURCE_PREFETCH 0x00001000 /* No side effects */ |
#define IORESOURCE_READONLY 0x00002000 |
#define IORESOURCE_CACHEABLE 0x00004000 |
#define IORESOURCE_RANGELENGTH 0x00008000 |
#define IORESOURCE_SHADOWABLE 0x00010000 |
#define IORESOURCE_BUS_HAS_VGA 0x00080000 |
/* device specific resources */ |
#ifdef CONFIG_PCI_IOV |
PCI_IOV_RESOURCES, |
PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, |
#endif |
#define IORESOURCE_DISABLED 0x10000000 |
#define IORESOURCE_UNSET 0x20000000 |
#define IORESOURCE_AUTO 0x40000000 |
#define IORESOURCE_BUSY 0x80000000 /* Driver has marked this resource busy */ |
/* resources assigned to buses behind the bridge */ |
#define PCI_BRIDGE_RESOURCE_NUM 4 |
/* ISA PnP IRQ specific bits (IORESOURCE_BITS) */ |
#define IORESOURCE_IRQ_HIGHEDGE (1<<0) |
#define IORESOURCE_IRQ_LOWEDGE (1<<1) |
#define IORESOURCE_IRQ_HIGHLEVEL (1<<2) |
#define IORESOURCE_IRQ_LOWLEVEL (1<<3) |
#define IORESOURCE_IRQ_SHAREABLE (1<<4) |
PCI_BRIDGE_RESOURCES, |
PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES + |
PCI_BRIDGE_RESOURCE_NUM - 1, |
/* ISA PnP DMA specific bits (IORESOURCE_BITS) */ |
#define IORESOURCE_DMA_TYPE_MASK (3<<0) |
#define IORESOURCE_DMA_8BIT (0<<0) |
#define IORESOURCE_DMA_8AND16BIT (1<<0) |
#define IORESOURCE_DMA_16BIT (2<<0) |
/* total resources associated with a PCI device */ |
PCI_NUM_RESOURCES, |
#define IORESOURCE_DMA_MASTER (1<<2) |
#define IORESOURCE_DMA_BYTE (1<<3) |
#define IORESOURCE_DMA_WORD (1<<4) |
/* preserve this for compatibility */ |
DEVICE_COUNT_RESOURCE |
}; |
#define IORESOURCE_DMA_SPEED_MASK (3<<6) |
#define IORESOURCE_DMA_COMPATIBLE (0<<6) |
#define IORESOURCE_DMA_TYPEA (1<<6) |
#define IORESOURCE_DMA_TYPEB (2<<6) |
#define IORESOURCE_DMA_TYPEF (3<<6) |
/* ISA PnP memory I/O specific bits (IORESOURCE_BITS) */ |
#define IORESOURCE_MEM_WRITEABLE (1<<0) /* dup: IORESOURCE_READONLY */ |
#define IORESOURCE_MEM_CACHEABLE (1<<1) /* dup: IORESOURCE_CACHEABLE */ |
#define IORESOURCE_MEM_RANGELENGTH (1<<2) /* dup: IORESOURCE_RANGELENGTH */ |
#define IORESOURCE_MEM_TYPE_MASK (3<<3) |
#define IORESOURCE_MEM_8BIT (0<<3) |
#define IORESOURCE_MEM_16BIT (1<<3) |
#define IORESOURCE_MEM_8AND16BIT (2<<3) |
#define IORESOURCE_MEM_32BIT (3<<3) |
#define IORESOURCE_MEM_SHADOWABLE (1<<5) /* dup: IORESOURCE_SHADOWABLE */ |
#define IORESOURCE_MEM_EXPANSIONROM (1<<6) |
/* PCI ROM control bits (IORESOURCE_BITS) */ |
#define IORESOURCE_ROM_ENABLE (1<<0) /* ROM is enabled, same as PCI_ROM_ADDRESS_ENABLE */ |
#define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */ |
#define IORESOURCE_ROM_COPY (1<<2) /* ROM is alloc'd copy, resource field overlaid */ |
#define IORESOURCE_ROM_BIOS_COPY (1<<3) /* ROM is BIOS copy, resource field overlaid */ |
/* PCI control bits. Shares IORESOURCE_BITS with above PCI ROM. */ |
#define IORESOURCE_PCI_FIXED (1<<4) /* Do not move resource */ |
/* |
* For PCI devices, the region numbers are assigned this way: |
* |
454,32 → 295,56 |
#define DEVICE_COUNT_RESOURCE 12 |
#define PCI_CFG_SPACE_SIZE 256 |
#define PCI_CFG_SPACE_EXP_SIZE 4096 |
typedef int __bitwise pci_power_t; |
#define PCI_D0 ((pci_power_t __force) 0) |
#define PCI_D1 ((pci_power_t __force) 1) |
#define PCI_D2 ((pci_power_t __force) 2) |
#define PCI_D3hot ((pci_power_t __force) 3) |
#define PCI_D3cold ((pci_power_t __force) 4) |
#define PCI_UNKNOWN ((pci_power_t __force) 5) |
#define PCI_POWER_ERROR ((pci_power_t __force) -1) |
enum pci_bar_type { |
pci_bar_unknown, /* Standard PCI BAR probe */ |
pci_bar_io, /* An io port BAR */ |
pci_bar_mem32, /* A 32-bit memory BAR */ |
pci_bar_mem64, /* A 64-bit memory BAR */ |
}; |
/* |
* The pci_dev structure is used to describe PCI devices. |
*/ |
struct pci_dev { |
// struct list_head bus_list; /* node in per-bus list */ |
// struct pci_bus *bus; /* bus this device is on */ |
// struct pci_bus *subordinate; /* bus this device bridges to */ |
struct list_head bus_list; /* node in per-bus list */ |
struct pci_bus *bus; /* bus this device is on */ |
struct pci_bus *subordinate; /* bus this device bridges to */ |
// void *sysdata; /* hook for sys-specific extension */ |
void *sysdata; /* hook for sys-specific extension */ |
// struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ |
// struct pci_slot *slot; /* Physical slot this device is in */ |
u32_t bus; |
u32_t devfn; /* encoded device & function index */ |
u16_t vendor; |
u16_t device; |
u16_t subsystem_vendor; |
u16_t subsystem_device; |
u32_t class; /* 3 bytes: (base,sub,prog-if) */ |
uint8_t revision; /* PCI revision, low byte of class word */ |
uint8_t hdr_type; /* PCI header type (`multi' flag masked out) */ |
uint8_t pcie_type; /* PCI-E device/port type */ |
uint8_t rom_base_reg; /* which config register controls the ROM */ |
uint8_t pin; /* which interrupt pin this device uses */ |
struct pci_slot *slot; /* Physical slot this device is in */ |
u32_t busnr; |
unsigned int devfn; /* encoded device & function index */ |
unsigned short vendor; |
unsigned short device; |
unsigned short subsystem_vendor; |
unsigned short subsystem_device; |
unsigned int class; /* 3 bytes: (base,sub,prog-if) */ |
u8 revision; /* PCI revision, low byte of class word */ |
u8 hdr_type; /* PCI header type (`multi' flag masked out) */ |
u8 pcie_cap; /* PCI-E capability offset */ |
u8 pcie_type; /* PCI-E device/port type */ |
u8 rom_base_reg; /* which config register controls the ROM */ |
u8 pin; /* which interrupt pin this device uses */ |
// struct pci_driver *driver; /* which driver has allocated this device */ |
uint64_t dma_mask; /* Mask of the bits of bus address this |
u64 dma_mask; /* Mask of the bits of bus address this |
device implements. Normally this is |
0xffffffff. You only need to change |
this if your device has broken DMA |
487,22 → 352,29 |
// struct device_dma_parameters dma_parms; |
// pci_power_t current_state; /* Current operating state. In ACPI-speak, |
// this is D0-D3, D0 being fully functional, |
// and D3 being off. */ |
// int pm_cap; /* PM capability offset in the |
// configuration space */ |
pci_power_t current_state; /* Current operating state. In ACPI-speak, |
this is D0-D3, D0 being fully functional, |
and D3 being off. */ |
int pm_cap; /* PM capability offset in the |
configuration space */ |
unsigned int pme_support:5; /* Bitmask of states from which PME# |
can be generated */ |
unsigned int pme_interrupt:1; |
unsigned int d1_support:1; /* Low power state D1 is supported */ |
unsigned int d2_support:1; /* Low power state D2 is supported */ |
unsigned int no_d1d2:1; /* Only allow D0 and D3 */ |
unsigned int mmio_always_on:1; /* disallow turning off io/mem |
decoding during bar sizing */ |
unsigned int wakeup_prepared:1; |
unsigned int d3_delay; /* D3->D0 transition time in ms */ |
// pci_channel_state_t error_state; /* current connectivity state */ |
pci_channel_state_t error_state; /* current connectivity state */ |
struct device dev; /* Generic device interface */ |
// int cfg_size; /* Size of configuration space */ |
struct acpi_device *acpi_dev; |
int cfg_size; /* Size of configuration space */ |
/* |
* Instead of touching interrupt line and base address registers |
* directly, use the values stored here. They might be different! |
524,17 → 396,22 |
unsigned int msix_enabled:1; |
unsigned int ari_enabled:1; /* ARI forwarding */ |
unsigned int is_managed:1; |
unsigned int is_pcie:1; |
unsigned int is_pcie:1; /* Obsolete. Will be removed. |
Use pci_is_pcie() instead */ |
unsigned int needs_freset:1; /* Dev requires fundamental reset */ |
unsigned int state_saved:1; |
unsigned int is_physfn:1; |
unsigned int is_virtfn:1; |
// pci_dev_flags_t dev_flags; |
// atomic_t enable_cnt; /* pci_enable_device has been called */ |
unsigned int reset_fn:1; |
unsigned int is_hotplug_bridge:1; |
unsigned int __aer_firmware_first_valid:1; |
unsigned int __aer_firmware_first:1; |
// u32 saved_config_space[16]; /* config space saved at suspend time */ |
// struct hlist_head saved_cap_space; |
// struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ |
// int rom_attr_enabled; /* has display of the rom attribute been enabled? */ |
int rom_attr_enabled; /* has display of the rom attribute been enabled? */ |
// struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */ |
// struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */ |
}; |
550,9 → 427,14 |
(pci_resource_end((dev), (bar)) - \ |
pci_resource_start((dev), (bar)) + 1)) |
struct pci_device_id |
{ |
u16_t vendor, device; /* Vendor and device ID or PCI_ANY_ID*/ |
u16_t subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */ |
u32_t class, class_mask; /* (class,subclass,prog-if) triplet */ |
u32_t driver_data; /* Data private to the driver */ |
}; |
typedef struct |
{ |
struct list_head link; |
559,6 → 441,122 |
struct pci_dev pci_dev; |
}pci_dev_t; |
typedef unsigned short __bitwise pci_bus_flags_t; |
enum pci_bus_flags { |
PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, |
PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, |
}; |
struct pci_sysdata |
{ |
int domain; /* PCI domain */ |
int node; /* NUMA node */ |
#ifdef CONFIG_X86_64 |
void *iommu; /* IOMMU private data */ |
#endif |
}; |
struct pci_bus; |
struct pci_ops |
{ |
int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); |
int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); |
}; |
/* |
* The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond |
* to P2P or CardBus bridge windows) go in a table. Additional ones (for |
* buses below host bridges or subtractive decode bridges) go in the list. |
* Use pci_bus_for_each_resource() to iterate through all the resources. |
*/ |
/* |
* PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly |
* and there's no way to program the bridge with the details of the window. |
* This does not apply to ACPI _CRS windows, even with the _DEC subtractive- |
* decode bit set, because they are explicit and can be programmed with _SRS. |
*/ |
#define PCI_SUBTRACTIVE_DECODE 0x1 |
struct pci_bus_resource { |
struct list_head list; |
struct resource *res; |
unsigned int flags; |
}; |
#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ |
struct pci_bus { |
struct list_head node; /* node in list of buses */ |
struct pci_bus *parent; /* parent bus this bridge is on */ |
struct list_head children; /* list of child buses */ |
struct list_head devices; /* list of devices on this bus */ |
struct pci_dev *self; /* bridge device as seen by parent */ |
struct list_head slots; /* list of slots on this bus */ |
struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; |
struct list_head resources; /* address space routed to this bus */ |
struct pci_ops *ops; /* configuration access functions */ |
void *sysdata; /* hook for sys-specific extension */ |
unsigned char number; /* bus number */ |
unsigned char primary; /* number of primary bridge */ |
unsigned char secondary; /* number of secondary bridge */ |
unsigned char subordinate; /* max number of subordinate buses */ |
char name[48]; |
unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ |
pci_bus_flags_t bus_flags; /* Inherited by child busses */ |
// struct device *bridge; |
// struct device dev; |
// struct bin_attribute *legacy_io; /* legacy I/O for this bus */ |
// struct bin_attribute *legacy_mem; /* legacy mem */ |
unsigned int is_added:1; |
}; |
#define pci_bus_b(n) list_entry(n, struct pci_bus, node) |
#define to_pci_bus(n) container_of(n, struct pci_bus, dev) |
#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) |
#define to_pci_dev(n) container_of(n, struct pci_dev, dev) |
#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) |
static inline int pci_domain_nr(struct pci_bus *bus) |
{ |
struct pci_sysdata *sd = bus->sysdata; |
return sd->domain; |
} |
static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; } |
/* |
* Error values that may be returned by PCI functions. |
*/ |
#define PCIBIOS_SUCCESSFUL 0x00 |
#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 |
#define PCIBIOS_BAD_VENDOR_ID 0x83 |
#define PCIBIOS_DEVICE_NOT_FOUND 0x86 |
#define PCIBIOS_BAD_REGISTER_NUMBER 0x87 |
#define PCIBIOS_SET_FAILED 0x88 |
#define PCIBIOS_BUFFER_TOO_SMALL 0x89 |
/* Low-level architecture-dependent routines */ |
struct pci_bus_region { |
resource_size_t start; |
resource_size_t end; |
}; |
extern struct list_head pci_root_buses; /* list of all known PCI buses */ |
int enum_pci_devices(void); |
struct pci_device_id* |
568,9 → 566,100 |
int pci_set_dma_mask(struct pci_dev *dev, u64 mask); |
struct pci_bus * pci_create_bus(int bus, struct pci_ops *ops, void *sysdata); |
struct pci_bus * pci_find_bus(int domain, int busnr); |
int pci_find_capability(struct pci_dev *dev, int cap); |
int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); |
int pci_find_ext_capability(struct pci_dev *dev, int cap); |
int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn, |
int cap); |
int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); |
struct pci_bus * pci_find_next_bus(const struct pci_bus *from); |
unsigned int pci_scan_child_bus(struct pci_bus *bus); |
void pcibios_fixup_bus(struct pci_bus *b); |
u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin); |
#define pci_name(x) "radeon" |
struct pci_dev * pci_get_slot(struct pci_bus *bus, unsigned int devfn); |
static inline bool pci_is_root_bus(struct pci_bus *pbus) |
{ |
return !(pbus->parent); |
} |
/** |
* pci_pcie_cap - get the saved PCIe capability offset |
* @dev: PCI device |
* |
* PCIe capability offset is calculated at PCI device initialization |
* time and saved in the data structure. This function returns saved |
* PCIe capability offset. Using this instead of pci_find_capability() |
* reduces unnecessary search in the PCI configuration space. If you |
* need to calculate PCIe capability offset from raw device for some |
* reasons, please use pci_find_capability() instead. |
*/ |
static inline int pci_pcie_cap(struct pci_dev *dev) |
{ |
return dev->pcie_cap; |
} |
/** |
* pci_is_pcie - check if the PCI device is PCI Express capable |
* @dev: PCI device |
* |
* Retrun true if the PCI device is PCI Express capable, false otherwise. |
*/ |
static inline bool pci_is_pcie(struct pci_dev *dev) |
{ |
return !!pci_pcie_cap(dev); |
} |
int pci_read_config_dyte(struct pci_dev *dev, int where, u16 *val); |
int pci_read_config_word(struct pci_dev *dev, int where, u16 *val); |
int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val); |
static inline int pci_iov_init(struct pci_dev *dev) |
{ |
return -ENODEV; |
} |
static inline void pci_iov_release(struct pci_dev *dev) |
{ |
} |
static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno, |
enum pci_bar_type *type) |
{ |
return 0; |
} |
static inline void pci_restore_iov_state(struct pci_dev *dev) |
{ |
} |
static inline int pci_iov_bus_range(struct pci_bus *bus) |
{ |
return 0; |
} |
static inline int pci_enable_ats(struct pci_dev *dev, int ps) |
{ |
return -ENODEV; |
} |
static inline void pci_disable_ats(struct pci_dev *dev) |
{ |
} |
static inline int pci_ats_queue_depth(struct pci_dev *dev) |
{ |
return -ENODEV; |
} |
static inline int pci_ats_enabled(struct pci_dev *dev) |
{ |
return 0; |
} |
int acpi_get_irq(struct pci_dev *dev); |
#define pci_name(x) "" |
#endif //__PCI__H__ |
/drivers/include/linux/i2c.h |
---|
26,22 → 26,27 |
#ifndef _LINUX_I2C_H |
#define _LINUX_I2C_H |
#include <linux/types.h> |
#ifdef __KERNEL__ |
#include <types.h> |
#include <list.h> |
#include <linux/module.h> |
#include <linux/i2c-id.h> |
#include <linux/mod_devicetable.h> |
/* --- General options ------------------------------------------------ */ |
#define I2C_NAME_SIZE 20 |
#define I2C_MODULE_PREFIX "i2c:" |
struct i2c_device_id { |
char name[I2C_NAME_SIZE]; |
u32 driver_data /* Data private to the driver */ |
__attribute__((aligned(sizeof(u32)))); |
}; |
struct i2c_msg; |
struct i2c_algorithm; |
struct i2c_adapter; |
struct i2c_client; |
struct i2c_driver; |
union i2c_smbus_data; |
struct i2c_board_info; |
/* Transfer num messages. |
59,7 → 64,6 |
* @shutdown: Callback for device shutdown |
* @suspend: Callback for device suspend |
* @resume: Callback for device resume |
* @alert: Alert callback, for example for the SMBus alert protocol |
* @command: Callback for bus-wide signaling (optional) |
* @driver: Device driver model driver |
* @id_table: List of I2C devices supported by this driver |
91,8 → 95,8 |
unsigned int class; |
/* Notifies the driver that a new bus has appeared or is about to be |
* removed. You should avoid using this, it will be removed in a |
* near future. |
* removed. You should avoid using this if you can, it will probably |
* be removed in a near future. |
*/ |
int (*attach_adapter)(struct i2c_adapter *); |
int (*detach_adapter)(struct i2c_adapter *); |
154,8 → 158,8 |
char name[I2C_NAME_SIZE]; |
struct i2c_adapter *adapter; /* the adapter we sit on */ |
struct i2c_driver *driver; /* and our access routines */ |
struct device dev; /* the device structure */ |
int irq; /* irq issued by device */ |
// struct device dev; /* the device structure */ |
int irq; /* irq issued by device (or -1) */ |
struct list_head detected; |
}; |
#define to_i2c_client(d) container_of(d, struct i2c_client, dev) |
162,51 → 166,6 |
extern struct i2c_client *i2c_verify_client(struct device *dev); |
/** |
* struct i2c_board_info - template for device creation |
* @type: chip type, to initialize i2c_client.name |
* @flags: to initialize i2c_client.flags |
* @addr: stored in i2c_client.addr |
* @platform_data: stored in i2c_client.dev.platform_data |
* @archdata: copied into i2c_client.dev.archdata |
* @of_node: pointer to OpenFirmware device node |
* @irq: stored in i2c_client.irq |
* |
* I2C doesn't actually support hardware probing, although controllers and |
* devices may be able to use I2C_SMBUS_QUICK to tell whether or not there's |
* a device at a given address. Drivers commonly need more information than |
* that, such as chip type, configuration, associated IRQ, and so on. |
* |
* i2c_board_info is used to build tables of information listing I2C devices |
* that are present. This information is used to grow the driver model tree. |
* For mainboards this is done statically using i2c_register_board_info(); |
* bus numbers identify adapters that aren't yet available. For add-on boards, |
* i2c_new_device() does this dynamically with the adapter already known. |
*/ |
struct i2c_board_info { |
char type[I2C_NAME_SIZE]; |
unsigned short flags; |
unsigned short addr; |
void *platform_data; |
struct dev_archdata *archdata; |
#ifdef CONFIG_OF |
struct device_node *of_node; |
#endif |
int irq; |
}; |
/** |
* I2C_BOARD_INFO - macro used to list an i2c device and its address |
* @dev_type: identifies the device type |
* @dev_addr: the device's address on the bus. |
* |
* This macro initializes essential fields of a struct i2c_board_info, |
* declaring what has been provided on a particular board. Optional |
* fields (such as associated irq, or device-specific platform_data) |
* are provided using conventional syntax. |
*/ |
#define I2C_BOARD_INFO(dev_type, dev_addr) \ |
.type = dev_type, .addr = (dev_addr) |
/* |
* The following structs are for those who like to implement new bus drivers: |
* i2c_algorithm is the interface to a class of hardware solutions which can |
235,7 → 194,7 |
* with the access algorithms necessary to access it. |
*/ |
struct i2c_adapter { |
struct module *owner; |
unsigned int id; |
unsigned int class; /* classes to allow probing for */ |
const struct i2c_algorithm *algo; /* the algorithm to access the bus */ |
void *algo_data; |
252,7 → 211,7 |
}; |
#define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev) |
static inline void *i2c_get_adapdata(const struct i2c_adapter *dev) |
static inline void *i2c_get_adapdata(struct i2c_adapter *dev) |
{ |
return dev_get_drvdata(&dev->dev); |
} |
262,10 → 221,6 |
dev_set_drvdata(&dev->dev, data); |
} |
/* Adapter locking functions, exported for shared pin cases */ |
void i2c_lock_adapter(struct i2c_adapter *); |
void i2c_unlock_adapter(struct i2c_adapter *); |
/*flags for the client struct: */ |
#define I2C_CLIENT_PEC 0x04 /* Use Packet Error Checking */ |
#define I2C_CLIENT_TEN 0x10 /* we have a ten bit chip address */ |
274,8 → 229,10 |
/* i2c adapter classes (bitmask) */ |
#define I2C_CLASS_HWMON (1<<0) /* lm_sensors, ... */ |
#define I2C_CLASS_TV_ANALOG (1<<1) /* bttv + friends */ |
#define I2C_CLASS_TV_DIGITAL (1<<2) /* dvb cards */ |
#define I2C_CLASS_DDC (1<<3) /* DDC bus on graphics adapters */ |
#define I2C_CLASS_SPD (1<<7) /* Memory modules */ |
#define I2C_CLASS_SPD (1<<7) /* SPD EEPROMs and similar */ |
/* Internal numbers to terminate lists */ |
#define I2C_CLIENT_END 0xfffeU |
288,7 → 245,6 |
((const unsigned short []){ addr, ## addrs, I2C_CLIENT_END }) |
#endif /* __KERNEL__ */ |
/** |
* struct i2c_msg - an I2C transaction segment beginning with START |
* @addr: Slave address, either seven or ten bits. When this is a ten |
326,8 → 282,8 |
* need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR). |
*/ |
struct i2c_msg { |
__u16 addr; /* slave address */ |
__u16 flags; |
u16 addr; /* slave address */ |
u16 flags; |
#define I2C_M_TEN 0x0010 /* this is a ten bit chip address */ |
#define I2C_M_RD 0x0001 /* read data, from slave to master */ |
#define I2C_M_NOSTART 0x4000 /* if I2C_FUNC_PROTOCOL_MANGLING */ |
335,8 → 291,8 |
#define I2C_M_IGNORE_NAK 0x1000 /* if I2C_FUNC_PROTOCOL_MANGLING */ |
#define I2C_M_NO_RD_ACK 0x0800 /* if I2C_FUNC_PROTOCOL_MANGLING */ |
#define I2C_M_RECV_LEN 0x0400 /* length will be first received byte */ |
__u16 len; /* msg length */ |
__u8 *buf; /* pointer to msg data */ |
u16 len; /* msg length */ |
u8 *buf; /* pointer to msg data */ |
}; |
/* To determine what functionality is present */ |
/drivers/include/linux/types.h |
---|
8,10 → 8,7 |
#define DECLARE_BITMAP(name,bits) \ |
unsigned long name[BITS_TO_LONGS(bits)] |
#else |
#ifndef __EXPORTED_HEADERS__ |
#warning "Attempt to use kernel headers from user space, see http://kernelnewbies.org/KernelHeaders" |
#endif /* __EXPORTED_HEADERS__ */ |
#endif |
#include <linux/posix_types.h> |
178,19 → 175,6 |
typedef __u16 __bitwise __sum16; |
typedef __u32 __bitwise __wsum; |
/* |
* aligned_u64 should be used in defining kernel<->userspace ABIs to avoid |
* common 32/64-bit compat problems. |
* 64-bit values align to 4-byte boundaries on x86_32 (and possibly other |
* architectures) and to 8-byte boundaries on 64-bit architetures. The new |
* aligned_64 type enforces 8-byte alignment so that structs containing |
* aligned_64 values have the same alignment on 32-bit and 64-bit architectures. |
* No conversions are necessary between 32-bit user-space and a 64-bit kernel. |
*/ |
#define __aligned_u64 __u64 __attribute__((aligned(8))) |
#define __aligned_be64 __be64 __attribute__((aligned(8))) |
#define __aligned_le64 __le64 __attribute__((aligned(8))) |
#ifdef __KERNEL__ |
typedef unsigned __bitwise__ gfp_t; |
typedef unsigned __bitwise__ fmode_t; |
204,27 → 188,15 |
typedef phys_addr_t resource_size_t; |
typedef struct { |
int counter; |
volatile int counter; |
} atomic_t; |
#ifdef CONFIG_64BIT |
typedef struct { |
long counter; |
volatile long counter; |
} atomic64_t; |
#endif |
struct list_head { |
struct list_head *next, *prev; |
}; |
struct hlist_head { |
struct hlist_node *first; |
}; |
struct hlist_node { |
struct hlist_node *next, **pprev; |
}; |
struct ustat { |
__kernel_daddr_t f_tfree; |
__kernel_ino_t f_tinode; |
271,6 → 243,8 |
#define BUILD_BUG_ON_ZERO(e) (sizeof(char[1 - 2 * !!(e)]) - 1) |
#define __must_be_array(a) \ |
BUILD_BUG_ON_ZERO(__builtin_types_compatible_p(typeof(a), typeof(&a[0]))) |
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr)) |
300,7 → 274,6 |
int dbgprintf(const char* format, ...); |
#define GFP_KERNEL 0 |
#define GFP_ATOMIC 0 |
//#include <stdio.h> |
357,16 → 330,6 |
#define ENTER() dbgprintf("enter %s\n",__FUNCTION__) |
#define LEAVE() dbgprintf("leave %s\n",__FUNCTION__) |
struct timeval |
{ |
__kernel_time_t tv_sec; /* seconds */ |
__kernel_suseconds_t tv_usec; /* microseconds */ |
}; |
#define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159 |
#endif /* _LINUX_TYPES_H */ |
/drivers/include/linux/mutex.h |
---|
10,6 → 10,7 |
#ifndef __LINUX_MUTEX_H |
#define __LINUX_MUTEX_H |
#include <kernel.h> |
#include <linux/list.h> |
#include <asm/atomic.h> |
56,6 → 57,14 |
int *task; |
}; |
#define __MUTEX_INITIALIZER(lockname) \ |
{ .count = ATOMIC_INIT(1) \ |
, .wait_list = LIST_HEAD_INIT(lockname.wait_list) } |
#define DEFINE_MUTEX(mutexname) \ |
struct mutex mutexname = __MUTEX_INITIALIZER(mutexname) |
void __attribute__ ((fastcall)) __attribute__ ((dllimport)) |
mutex_init(struct mutex*)__asm__("MutexInit"); |
void __attribute__ ((fastcall)) __attribute__ ((dllimport)) |
/drivers/include/linux/bitmap.h |
---|
42,9 → 42,6 |
* bitmap_empty(src, nbits) Are all bits zero in *src? |
* bitmap_full(src, nbits) Are all bits set in *src? |
* bitmap_weight(src, nbits) Hamming Weight: number set bits |
* bitmap_set(dst, pos, nbits) Set specified bit area |
* bitmap_clear(dst, pos, nbits) Clear specified bit area |
* bitmap_find_next_zero_area(buf, len, pos, n, mask) Find bit free area |
* bitmap_shift_right(dst, src, n, nbits) *dst = *src >> n |
* bitmap_shift_left(dst, src, n, nbits) *dst = *src << n |
* bitmap_remap(dst, src, old, new, nbits) *dst = map(old, new)(src) |
111,14 → 108,6 |
const unsigned long *bitmap2, int bits); |
extern int __bitmap_weight(const unsigned long *bitmap, int bits); |
extern void bitmap_set(unsigned long *map, int i, int len); |
extern void bitmap_clear(unsigned long *map, int start, int nr); |
extern unsigned long bitmap_find_next_zero_area(unsigned long *map, |
unsigned long size, |
unsigned long start, |
unsigned int nr, |
unsigned long align_mask); |
extern int bitmap_scnprintf(char *buf, unsigned int len, |
const unsigned long *src, int nbits); |
extern int __bitmap_parse(const char *buf, unsigned int buflen, int is_user, |
/drivers/include/linux/bitops.h |
---|
1,20 → 1,12 |
#ifndef _LINUX_BITOPS_H |
#define _LINUX_BITOPS_H |
#include <asm/types.h> |
#ifdef __KERNEL__ |
#define BIT(nr) (1UL << (nr)) |
#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) |
#define BIT_WORD(nr) ((nr) / BITS_PER_LONG) |
#define BITS_PER_BYTE 8 |
#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) |
#endif |
extern unsigned int __sw_hweight8(unsigned int w); |
extern unsigned int __sw_hweight16(unsigned int w); |
extern unsigned int __sw_hweight32(unsigned int w); |
extern unsigned long __sw_hweight64(__u64 w); |
/* |
* Include this here because some architectures need generic_ffs/fls in |
* scope |
21,11 → 13,12 |
*/ |
#include <asm/bitops.h> |
#define for_each_set_bit(bit, addr, size) \ |
#define for_each_bit(bit, addr, size) \ |
for ((bit) = find_first_bit((addr), (size)); \ |
(bit) < (size); \ |
(bit) = find_next_bit((addr), (size), (bit) + 1)) |
static __inline__ int get_bitmask_order(unsigned int count) |
{ |
int order; |
136,7 → 129,29 |
} |
#ifdef __KERNEL__ |
#ifdef CONFIG_GENERIC_FIND_FIRST_BIT |
/** |
* find_first_bit - find the first set bit in a memory region |
* @addr: The address to start the search at |
* @size: The maximum size to search |
* |
* Returns the bit number of the first set bit. |
*/ |
extern unsigned long find_first_bit(const unsigned long *addr, |
unsigned long size); |
/** |
* find_first_zero_bit - find the first cleared bit in a memory region |
* @addr: The address to start the search at |
* @size: The maximum size to search |
* |
* Returns the bit number of the first cleared bit. |
*/ |
extern unsigned long find_first_zero_bit(const unsigned long *addr, |
unsigned long size); |
#endif /* CONFIG_GENERIC_FIND_FIRST_BIT */ |
#ifdef CONFIG_GENERIC_FIND_LAST_BIT |
/** |
* find_last_bit - find the last set bit in a memory region |
149,5 → 164,28 |
unsigned long size); |
#endif /* CONFIG_GENERIC_FIND_LAST_BIT */ |
#ifdef CONFIG_GENERIC_FIND_NEXT_BIT |
/** |
* find_next_bit - find the next set bit in a memory region |
* @addr: The address to base the search on |
* @offset: The bitnumber to start searching at |
* @size: The bitmap size in bits |
*/ |
extern unsigned long find_next_bit(const unsigned long *addr, |
unsigned long size, unsigned long offset); |
/** |
* find_next_zero_bit - find the next cleared bit in a memory region |
* @addr: The address to base the search on |
* @offset: The bitnumber to start searching at |
* @size: The bitmap size in bits |
*/ |
extern unsigned long find_next_zero_bit(const unsigned long *addr, |
unsigned long size, |
unsigned long offset); |
#endif /* CONFIG_GENERIC_FIND_NEXT_BIT */ |
#endif /* __KERNEL__ */ |
#endif |
/drivers/include/linux/compiler-gcc.h |
---|
35,7 → 35,8 |
(typeof(ptr)) (__ptr + (off)); }) |
/* &a[0] degrades to a pointer: a different type from an array */ |
#define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0])) |
#define __must_be_array(a) \ |
BUILD_BUG_ON_ZERO(__builtin_types_compatible_p(typeof(a), typeof(&a[0]))) |
/* |
* Force always-inline if the user requests it so via the .config, |
57,12 → 58,8 |
* naked functions because then mcount is called without stack and frame pointer |
* being set up and there is no chance to restore the lr register to the value |
* before mcount was called. |
* |
* The asm() bodies of naked functions often depend on standard calling conventions, |
* therefore they must be noinline and noclone. GCC 4.[56] currently fail to enforce |
* this, so we must do so ourselves. See GCC PR44290. |
*/ |
#define __naked __attribute__((naked)) noinline __noclone notrace |
#define __naked __attribute__((naked)) notrace |
#define __noreturn __attribute__((noreturn)) |
88,7 → 85,3 |
#define _gcc_header(x) __gcc_header(linux/compiler-gcc##x.h) |
#define gcc_header(x) _gcc_header(x) |
#include gcc_header(__GNUC__) |
#if !defined(__noclone) |
#define __noclone /* not needed */ |
#endif |
/drivers/include/linux/compiler-gcc4.h |
---|
48,10 → 48,6 |
* unreleased. Really, we need to have autoconf for the kernel. |
*/ |
#define unreachable() __builtin_unreachable() |
/* Mark a function definition as prohibited from being cloned. */ |
#define __noclone __attribute__((__noclone__)) |
#endif |
#endif |
/drivers/include/linux/compiler.h |
---|
5,7 → 5,7 |
#ifdef __CHECKER__ |
# define __user __attribute__((noderef, address_space(1))) |
# define __kernel __attribute__((address_space(0))) |
# define __kernel /* default address space */ |
# define __safe __attribute__((safe)) |
# define __force __attribute__((force)) |
# define __nocast __attribute__((nocast)) |
15,12 → 15,6 |
# define __acquire(x) __context__(x,1) |
# define __release(x) __context__(x,-1) |
# define __cond_lock(x,c) ((c) ? ({ __acquire(x); 1; }) : 0) |
# define __percpu __attribute__((noderef, address_space(3))) |
#ifdef CONFIG_SPARSE_RCU_POINTER |
# define __rcu __attribute__((noderef, address_space(4))) |
#else |
# define __rcu |
#endif |
extern void __chk_user_ptr(const volatile void __user *); |
extern void __chk_io_ptr(const volatile void __iomem *); |
#else |
38,8 → 32,6 |
# define __acquire(x) (void)0 |
# define __release(x) (void)0 |
# define __cond_lock(x,c) (c) |
# define __percpu |
# define __rcu |
#endif |
#ifdef __KERNEL__ |
/drivers/include/linux/fb.h |
---|
2,6 → 2,7 |
#define _LINUX_FB_H |
#include <linux/types.h> |
#include <list.h> |
#include <linux/i2c.h> |
struct dentry; |
10,34 → 11,6 |
#define FB_MAX 32 /* sufficient for now */ |
/* ioctls |
0x46 is 'F' */ |
#define FBIOGET_VSCREENINFO 0x4600 |
#define FBIOPUT_VSCREENINFO 0x4601 |
#define FBIOGET_FSCREENINFO 0x4602 |
#define FBIOGETCMAP 0x4604 |
#define FBIOPUTCMAP 0x4605 |
#define FBIOPAN_DISPLAY 0x4606 |
#ifdef __KERNEL__ |
#define FBIO_CURSOR _IOWR('F', 0x08, struct fb_cursor_user) |
#else |
#define FBIO_CURSOR _IOWR('F', 0x08, struct fb_cursor) |
#endif |
/* 0x4607-0x460B are defined below */ |
/* #define FBIOGET_MONITORSPEC 0x460C */ |
/* #define FBIOPUT_MONITORSPEC 0x460D */ |
/* #define FBIOSWITCH_MONIBIT 0x460E */ |
#define FBIOGET_CON2FBMAP 0x460F |
#define FBIOPUT_CON2FBMAP 0x4610 |
#define FBIOBLANK 0x4611 /* arg: 0 or vesa level + 1 */ |
#define FBIOGET_VBLANK _IOR('F', 0x12, struct fb_vblank) |
#define FBIO_ALLOC 0x4613 |
#define FBIO_FREE 0x4614 |
#define FBIOGET_GLYPH 0x4615 |
#define FBIOGET_HWCINFO 0x4616 |
#define FBIOPUT_MODEINFO 0x4617 |
#define FBIOGET_DISPINFO 0x4618 |
#define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32) |
#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */ |
#define FB_TYPE_PLANES 1 /* Non interleaved planes */ |
402,14 → 375,13 |
//#include <linux/workqueue.h> |
//#include <linux/notifier.h> |
#include <linux/list.h> |
#include <linux/mutex.h> |
//#include <linux/backlight.h> |
//#include <asm/io.h> |
struct vm_area_struct; |
struct fb_info; |
struct device; |
struct file; |
//struct vm_area_struct; |
//struct fb_info; |
//struct device; |
//struct file; |
/* Definitions below are used in the parsed monitor specs */ |
#define FB_DPMS_ACTIVE_OFF 1 |
436,6 → 408,7 |
#define FB_MISC_PRIM_COLOR 1 |
#define FB_MISC_1ST_DETAIL 2 /* First Detailed Timing is preferred */ |
struct fb_chroma { |
__u32 redx; /* in fraction of 1024 */ |
__u32 greenx; |
544,8 → 517,6 |
#define FB_EVENT_GET_REQ 0x0D |
/* Unbind from the console if possible */ |
#define FB_EVENT_FB_UNBIND 0x0E |
/* CONSOLE-SPECIFIC: remap all consoles to new fb - for vga switcheroo */ |
#define FB_EVENT_REMAP_ALL_CONSOLE 0x0F |
struct fb_event { |
struct fb_info *info; |
606,12 → 577,6 |
* LOCKING NOTE: those functions must _ALL_ be called with the console |
* semaphore held, this is the only suitable locking mechanism we have |
* in 2.6. Some may be called at interrupt time at this point though. |
* |
* The exception to this is the debug related hooks. Putting the fb |
* into a debug state (e.g. flipping to the kernel console) and restoring |
* it must be done in a lock-free manner, so low level drivers should |
* keep track of the initial console (if applicable) and may need to |
* perform direct, unlocked hardware writes in these hooks. |
*/ |
struct fb_ops { |
769,7 → 734,6 |
* takes over; acceleration engine should be in a quiescent state */ |
/* hints */ |
#define FBINFO_VIRTFB 0x0004 /* FB is System RAM, not device. */ |
#define FBINFO_PARTIAL_PAN_OK 0x0040 /* otw use pan only for double-buffering */ |
#define FBINFO_READS_FAST 0x0080 /* soft-copy faster than rendering */ |
791,6 → 755,8 |
#define FBINFO_MISC_USEREVENT 0x10000 /* event request |
from userspace */ |
#define FBINFO_MISC_TILEBLITTING 0x20000 /* use tile blitting */ |
#define FBINFO_MISC_FIRMWARE 0x40000 /* a replaceable firmware |
inited framebuffer */ |
/* A driver may set this flag to indicate that it does want a set_par to be |
* called every time when fbcon_switch is executed. The advantage is that with |
804,8 → 770,6 |
*/ |
#define FBINFO_MISC_ALWAYS_SETPAR 0x40000 |
/* where the fb is a firmware driver, and can be replaced with a proper one */ |
#define FBINFO_MISC_FIRMWARE 0x80000 |
/* |
* Host and GPU endianness differ. |
*/ |
817,15 → 781,11 |
*/ |
#define FBINFO_BE_MATH 0x100000 |
/* report to the VT layer that this fb driver can accept forced console |
output like oopses */ |
#define FBINFO_CAN_FORCE_OUTPUT 0x200000 |
struct fb_info { |
int node; |
int flags; |
struct mutex lock; /* Lock for open/release/ioctl funcs */ |
struct mutex mm_lock; /* Lock for fb_mmap and smem_* fields */ |
// struct mutex lock; /* Lock for open/release/ioctl funcs */ |
// struct mutex mm_lock; /* Lock for fb_mmap and smem_* fields */ |
struct fb_var_screeninfo var; /* Current var */ |
struct fb_fix_screeninfo fix; /* Current fix */ |
struct fb_monspecs monspecs; /* Current Monitor specs */ |
852,8 → 812,8 |
#endif |
struct fb_ops *fbops; |
struct device *device; /* This is the parent */ |
struct device *dev; /* This is this fb device */ |
// struct device *device; /* This is the parent */ |
// struct device *dev; /* This is this fb device */ |
int class_flag; /* private sysfs flags */ |
#ifdef CONFIG_FB_TILEBLITTING |
struct fb_tile_ops *tileops; /* Tile Blitting */ |
870,24 → 830,10 |
/* we need the PCI or similiar aperture base/size not |
smem_start/size as smem_start may just be an object |
allocated inside the aperture so may not actually overlap */ |
struct apertures_struct { |
unsigned int count; |
struct aperture { |
resource_size_t base; |
resource_size_t size; |
} ranges[0]; |
} *apertures; |
resource_size_t aperture_base; |
resource_size_t aperture_size; |
}; |
static inline struct apertures_struct *alloc_apertures(unsigned int max_num) { |
struct apertures_struct *a = kzalloc(sizeof(struct apertures_struct) |
+ max_num * sizeof(struct aperture), GFP_KERNEL); |
if (!a) |
return NULL; |
a->count = max_num; |
return a; |
} |
#ifdef MODULE |
#define FBINFO_DEFAULT FBINFO_MODULE |
#else |
906,42 → 852,6 |
*/ |
#define STUPID_ACCELF_TEXT_SHIT |
// This will go away |
#if defined(__sparc__) |
/* We map all of our framebuffers such that big-endian accesses |
* are what we want, so the following is sufficient. |
*/ |
// This will go away |
#define fb_readb sbus_readb |
#define fb_readw sbus_readw |
#define fb_readl sbus_readl |
#define fb_readq sbus_readq |
#define fb_writeb sbus_writeb |
#define fb_writew sbus_writew |
#define fb_writel sbus_writel |
#define fb_writeq sbus_writeq |
#define fb_memset sbus_memset_io |
#define fb_memcpy_fromfb sbus_memcpy_fromio |
#define fb_memcpy_tofb sbus_memcpy_toio |
#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || defined(__sh__) || defined(__powerpc__) || defined(__avr32__) || defined(__bfin__) |
#define fb_readb __raw_readb |
#define fb_readw __raw_readw |
#define fb_readl __raw_readl |
#define fb_readq __raw_readq |
#define fb_writeb __raw_writeb |
#define fb_writew __raw_writew |
#define fb_writel __raw_writel |
#define fb_writeq __raw_writeq |
#define fb_memset memset_io |
#define fb_memcpy_fromfb memcpy_fromio |
#define fb_memcpy_tofb memcpy_toio |
#else |
#define fb_readb(addr) (*(volatile u8 *) (addr)) |
#define fb_readw(addr) (*(volatile u16 *) (addr)) |
#define fb_readl(addr) (*(volatile u32 *) (addr)) |
951,11 → 861,7 |
#define fb_writel(b,addr) (*(volatile u32 *) (addr) = (b)) |
#define fb_writeq(b,addr) (*(volatile u64 *) (addr) = (b)) |
#define fb_memset memset |
#define fb_memcpy_fromfb memcpy |
#define fb_memcpy_tofb memcpy |
#endif |
#define FB_LEFT_POS(p, bpp) (fb_be_math(p) ? (32 - (bpp)) : 0) |
#define FB_SHIFT_HIGH(p, val, bits) (fb_be_math(p) ? (val) >> (bits) : \ |
(val) << (bits)) |
986,8 → 892,6 |
/* drivers/video/fbmem.c */ |
extern int register_framebuffer(struct fb_info *fb_info); |
extern int unregister_framebuffer(struct fb_info *fb_info); |
extern void remove_conflicting_framebuffers(struct apertures_struct *a, |
const char *name, bool primary); |
extern int fb_prepare_logo(struct fb_info *fb_info, int rotate); |
extern int fb_show_logo(struct fb_info *fb_info, int rotate); |
extern char* fb_get_buffer_offset(struct fb_info *info, struct fb_pixmap *buf, u32 size); |
1008,7 → 912,7 |
static inline void unlock_fb_info(struct fb_info *info) |
{ |
mutex_unlock(&info->lock); |
// mutex_unlock(&info->lock); |
} |
static inline void __fb_pad_aligned_buffer(u8 *dst, u32 d_pitch, |
/drivers/include/linux/i2c-algo-bit.h |
---|
36,8 → 36,6 |
void (*setscl) (void *data, int state); |
int (*getsda) (void *data); |
int (*getscl) (void *data); |
int (*pre_xfer) (struct i2c_adapter *); |
void (*post_xfer) (struct i2c_adapter *); |
/* local settings */ |
int udelay; /* half clock cycle time in us, |
/drivers/include/linux/idr.h |
---|
12,8 → 12,10 |
#ifndef __IDR_H__ |
#define __IDR_H__ |
#include <linux/types.h> |
#include <linux/bitops.h> |
#include <types.h> |
#include <errno-base.h> |
//#include <linux/bitops.h> |
//#include <linux/init.h> |
//#include <linux/rcupdate.h> |
23,7 → 25,6 |
}; |
#if BITS_PER_LONG == 32 |
# define IDR_BITS 5 |
# define IDR_FULL 0xfffffffful |
/* We can only use two of the bits in the top level because there is |
30,16 → 31,6 |
only one possible bit in the top level (5 bits * 7 levels = 35 |
bits, but you only use 31 bits in the id). */ |
# define TOP_LEVEL_FULL (IDR_FULL >> 30) |
#elif BITS_PER_LONG == 64 |
# define IDR_BITS 6 |
# define IDR_FULL 0xfffffffffffffffful |
/* We can only use two of the bits in the top level because there is |
only one possible bit in the top level (6 bits * 6 levels = 36 |
bits, but you only use 31 bits in the id). */ |
# define TOP_LEVEL_FULL (IDR_FULL >> 62) |
#else |
# error "BITS_PER_LONG is not 32 or 64" |
#endif |
#define IDR_SIZE (1 << IDR_BITS) |
#define IDR_MASK ((1 << IDR_BITS)-1) |
56,7 → 47,7 |
struct idr_layer { |
unsigned long bitmap; /* A zero bit means "space here" */ |
struct idr_layer __rcu *ary[1<<IDR_BITS]; |
struct idr_layer *ary[1<<IDR_BITS]; |
int count; /* When zero, we can release it */ |
int layer; /* distance from leaf */ |
struct rcu_head rcu_head; |
63,7 → 54,7 |
}; |
struct idr { |
struct idr_layer __rcu *top; |
struct idr_layer *top; |
struct idr_layer *id_free; |
int layers; /* only valid without concurrent changes */ |
int id_free_cnt; |
87,7 → 78,6 |
#define _idr_rc_to_errno(rc) ((rc) == -1 ? -EAGAIN : -ENOSPC) |
/** |
* DOC: idr sync |
* idr synchronization (stolen from radix-tree.h) |
* |
* idr_find() is able to be called locklessly, using RCU. The caller must |
108,7 → 98,7 |
*/ |
void *idr_find(struct idr *idp, int id); |
int idr_pre_get(struct idr *idp, gfp_t gfp_mask); |
int idr_pre_get(struct idr *idp, u32_t gfp_mask); |
int idr_get_new(struct idr *idp, void *ptr, int *id); |
int idr_get_new_above(struct idr *idp, void *ptr, int starting_id, int *id); |
int idr_for_each(struct idr *idp, |
124,12 → 114,9 |
/* |
* IDA - IDR based id allocator, use when translation from id to |
* pointer isn't necessary. |
* |
* IDA_BITMAP_LONGS is calculated to be one less to accommodate |
* ida_bitmap->nr_busy so that the whole struct fits in 128 bytes. |
*/ |
#define IDA_CHUNK_SIZE 128 /* 128 bytes per chunk */ |
#define IDA_BITMAP_LONGS (IDA_CHUNK_SIZE / sizeof(long) - 1) |
#define IDA_BITMAP_LONGS (128 / sizeof(long) - 1) |
#define IDA_BITMAP_BITS (IDA_BITMAP_LONGS * sizeof(long) * 8) |
struct ida_bitmap { |
145,7 → 132,7 |
#define IDA_INIT(name) { .idr = IDR_INIT(name), .free_bitmap = NULL, } |
#define DEFINE_IDA(name) struct ida name = IDA_INIT(name) |
int ida_pre_get(struct ida *ida, gfp_t gfp_mask); |
int ida_pre_get(struct ida *ida, u32_t gfp_mask); |
int ida_get_new_above(struct ida *ida, int starting_id, int *p_id); |
int ida_get_new(struct ida *ida, int *p_id); |
void ida_remove(struct ida *ida, int id); |
/drivers/include/linux/kref.h |
---|
1,5 → 1,5 |
/* |
* kref.h - library routines for handling generic reference counted objects |
* kref.c - library routines for handling generic reference counted objects |
* |
* Copyright (C) 2004 Greg Kroah-Hartman <greg@kroah.com> |
* Copyright (C) 2004 IBM Corp. |
21,6 → 21,7 |
atomic_t refcount; |
}; |
void kref_set(struct kref *kref, int num); |
void kref_init(struct kref *kref); |
void kref_get(struct kref *kref); |
int kref_put(struct kref *kref, void (*release) (struct kref *kref)); |
/drivers/include/linux/list.h |
---|
1,12 → 1,11 |
#ifndef _LINUX_LIST_H |
#define _LINUX_LIST_H |
#include <linux/types.h> |
#include <linux/stddef.h> |
#include <linux/poison.h> |
//#include <linux/poison.h> |
//#include <linux/prefetch.h> |
//#include <asm/system.h> |
#define prefetch(x) __builtin_prefetch(x) |
/* |
* Simple doubly linked list implementation. |
* |
17,6 → 16,15 |
* using the generic single-entry routines. |
*/ |
#define LIST_POISON1 ((struct list_head*)0xFFFF0100) |
#define LIST_POISON2 ((struct list_head*)0xFFFF0200) |
#define prefetch(x) __builtin_prefetch(x) |
struct list_head { |
struct list_head *next, *prev; |
}; |
#define LIST_HEAD_INIT(name) { &(name), &(name) } |
#define LIST_HEAD(name) \ |
203,20 → 211,6 |
} |
/** |
* list_rotate_left - rotate the list to the left |
* @head: the head of the list |
*/ |
static inline void list_rotate_left(struct list_head *head) |
{ |
struct list_head *first; |
if (!list_empty(head)) { |
first = head->next; |
list_move_tail(first, head); |
} |
} |
/** |
* list_is_singular - tests whether a list has just one entry. |
* @head: the list to test. |
*/ |
495,7 → 489,7 |
pos = n, n = list_entry(n->member.next, typeof(*n), member)) |
/** |
* list_for_each_entry_safe_continue - continue list iteration safe against removal |
* list_for_each_entry_safe_continue |
* @pos: the type * to use as a loop cursor. |
* @n: another type * to use as temporary storage |
* @head: the head for your list. |
511,7 → 505,7 |
pos = n, n = list_entry(n->member.next, typeof(*n), member)) |
/** |
* list_for_each_entry_safe_from - iterate over list from current point safe against removal |
* list_for_each_entry_safe_from |
* @pos: the type * to use as a loop cursor. |
* @n: another type * to use as temporary storage |
* @head: the head for your list. |
526,7 → 520,7 |
pos = n, n = list_entry(n->member.next, typeof(*n), member)) |
/** |
* list_for_each_entry_safe_reverse - iterate backwards over list safe against removal |
* list_for_each_entry_safe_reverse |
* @pos: the type * to use as a loop cursor. |
* @n: another type * to use as temporary storage |
* @head: the head for your list. |
541,21 → 535,6 |
&pos->member != (head); \ |
pos = n, n = list_entry(n->member.prev, typeof(*n), member)) |
/** |
* list_safe_reset_next - reset a stale list_for_each_entry_safe loop |
* @pos: the loop cursor used in the list_for_each_entry_safe loop |
* @n: temporary storage used in list_for_each_entry_safe |
* @member: the name of the list_struct within the struct. |
* |
* list_safe_reset_next is not safe to use in general if the list may be |
* modified concurrently (eg. the lock is dropped in the loop body). An |
* exception to this is if the cursor element (pos) is pinned in the list, |
* and list_safe_reset_next is called after re-taking the lock and before |
* completing the current iteration of the loop body. |
*/ |
#define list_safe_reset_next(pos, n, member) \ |
n = list_entry(pos->member.next, typeof(*pos), member) |
/* |
* Double linked lists with a single pointer list head. |
* Mostly useful for hash tables where the two pointer list head is |
563,6 → 542,14 |
* You lose the ability to access the tail in O(1). |
*/ |
struct hlist_head { |
struct hlist_node *first; |
}; |
struct hlist_node { |
struct hlist_node *next, **pprev; |
}; |
#define HLIST_HEAD_INIT { .first = NULL } |
#define HLIST_HEAD(name) struct hlist_head name = { .first = NULL } |
#define INIT_HLIST_HEAD(ptr) ((ptr)->first = NULL) |
594,8 → 581,8 |
static inline void hlist_del(struct hlist_node *n) |
{ |
__hlist_del(n); |
n->next = LIST_POISON1; |
n->pprev = LIST_POISON2; |
n->next = (struct hlist_node*)LIST_POISON1; |
n->pprev = (struct hlist_node**)LIST_POISON2; |
} |
static inline void hlist_del_init(struct hlist_node *n) |
637,12 → 624,6 |
next->next->pprev = &next->next; |
} |
/* after that we'll appear to be on some hlist and hlist_del will work */ |
static inline void hlist_add_fake(struct hlist_node *n) |
{ |
n->pprev = &n->next; |
} |
/* |
* Move a list from one list head to another. Fixup the pprev |
* reference of the first entry if it exists. |
/drivers/include/linux/lockdep.h |
---|
28,17 → 28,6 |
#define MAX_LOCKDEP_SUBCLASSES 8UL |
/* |
* NR_LOCKDEP_CACHING_CLASSES ... Number of classes |
* cached in the instance of lockdep_map |
* |
* Currently main class (subclass == 0) and signle depth subclass |
* are cached in lockdep_map. This optimization is mainly targeting |
* on rq->lock. double_rq_lock() acquires this highly competitive with |
* single depth. |
*/ |
#define NR_LOCKDEP_CACHING_CLASSES 2 |
/* |
* Lock-classes are keyed via unique addresses, by embedding the |
* lockclass-key into the kernel (or module) .data section. (For |
* static locks we use the lock address itself as the key.) |
143,7 → 132,7 |
*/ |
struct lockdep_map { |
struct lock_class_key *key; |
struct lock_class *class_cache[NR_LOCKDEP_CACHING_CLASSES]; |
struct lock_class *class_cache; |
const char *name; |
#ifdef CONFIG_LOCK_STAT |
int cpu; |
277,9 → 266,6 |
#define lockdep_set_subclass(lock, sub) \ |
lockdep_init_map(&(lock)->dep_map, #lock, \ |
(lock)->dep_map.key, sub) |
#define lockdep_set_novalidate_class(lock) \ |
lockdep_set_class(lock, &__lockdep_no_validate__) |
/* |
* Compare locking classes |
*/ |
364,9 → 350,6 |
#define lockdep_set_class_and_subclass(lock, key, sub) \ |
do { (void)(key); } while (0) |
#define lockdep_set_subclass(lock, sub) do { } while (0) |
#define lockdep_set_novalidate_class(lock) do { } while (0) |
/* |
* We don't define lockdep_match_class() and lockdep_match_key() for !LOCKDEP |
* case since the result is not well defined and the caller should rather |
429,6 → 412,14 |
#endif /* CONFIG_LOCKDEP */ |
#ifdef CONFIG_GENERIC_HARDIRQS |
extern void early_init_irq_lock_class(void); |
#else |
static inline void early_init_irq_lock_class(void) |
{ |
} |
#endif |
#ifdef CONFIG_TRACE_IRQFLAGS |
extern void early_boot_irqs_off(void); |
extern void early_boot_irqs_on(void); |
543,8 → 534,4 |
# define might_lock_read(lock) do { } while (0) |
#endif |
#ifdef CONFIG_PROVE_RCU |
extern void lockdep_rcu_dereference(const char *file, const int line); |
#endif |
#endif /* __LINUX_LOCKDEP_H */ |
/drivers/include/linux/sched.h |
---|
1,7 → 1,6 |
/* stub */ |
/* |
static inline void mdelay(u32_t time) |
static inline void mdelay(unsigned long time) |
{ |
time /= 10; |
if(!time) time = 1; |
14,7 → 13,7 |
}; |
static inline void udelay(u32_t delay) |
static inline void udelay(unsigned long delay) |
{ |
if(!delay) delay++; |
delay*= 500; |
27,4 → 26,4 |
:::"eax","ebx","ecx","edx" ); |
} |
} |
*/ |
/drivers/include/linux/spinlock_api_up.h |
---|
16,7 → 16,7 |
#define in_lock_functions(ADDR) 0 |
#define assert_raw_spin_locked(lock) do { (void)(lock); } while (0) |
#define assert_spin_locked(lock) do { (void)(lock); } while (0) |
/* |
* In the UP-nondebug case there's no real locking going on, so the |
40,8 → 40,7 |
do { preempt_enable(); __release(lock); (void)(lock); } while (0) |
#define __UNLOCK_BH(lock) \ |
do { preempt_enable_no_resched(); local_bh_enable(); \ |
__release(lock); (void)(lock); } while (0) |
do { preempt_enable_no_resched(); local_bh_enable(); __release(lock); (void)(lock); } while (0) |
#define __UNLOCK_IRQ(lock) \ |
do { local_irq_enable(); __UNLOCK(lock); } while (0) |
/drivers/include/linux/string.h |
---|
62,21 → 62,10 |
#ifndef __HAVE_ARCH_STRRCHR |
extern char * strrchr(const char *,int); |
#endif |
extern char * __must_check skip_spaces(const char *); |
extern char *strim(char *); |
static inline __must_check char *strstrip(char *str) |
{ |
return strim(str); |
} |
extern char * __must_check strstrip(char *); |
#ifndef __HAVE_ARCH_STRSTR |
extern char * strstr(const char *, const char *); |
#endif |
#ifndef __HAVE_ARCH_STRNSTR |
extern char * strnstr(const char *, const char *, size_t); |
#endif |
#ifndef __HAVE_ARCH_STRLEN |
extern __kernel_size_t strlen(const char *); |
#endif |
/drivers/include/syscall.h |
---|
226,19 → 226,6 |
} |
} |
static inline void msleep(unsigned int msecs) |
{ |
msecs /= 10; |
if(!msecs) msecs = 1; |
__asm__ __volatile__ ( |
"call *__imp__Delay" |
::"b" (msecs)); |
__asm__ __volatile__ ( |
"":::"ebx"); |
}; |
static inline void mdelay(u32_t time) |
{ |
time /= 10; |
252,6 → 239,7 |
}; |
static inline u32_t __PciApi(int cmd) |
{ |
u32_t retval; |