47,7 → 47,6 |
void radeon_legacy_set_backlight_level(struct radeon_encoder *radeon_encoder, u8 level); |
u8 radeon_legacy_get_backlight_level(struct radeon_encoder *radeon_encoder); |
|
|
/* |
* r100,rv100,rs100,rv200,rs200 |
*/ |
68,13 → 67,14 |
int r100_asic_reset(struct radeon_device *rdev); |
u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); |
void r100_pci_gart_tlb_flush(struct radeon_device *rdev); |
int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i, |
uint64_t addr, uint32_t flags); |
void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
int r100_irq_set(struct radeon_device *rdev); |
int r100_irq_process(struct radeon_device *rdev); |
void r100_fence_ring_emit(struct radeon_device *rdev, |
struct radeon_fence *fence); |
void r100_semaphore_ring_emit(struct radeon_device *rdev, |
bool r100_semaphore_ring_emit(struct radeon_device *rdev, |
struct radeon_ring *cp, |
struct radeon_semaphore *semaphore, |
bool emit_wait); |
136,12 → 136,20 |
extern void r100_pm_finish(struct radeon_device *rdev); |
extern void r100_pm_init_profile(struct radeon_device *rdev); |
extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); |
extern void r100_pre_page_flip(struct radeon_device *rdev, int crtc); |
extern u32 r100_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
extern void r100_post_page_flip(struct radeon_device *rdev, int crtc); |
extern void r100_page_flip(struct radeon_device *rdev, int crtc, |
u64 crtc_base); |
extern bool r100_page_flip_pending(struct radeon_device *rdev, int crtc); |
extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc); |
extern int r100_mc_wait_for_idle(struct radeon_device *rdev); |
|
u32 r100_gfx_get_rptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
u32 r100_gfx_get_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void r100_gfx_set_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void r100_ring_hdp_flush(struct radeon_device *rdev, |
struct radeon_ring *ring); |
/* |
* r200,rv250,rs300,rv280 |
*/ |
165,7 → 173,8 |
struct radeon_fence *fence); |
extern int r300_cs_parse(struct radeon_cs_parser *p); |
extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev); |
extern int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i, |
uint64_t addr, uint32_t flags); |
extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
extern int rv370_get_pcie_lanes(struct radeon_device *rdev); |
extern void r300_set_reg_safe(struct radeon_device *rdev); |
200,7 → 209,8 |
extern int rs400_suspend(struct radeon_device *rdev); |
extern int rs400_resume(struct radeon_device *rdev); |
void rs400_gart_tlb_flush(struct radeon_device *rdev); |
int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
void rs400_gart_set_page(struct radeon_device *rdev, unsigned i, |
uint64_t addr, uint32_t flags); |
uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
int rs400_gart_init(struct radeon_device *rdev); |
223,7 → 233,8 |
void rs600_irq_disable(struct radeon_device *rdev); |
u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); |
void rs600_gart_tlb_flush(struct radeon_device *rdev); |
int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); |
void rs600_gart_set_page(struct radeon_device *rdev, unsigned i, |
uint64_t addr, uint32_t flags); |
uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
void rs600_bandwidth_update(struct radeon_device *rdev); |
235,9 → 246,9 |
extern void rs600_pm_misc(struct radeon_device *rdev); |
extern void rs600_pm_prepare(struct radeon_device *rdev); |
extern void rs600_pm_finish(struct radeon_device *rdev); |
extern void rs600_pre_page_flip(struct radeon_device *rdev, int crtc); |
extern u32 rs600_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
extern void rs600_post_page_flip(struct radeon_device *rdev, int crtc); |
extern void rs600_page_flip(struct radeon_device *rdev, int crtc, |
u64 crtc_base); |
extern bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc); |
void rs600_set_safe_registers(struct radeon_device *rdev); |
extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc); |
extern int rs600_mc_wait_for_idle(struct radeon_device *rdev); |
307,13 → 318,13 |
int r600_dma_cs_parse(struct radeon_cs_parser *p); |
void r600_fence_ring_emit(struct radeon_device *rdev, |
struct radeon_fence *fence); |
void r600_semaphore_ring_emit(struct radeon_device *rdev, |
bool r600_semaphore_ring_emit(struct radeon_device *rdev, |
struct radeon_ring *cp, |
struct radeon_semaphore *semaphore, |
bool emit_wait); |
void r600_dma_fence_ring_emit(struct radeon_device *rdev, |
struct radeon_fence *fence); |
void r600_dma_semaphore_ring_emit(struct radeon_device *rdev, |
bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev, |
struct radeon_ring *ring, |
struct radeon_semaphore *semaphore, |
bool emit_wait); |
330,8 → 341,7 |
void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
int r600_dma_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
int r600_uvd_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
int r600_copy_blit(struct radeon_device *rdev, |
int r600_copy_cpdma(struct radeon_device *rdev, |
uint64_t src_offset, uint64_t dst_offset, |
unsigned num_gpu_pages, struct radeon_fence **fence); |
int r600_copy_dma(struct radeon_device *rdev, |
342,7 → 352,7 |
bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
void r600_hpd_set_polarity(struct radeon_device *rdev, |
enum radeon_hpd_id hpd); |
extern void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo); |
extern void r600_mmio_hdp_flush(struct radeon_device *rdev); |
extern bool r600_gui_idle(struct radeon_device *rdev); |
extern void r600_pm_misc(struct radeon_device *rdev); |
extern void r600_pm_init_profile(struct radeon_device *rdev); |
362,9 → 372,13 |
int r600_mc_wait_for_idle(struct radeon_device *rdev); |
int r600_pcie_gart_init(struct radeon_device *rdev); |
void r600_scratch_init(struct radeon_device *rdev); |
int r600_blit_init(struct radeon_device *rdev); |
void r600_blit_fini(struct radeon_device *rdev); |
int r600_init_microcode(struct radeon_device *rdev); |
u32 r600_gfx_get_rptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
u32 r600_gfx_get_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void r600_gfx_set_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
/* r600 irq */ |
int r600_irq_process(struct radeon_device *rdev); |
int r600_irq_init(struct radeon_device *rdev); |
376,39 → 390,65 |
void r600_rlc_stop(struct radeon_device *rdev); |
/* r600 audio */ |
int r600_audio_init(struct radeon_device *rdev); |
struct r600_audio r600_audio_status(struct radeon_device *rdev); |
struct r600_audio_pin r600_audio_status(struct radeon_device *rdev); |
void r600_audio_fini(struct radeon_device *rdev); |
void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock); |
void r600_hdmi_update_avi_infoframe(struct drm_encoder *encoder, void *buffer, |
size_t size); |
void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock); |
void r600_hdmi_audio_workaround(struct drm_encoder *encoder); |
int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder); |
void r600_hdmi_update_audio_settings(struct drm_encoder *encoder); |
void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); |
void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
/* r600 blit */ |
int r600_blit_prepare_copy(struct radeon_device *rdev, unsigned num_gpu_pages, |
struct radeon_fence **fence, struct radeon_sa_bo **vb, |
struct radeon_semaphore **sem); |
void r600_blit_done_copy(struct radeon_device *rdev, struct radeon_fence **fence, |
struct radeon_sa_bo *vb, struct radeon_semaphore *sem); |
void r600_kms_blit_copy(struct radeon_device *rdev, |
u64 src_gpu_addr, u64 dst_gpu_addr, |
unsigned num_gpu_pages, |
struct radeon_sa_bo *vb); |
int r600_mc_wait_for_idle(struct radeon_device *rdev); |
u32 r600_get_xclk(struct radeon_device *rdev); |
uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); |
int rv6xx_get_temp(struct radeon_device *rdev); |
int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
int r600_dpm_pre_set_power_state(struct radeon_device *rdev); |
void r600_dpm_post_set_power_state(struct radeon_device *rdev); |
int r600_dpm_late_enable(struct radeon_device *rdev); |
/* r600 dma */ |
uint32_t r600_dma_get_rptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
uint32_t r600_dma_get_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void r600_dma_set_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
/* rv6xx dpm */ |
int rv6xx_dpm_init(struct radeon_device *rdev); |
int rv6xx_dpm_enable(struct radeon_device *rdev); |
void rv6xx_dpm_disable(struct radeon_device *rdev); |
int rv6xx_dpm_set_power_state(struct radeon_device *rdev); |
void rv6xx_setup_asic(struct radeon_device *rdev); |
void rv6xx_dpm_display_configuration_changed(struct radeon_device *rdev); |
void rv6xx_dpm_fini(struct radeon_device *rdev); |
u32 rv6xx_dpm_get_sclk(struct radeon_device *rdev, bool low); |
u32 rv6xx_dpm_get_mclk(struct radeon_device *rdev, bool low); |
void rv6xx_dpm_print_power_state(struct radeon_device *rdev, |
struct radeon_ps *ps); |
void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
struct seq_file *m); |
int rv6xx_dpm_force_performance_level(struct radeon_device *rdev, |
enum radeon_dpm_forced_level level); |
/* rs780 dpm */ |
int rs780_dpm_init(struct radeon_device *rdev); |
int rs780_dpm_enable(struct radeon_device *rdev); |
void rs780_dpm_disable(struct radeon_device *rdev); |
int rs780_dpm_set_power_state(struct radeon_device *rdev); |
void rs780_dpm_setup_asic(struct radeon_device *rdev); |
void rs780_dpm_display_configuration_changed(struct radeon_device *rdev); |
void rs780_dpm_fini(struct radeon_device *rdev); |
u32 rs780_dpm_get_sclk(struct radeon_device *rdev, bool low); |
u32 rs780_dpm_get_mclk(struct radeon_device *rdev, bool low); |
void rs780_dpm_print_power_state(struct radeon_device *rdev, |
struct radeon_ps *ps); |
void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
struct seq_file *m); |
int rs780_dpm_force_performance_level(struct radeon_device *rdev, |
enum radeon_dpm_forced_level level); |
|
/* uvd */ |
int r600_uvd_init(struct radeon_device *rdev); |
int r600_uvd_rbc_start(struct radeon_device *rdev); |
void r600_uvd_rbc_stop(struct radeon_device *rdev); |
int r600_uvd_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
void r600_uvd_fence_emit(struct radeon_device *rdev, |
struct radeon_fence *fence); |
void r600_uvd_semaphore_emit(struct radeon_device *rdev, |
struct radeon_ring *ring, |
struct radeon_semaphore *semaphore, |
bool emit_wait); |
void r600_uvd_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
|
/* |
* rv770,rv730,rv710,rv740 |
*/ |
417,7 → 457,8 |
int rv770_suspend(struct radeon_device *rdev); |
int rv770_resume(struct radeon_device *rdev); |
void rv770_pm_misc(struct radeon_device *rdev); |
u32 rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); |
void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); |
void r700_cp_stop(struct radeon_device *rdev); |
void r700_cp_fini(struct radeon_device *rdev); |
426,8 → 467,28 |
unsigned num_gpu_pages, |
struct radeon_fence **fence); |
u32 rv770_get_xclk(struct radeon_device *rdev); |
int rv770_uvd_resume(struct radeon_device *rdev); |
int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
int rv770_get_temp(struct radeon_device *rdev); |
/* hdmi */ |
void dce3_1_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
/* rv7xx pm */ |
int rv770_dpm_init(struct radeon_device *rdev); |
int rv770_dpm_enable(struct radeon_device *rdev); |
int rv770_dpm_late_enable(struct radeon_device *rdev); |
void rv770_dpm_disable(struct radeon_device *rdev); |
int rv770_dpm_set_power_state(struct radeon_device *rdev); |
void rv770_dpm_setup_asic(struct radeon_device *rdev); |
void rv770_dpm_display_configuration_changed(struct radeon_device *rdev); |
void rv770_dpm_fini(struct radeon_device *rdev); |
u32 rv770_dpm_get_sclk(struct radeon_device *rdev, bool low); |
u32 rv770_dpm_get_mclk(struct radeon_device *rdev, bool low); |
void rv770_dpm_print_power_state(struct radeon_device *rdev, |
struct radeon_ps *ps); |
void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
struct seq_file *m); |
int rv770_dpm_force_performance_level(struct radeon_device *rdev, |
enum radeon_dpm_forced_level level); |
bool rv770_dpm_vblank_too_short(struct radeon_device *rdev); |
|
/* |
* evergreen |
465,12 → 526,11 |
extern void btc_pm_init_profile(struct radeon_device *rdev); |
int sumo_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc); |
extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc); |
extern void evergreen_page_flip(struct radeon_device *rdev, int crtc, |
u64 crtc_base); |
extern bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc); |
extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc); |
void evergreen_disable_interrupt_state(struct radeon_device *rdev); |
int evergreen_blit_init(struct radeon_device *rdev); |
int evergreen_mc_wait_for_idle(struct radeon_device *rdev); |
void evergreen_dma_fence_ring_emit(struct radeon_device *rdev, |
struct radeon_fence *fence); |
482,6 → 542,48 |
struct radeon_fence **fence); |
void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); |
void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
int evergreen_get_temp(struct radeon_device *rdev); |
int sumo_get_temp(struct radeon_device *rdev); |
int tn_get_temp(struct radeon_device *rdev); |
int cypress_dpm_init(struct radeon_device *rdev); |
void cypress_dpm_setup_asic(struct radeon_device *rdev); |
int cypress_dpm_enable(struct radeon_device *rdev); |
void cypress_dpm_disable(struct radeon_device *rdev); |
int cypress_dpm_set_power_state(struct radeon_device *rdev); |
void cypress_dpm_display_configuration_changed(struct radeon_device *rdev); |
void cypress_dpm_fini(struct radeon_device *rdev); |
bool cypress_dpm_vblank_too_short(struct radeon_device *rdev); |
int btc_dpm_init(struct radeon_device *rdev); |
void btc_dpm_setup_asic(struct radeon_device *rdev); |
int btc_dpm_enable(struct radeon_device *rdev); |
void btc_dpm_disable(struct radeon_device *rdev); |
int btc_dpm_pre_set_power_state(struct radeon_device *rdev); |
int btc_dpm_set_power_state(struct radeon_device *rdev); |
void btc_dpm_post_set_power_state(struct radeon_device *rdev); |
void btc_dpm_fini(struct radeon_device *rdev); |
u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low); |
u32 btc_dpm_get_mclk(struct radeon_device *rdev, bool low); |
bool btc_dpm_vblank_too_short(struct radeon_device *rdev); |
void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
struct seq_file *m); |
int sumo_dpm_init(struct radeon_device *rdev); |
int sumo_dpm_enable(struct radeon_device *rdev); |
int sumo_dpm_late_enable(struct radeon_device *rdev); |
void sumo_dpm_disable(struct radeon_device *rdev); |
int sumo_dpm_pre_set_power_state(struct radeon_device *rdev); |
int sumo_dpm_set_power_state(struct radeon_device *rdev); |
void sumo_dpm_post_set_power_state(struct radeon_device *rdev); |
void sumo_dpm_setup_asic(struct radeon_device *rdev); |
void sumo_dpm_display_configuration_changed(struct radeon_device *rdev); |
void sumo_dpm_fini(struct radeon_device *rdev); |
u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low); |
u32 sumo_dpm_get_mclk(struct radeon_device *rdev, bool low); |
void sumo_dpm_print_power_state(struct radeon_device *rdev, |
struct radeon_ps *ps); |
void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
struct seq_file *m); |
int sumo_dpm_force_performance_level(struct radeon_device *rdev, |
enum radeon_dpm_forced_level level); |
|
/* |
* cayman |
488,10 → 590,6 |
*/ |
void cayman_fence_ring_emit(struct radeon_device *rdev, |
struct radeon_fence *fence); |
void cayman_uvd_semaphore_emit(struct radeon_device *rdev, |
struct radeon_ring *ring, |
struct radeon_semaphore *semaphore, |
bool emit_wait); |
void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev); |
int cayman_init(struct radeon_device *rdev); |
void cayman_fini(struct radeon_device *rdev); |
503,11 → 601,6 |
void cayman_vm_fini(struct radeon_device *rdev); |
void cayman_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags); |
void cayman_vm_set_page(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, |
uint64_t addr, unsigned count, |
uint32_t incr, uint32_t flags); |
int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
void cayman_dma_ring_ib_execute(struct radeon_device *rdev, |
514,10 → 607,79 |
struct radeon_ib *ib); |
bool cayman_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
bool cayman_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
|
void cayman_dma_vm_copy_pages(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, uint64_t src, |
unsigned count); |
void cayman_dma_vm_write_pages(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, |
uint64_t addr, unsigned count, |
uint32_t incr, uint32_t flags); |
void cayman_dma_vm_set_pages(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, |
uint64_t addr, unsigned count, |
uint32_t incr, uint32_t flags); |
void cayman_dma_vm_pad_ib(struct radeon_ib *ib); |
|
void cayman_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
|
u32 cayman_gfx_get_rptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
u32 cayman_gfx_get_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void cayman_gfx_set_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
uint32_t cayman_dma_get_rptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
uint32_t cayman_dma_get_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void cayman_dma_set_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
|
int ni_dpm_init(struct radeon_device *rdev); |
void ni_dpm_setup_asic(struct radeon_device *rdev); |
int ni_dpm_enable(struct radeon_device *rdev); |
void ni_dpm_disable(struct radeon_device *rdev); |
int ni_dpm_pre_set_power_state(struct radeon_device *rdev); |
int ni_dpm_set_power_state(struct radeon_device *rdev); |
void ni_dpm_post_set_power_state(struct radeon_device *rdev); |
void ni_dpm_fini(struct radeon_device *rdev); |
u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low); |
u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low); |
void ni_dpm_print_power_state(struct radeon_device *rdev, |
struct radeon_ps *ps); |
void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
struct seq_file *m); |
int ni_dpm_force_performance_level(struct radeon_device *rdev, |
enum radeon_dpm_forced_level level); |
bool ni_dpm_vblank_too_short(struct radeon_device *rdev); |
int trinity_dpm_init(struct radeon_device *rdev); |
int trinity_dpm_enable(struct radeon_device *rdev); |
int trinity_dpm_late_enable(struct radeon_device *rdev); |
void trinity_dpm_disable(struct radeon_device *rdev); |
int trinity_dpm_pre_set_power_state(struct radeon_device *rdev); |
int trinity_dpm_set_power_state(struct radeon_device *rdev); |
void trinity_dpm_post_set_power_state(struct radeon_device *rdev); |
void trinity_dpm_setup_asic(struct radeon_device *rdev); |
void trinity_dpm_display_configuration_changed(struct radeon_device *rdev); |
void trinity_dpm_fini(struct radeon_device *rdev); |
u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low); |
u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low); |
void trinity_dpm_print_power_state(struct radeon_device *rdev, |
struct radeon_ps *ps); |
void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
struct seq_file *m); |
int trinity_dpm_force_performance_level(struct radeon_device *rdev, |
enum radeon_dpm_forced_level level); |
void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable); |
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/* DCE6 - SI */ |
void dce6_bandwidth_update(struct radeon_device *rdev); |
int dce6_audio_init(struct radeon_device *rdev); |
void dce6_audio_fini(struct radeon_device *rdev); |
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/* |
* si |
537,11 → 699,6 |
int si_irq_process(struct radeon_device *rdev); |
int si_vm_init(struct radeon_device *rdev); |
void si_vm_fini(struct radeon_device *rdev); |
void si_vm_set_page(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, |
uint64_t addr, unsigned count, |
uint32_t incr, uint32_t flags); |
void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
int si_copy_dma(struct radeon_device *rdev, |
548,9 → 705,223 |
uint64_t src_offset, uint64_t dst_offset, |
unsigned num_gpu_pages, |
struct radeon_fence **fence); |
|
void si_dma_vm_copy_pages(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, uint64_t src, |
unsigned count); |
void si_dma_vm_write_pages(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, |
uint64_t addr, unsigned count, |
uint32_t incr, uint32_t flags); |
void si_dma_vm_set_pages(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, |
uint64_t addr, unsigned count, |
uint32_t incr, uint32_t flags); |
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void si_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
u32 si_get_xclk(struct radeon_device *rdev); |
uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); |
int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
int si_get_temp(struct radeon_device *rdev); |
int si_dpm_init(struct radeon_device *rdev); |
void si_dpm_setup_asic(struct radeon_device *rdev); |
int si_dpm_enable(struct radeon_device *rdev); |
int si_dpm_late_enable(struct radeon_device *rdev); |
void si_dpm_disable(struct radeon_device *rdev); |
int si_dpm_pre_set_power_state(struct radeon_device *rdev); |
int si_dpm_set_power_state(struct radeon_device *rdev); |
void si_dpm_post_set_power_state(struct radeon_device *rdev); |
void si_dpm_fini(struct radeon_device *rdev); |
void si_dpm_display_configuration_changed(struct radeon_device *rdev); |
void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
struct seq_file *m); |
int si_dpm_force_performance_level(struct radeon_device *rdev, |
enum radeon_dpm_forced_level level); |
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/* DCE8 - CIK */ |
void dce8_bandwidth_update(struct radeon_device *rdev); |
|
/* |
* cik |
*/ |
uint64_t cik_get_gpu_clock_counter(struct radeon_device *rdev); |
u32 cik_get_xclk(struct radeon_device *rdev); |
uint32_t cik_pciep_rreg(struct radeon_device *rdev, uint32_t reg); |
void cik_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); |
void cik_sdma_fence_ring_emit(struct radeon_device *rdev, |
struct radeon_fence *fence); |
bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, |
struct radeon_ring *ring, |
struct radeon_semaphore *semaphore, |
bool emit_wait); |
void cik_sdma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
int cik_copy_dma(struct radeon_device *rdev, |
uint64_t src_offset, uint64_t dst_offset, |
unsigned num_gpu_pages, |
struct radeon_fence **fence); |
int cik_copy_cpdma(struct radeon_device *rdev, |
uint64_t src_offset, uint64_t dst_offset, |
unsigned num_gpu_pages, |
struct radeon_fence **fence); |
int cik_sdma_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
void cik_fence_gfx_ring_emit(struct radeon_device *rdev, |
struct radeon_fence *fence); |
void cik_fence_compute_ring_emit(struct radeon_device *rdev, |
struct radeon_fence *fence); |
bool cik_semaphore_ring_emit(struct radeon_device *rdev, |
struct radeon_ring *cp, |
struct radeon_semaphore *semaphore, |
bool emit_wait); |
void cik_pcie_gart_tlb_flush(struct radeon_device *rdev); |
int cik_init(struct radeon_device *rdev); |
void cik_fini(struct radeon_device *rdev); |
int cik_suspend(struct radeon_device *rdev); |
int cik_resume(struct radeon_device *rdev); |
bool cik_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
int cik_asic_reset(struct radeon_device *rdev); |
void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
int cik_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
int cik_irq_set(struct radeon_device *rdev); |
int cik_irq_process(struct radeon_device *rdev); |
int cik_vm_init(struct radeon_device *rdev); |
void cik_vm_fini(struct radeon_device *rdev); |
void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
|
void cik_sdma_vm_copy_pages(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, uint64_t src, |
unsigned count); |
void cik_sdma_vm_write_pages(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, |
uint64_t addr, unsigned count, |
uint32_t incr, uint32_t flags); |
void cik_sdma_vm_set_pages(struct radeon_device *rdev, |
struct radeon_ib *ib, |
uint64_t pe, |
uint64_t addr, unsigned count, |
uint32_t incr, uint32_t flags); |
void cik_sdma_vm_pad_ib(struct radeon_ib *ib); |
|
void cik_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm); |
int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
u32 cik_gfx_get_rptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
u32 cik_gfx_get_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void cik_gfx_set_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
u32 cik_compute_get_rptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
u32 cik_compute_get_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void cik_compute_set_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
u32 cik_sdma_get_rptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
u32 cik_sdma_get_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void cik_sdma_set_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
int ci_get_temp(struct radeon_device *rdev); |
int kv_get_temp(struct radeon_device *rdev); |
|
int ci_dpm_init(struct radeon_device *rdev); |
int ci_dpm_enable(struct radeon_device *rdev); |
int ci_dpm_late_enable(struct radeon_device *rdev); |
void ci_dpm_disable(struct radeon_device *rdev); |
int ci_dpm_pre_set_power_state(struct radeon_device *rdev); |
int ci_dpm_set_power_state(struct radeon_device *rdev); |
void ci_dpm_post_set_power_state(struct radeon_device *rdev); |
void ci_dpm_setup_asic(struct radeon_device *rdev); |
void ci_dpm_display_configuration_changed(struct radeon_device *rdev); |
void ci_dpm_fini(struct radeon_device *rdev); |
u32 ci_dpm_get_sclk(struct radeon_device *rdev, bool low); |
u32 ci_dpm_get_mclk(struct radeon_device *rdev, bool low); |
void ci_dpm_print_power_state(struct radeon_device *rdev, |
struct radeon_ps *ps); |
void ci_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
struct seq_file *m); |
int ci_dpm_force_performance_level(struct radeon_device *rdev, |
enum radeon_dpm_forced_level level); |
bool ci_dpm_vblank_too_short(struct radeon_device *rdev); |
void ci_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); |
|
int kv_dpm_init(struct radeon_device *rdev); |
int kv_dpm_enable(struct radeon_device *rdev); |
int kv_dpm_late_enable(struct radeon_device *rdev); |
void kv_dpm_disable(struct radeon_device *rdev); |
int kv_dpm_pre_set_power_state(struct radeon_device *rdev); |
int kv_dpm_set_power_state(struct radeon_device *rdev); |
void kv_dpm_post_set_power_state(struct radeon_device *rdev); |
void kv_dpm_setup_asic(struct radeon_device *rdev); |
void kv_dpm_display_configuration_changed(struct radeon_device *rdev); |
void kv_dpm_fini(struct radeon_device *rdev); |
u32 kv_dpm_get_sclk(struct radeon_device *rdev, bool low); |
u32 kv_dpm_get_mclk(struct radeon_device *rdev, bool low); |
void kv_dpm_print_power_state(struct radeon_device *rdev, |
struct radeon_ps *ps); |
void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
struct seq_file *m); |
int kv_dpm_force_performance_level(struct radeon_device *rdev, |
enum radeon_dpm_forced_level level); |
void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); |
void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable); |
|
/* uvd v1.0 */ |
uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
uint32_t uvd_v1_0_get_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void uvd_v1_0_set_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
|
int uvd_v1_0_init(struct radeon_device *rdev); |
void uvd_v1_0_fini(struct radeon_device *rdev); |
int uvd_v1_0_start(struct radeon_device *rdev); |
void uvd_v1_0_stop(struct radeon_device *rdev); |
|
int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, |
struct radeon_ring *ring, |
struct radeon_semaphore *semaphore, |
bool emit_wait); |
void uvd_v1_0_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
|
/* uvd v2.2 */ |
int uvd_v2_2_resume(struct radeon_device *rdev); |
void uvd_v2_2_fence_emit(struct radeon_device *rdev, |
struct radeon_fence *fence); |
|
/* uvd v3.1 */ |
bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, |
struct radeon_ring *ring, |
struct radeon_semaphore *semaphore, |
bool emit_wait); |
|
/* uvd v4.2 */ |
int uvd_v4_2_resume(struct radeon_device *rdev); |
|
/* vce v1.0 */ |
uint32_t vce_v1_0_get_rptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
void vce_v1_0_set_wptr(struct radeon_device *rdev, |
struct radeon_ring *ring); |
int vce_v1_0_init(struct radeon_device *rdev); |
int vce_v1_0_start(struct radeon_device *rdev); |
|
/* vce v2.0 */ |
int vce_v2_0_resume(struct radeon_device *rdev); |
|
#endif |