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Regard whitespace Rev 4400 → Rev 4401

/contrib/sdk/sources/Mesa/src/mesa/drivers/common/meta.c
1515,6 → 1515,9
sizeof(struct vertex), OFFSET(x));
_mesa_VertexAttribPointer(1, 2, GL_FLOAT, GL_FALSE,
sizeof(struct vertex), OFFSET(s));
 
_mesa_EnableVertexAttribArray(0);
_mesa_EnableVertexAttribArray(1);
}
 
/* Generate a relevant fragment shader program for the texture target */
1591,8 → 1594,6
_mesa_DeleteObjectARB(vs);
_mesa_BindAttribLocation(ShaderProg, 0, "position");
_mesa_BindAttribLocation(ShaderProg, 1, "texcoords");
_mesa_EnableVertexAttribArray(0);
_mesa_EnableVertexAttribArray(1);
link_program_with_debug(ctx, ShaderProg);
ralloc_free(mem_ctx);
if (texture_2d)
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
261,24 → 261,17
x_align *= 16;
y_align *= 32;
 
if (brw->is_haswell && brw->gt == 3) {
/* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
* Backend > MCS Buffer for Render Target(s) [DevIVB+]:
* [DevHSW:GT3]: Clear rectangle must be aligned to two times the
* number of pixels in the table shown below...
* x_align, y_align values computed above are the relevant entries
* in the referred table.
* Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color
* Clear of Non-MultiSampled Render Target Restrictions":
*
* Clear rectangle must be aligned to two times the number of pixels in
* the table shown below due to 16x16 hashing across the slice.
*/
x0 = ROUND_DOWN_TO(x0, 2 * x_align);
y0 = ROUND_DOWN_TO(y0, 2 * y_align);
x1 = ALIGN(x1, 2 * x_align);
y1 = ALIGN(y1, 2 * y_align);
} else {
x0 = ROUND_DOWN_TO(x0, x_align);
y0 = ROUND_DOWN_TO(y0, y_align);
x1 = ALIGN(x1, x_align);
y1 = ALIGN(y1, y_align);
}
 
/* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
* Target(s)", beneath the "Fast Color Clear" bullet (p327):
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_cc.c
187,7 → 187,8
eqA != eqRGB);
}
 
if (ctx->Color.AlphaEnabled) {
/* _NEW_BUFFERS */
if (ctx->Color.AlphaEnabled && ctx->DrawBuffer->_NumColorDrawBuffers <= 1) {
cc->cc3.alpha_test = 1;
cc->cc3.alpha_test_func =
intel_translate_compare_func(ctx->Color.AlphaFunc);
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_fs.cpp
2920,7 → 2920,7
/* We handle discards by keeping track of the still-live pixels in f0.1.
* Initialize it with the dispatched pixels.
*/
if (fp->UsesKill) {
if (fp->UsesKill || c->key.alpha_test_func) {
fs_inst *discard_init = emit(FS_OPCODE_MOV_DISPATCH_TO_FLAGS);
discard_init->flag_subreg = 1;
}
2944,6 → 2944,9
 
emit(FS_OPCODE_PLACEHOLDER_HALT);
 
if (c->key.alpha_test_func)
emit_alpha_test();
 
emit_fb_writes();
 
split_virtual_grfs();
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_fs.h
395,6 → 395,7
fs_reg dst, fs_reg src0, fs_reg src1, fs_reg one);
 
void emit_color_write(int target, int index, int first_color_mrf);
void emit_alpha_test();
void emit_fb_writes();
 
void emit_shader_time_begin();
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
107,7 → 107,7
brw_set_mask_control(p, BRW_MASK_DISABLE);
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
 
if (fp->UsesKill) {
if (fp->UsesKill || c->key.alpha_test_func) {
struct brw_reg pixel_mask;
 
if (brw->gen >= 6)
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
2228,7 → 2228,61
}
}
 
static int
cond_for_alpha_func(GLenum func)
{
switch(func) {
case GL_GREATER:
return BRW_CONDITIONAL_G;
case GL_GEQUAL:
return BRW_CONDITIONAL_GE;
case GL_LESS:
return BRW_CONDITIONAL_L;
case GL_LEQUAL:
return BRW_CONDITIONAL_LE;
case GL_EQUAL:
return BRW_CONDITIONAL_EQ;
case GL_NOTEQUAL:
return BRW_CONDITIONAL_NEQ;
default:
assert(!"Not reached");
return 0;
}
}
 
/**
* Alpha test support for when we compile it into the shader instead
* of using the normal fixed-function alpha test.
*/
void
fs_visitor::emit_alpha_test()
{
this->current_annotation = "Alpha test";
 
fs_inst *cmp;
if (c->key.alpha_test_func == GL_ALWAYS)
return;
 
if (c->key.alpha_test_func == GL_NEVER) {
/* f0.1 = 0 */
fs_reg some_reg = fs_reg(retype(brw_vec8_grf(0, 0),
BRW_REGISTER_TYPE_UW));
cmp = emit(CMP(reg_null_f, some_reg, some_reg,
BRW_CONDITIONAL_NEQ));
} else {
/* RT0 alpha */
fs_reg color = outputs[0];
color.reg_offset += 3;
 
/* f0.1 &= func(color, ref) */
cmp = emit(CMP(reg_null_f, color, fs_reg(c->key.alpha_test_ref),
cond_for_alpha_func(c->key.alpha_test_func)));
}
cmp->predicate = BRW_PREDICATE_NORMAL;
cmp->flag_subreg = 1;
}
 
void
fs_visitor::emit_fb_writes()
{
this->current_annotation = "FB write header";
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_misc_state.c
48,6 → 48,10
{
struct gl_context *ctx = &brw->ctx;
 
/* 3DSTATE_DRAWING_RECTANGLE is non-pipelined. */
if (brw->gen == 6)
intel_emit_post_sync_nonzero_flush(brw);
 
BEGIN_BATCH(4);
OUT_BATCH(_3DSTATE_DRAWING_RECTANGLE << 16 | (4 - 2));
OUT_BATCH(0); /* xmin, ymin */
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_tex_layout.c
94,7 → 94,7
 
static unsigned int
intel_vertical_texture_alignment_unit(struct brw_context *brw,
gl_format format)
gl_format format, bool multisampled)
{
/**
* From the "Alignment Unit Size" section of various specs, namely:
118,8 → 118,6
*
* On SNB+, non-special cases can be overridden by setting the SURFACE_STATE
* "Surface Vertical Alignment" field to VALIGN_2 or VALIGN_4.
*
* We currently don't support multisampling.
*/
if (_mesa_is_format_compressed(format))
return 4;
127,6 → 125,9
if (format == MESA_FORMAT_S8)
return brw->gen >= 7 ? 8 : 4;
 
if (multisampled)
return 4;
 
GLenum base_format = _mesa_get_format_base_format(format);
 
if (brw->gen >= 6 &&
284,8 → 285,10
void
brw_miptree_layout(struct brw_context *brw, struct intel_mipmap_tree *mt)
{
bool multisampled = mt->num_samples > 1;
mt->align_w = intel_horizontal_texture_alignment_unit(brw, mt->format);
mt->align_h = intel_vertical_texture_alignment_unit(brw, mt->format);
mt->align_h =
intel_vertical_texture_alignment_unit(brw, mt->format, multisampled);
 
switch (mt->target) {
case GL_TEXTURE_CUBE_MAP:
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_wm.c
287,6 → 287,10
old_key->drawable_height, key->drawable_height);
found |= key_debug(brw, "input slots valid",
old_key->input_slots_valid, key->input_slots_valid);
found |= key_debug(brw, "mrt alpha test function",
old_key->alpha_test_func, key->alpha_test_func);
found |= key_debug(brw, "mrt alpha test reference value",
old_key->alpha_test_ref, key->alpha_test_ref);
 
found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
 
467,6 → 471,18
if (brw->gen < 6)
key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
 
 
/* _NEW_COLOR | _NEW_BUFFERS */
/* Pre-gen6, the hardware alpha test always used each render
* target's alpha to do alpha test, as opposed to render target 0's alpha
* like GL requires. Fix that by building the alpha test into the
* shader, and we'll skip enabling the fixed function alpha test.
*/
if (brw->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 && ctx->Color.AlphaEnabled) {
key->alpha_test_func = ctx->Color.AlphaFunc;
key->alpha_test_ref = ctx->Color.AlphaRef;
}
 
/* The unique fragment program ID */
key->program_string_id = fp->id;
}
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_wm.h
70,6 → 70,8
GLushort drawable_height;
GLbitfield64 input_slots_valid;
GLuint program_string_id:32;
GLenum alpha_test_func; /* < For Gen4/5 MRT alpha test */
float alpha_test_ref;
 
struct brw_sampler_prog_key_data tex;
};
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
259,6 → 259,7
uint32_t *surf;
uint32_t tile_x, tile_y;
 
/* BRW_NEW_UNIFORM_BUFFER */
if (tObj->Target == GL_TEXTURE_BUFFER) {
brw_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);
return;
806,6 → 807,7
.dirty = {
.mesa = _NEW_TEXTURE,
.brw = BRW_NEW_BATCH |
BRW_NEW_UNIFORM_BUFFER |
BRW_NEW_VERTEX_PROGRAM |
BRW_NEW_FRAGMENT_PROGRAM,
.cache = 0
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/gen6_blorp.cpp
924,6 → 924,18
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
 
BEGIN_BATCH(3);
OUT_BATCH(_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
 
BEGIN_BATCH(3);
OUT_BATCH(_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
}
 
 
951,6 → 963,9
gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
const brw_blorp_params *params)
{
if (brw->gen == 6)
intel_emit_post_sync_nonzero_flush(brw);
 
BEGIN_BATCH(4);
OUT_BATCH(_3DSTATE_DRAWING_RECTANGLE << 16 | (4 - 2));
OUT_BATCH(0);
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/gen6_multisample_state.c
128,6 → 128,9
break;
}
 
/* 3DSTATE_MULTISAMPLE is nonpipelined. */
intel_emit_post_sync_nonzero_flush(brw);
 
int len = brw->gen >= 7 ? 4 : 3;
BEGIN_BATCH(len);
OUT_BATCH(_3DSTATE_MULTISAMPLE << 16 | (len - 2));
183,9 → 186,6
}
}
 
/* 3DSTATE_MULTISAMPLE is nonpipelined. */
intel_emit_post_sync_nonzero_flush(brw);
 
gen6_emit_3dstate_multisample(brw, num_samples);
gen6_emit_3dstate_sample_mask(brw, num_samples, coverage,
coverage_invert, sample_mask);
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/gen6_queryobj.c
115,7 → 115,7
BEGIN_BATCH(3);
OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2));
OUT_BATCH(reg);
OUT_RELOC(query_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
OUT_RELOC(query_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
idx * sizeof(uint64_t));
ADVANCE_BATCH();
 
122,7 → 122,7
BEGIN_BATCH(3);
OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2));
OUT_BATCH(reg + sizeof(uint32_t));
OUT_RELOC(query_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
OUT_RELOC(query_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
sizeof(uint32_t) + idx * sizeof(uint64_t));
ADVANCE_BATCH();
}
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/gen6_sol.c
153,6 → 153,9
= _mesa_compute_max_transform_feedback_vertices(xfb_obj,
linked_xfb_info);
 
/* 3DSTATE_GS_SVB_INDEX is non-pipelined. */
intel_emit_post_sync_nonzero_flush(brw);
 
/* Initialize the SVBI 0 register to zero and set the maximum index. */
BEGIN_BATCH(4);
OUT_BATCH(_3DSTATE_GS_SVB_INDEX << 16 | (4 - 2));
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/gen7_blorp.cpp
763,6 → 763,18
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
 
BEGIN_BATCH(3);
OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
 
BEGIN_BATCH(3);
OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
}
 
 
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/i965/intel_screen.c
831,8 → 831,6
fb->Visual.sRGBCapable = true;
}
 
printf("\n%s doubleBufferMode %d\n\n", __FUNCTION__,mesaVis->doubleBufferMode );
 
/* setup the hardware-based renderbuffers */
rb = intel_create_renderbuffer(rgbFormat, num_samples);
_mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
/contrib/sdk/sources/Mesa/src/mesa/drivers/dri/swrast/swrast.c
397,12 → 397,12
stride = w * cpp;
xrb->Base.Buffer = malloc(h * stride);
 
sPriv->swrast_loader->getImage(dPriv, x, y, w, h,
sPriv->swrast_loader->getImage(dPriv, x, rb->Height - y - h, w, h,
(char *) xrb->Base.Buffer,
dPriv->loaderPrivate);
 
*out_map = xrb->Base.Buffer;
*out_stride = stride;
*out_map = xrb->Base.Buffer + (h - 1) * stride;
*out_stride = -stride;
return;
}
 
/contrib/sdk/sources/Mesa/src/mesa/drivers/osmesa/osmesa.c
197,6 → 197,14
const OSMesaContext osmesa = OSMESA_CONTEXT(ctx);
const SWcontext *swrast = SWRAST_CONTEXT(ctx);
 
if (ctx->DrawBuffer &&
ctx->DrawBuffer->Visual.redBits == 32) {
/* the special-case line functions in this file don't work
* for float color channels.
*/
return NULL;
}
 
if (ctx->RenderMode != GL_RENDER) return NULL;
if (ctx->Line.SmoothFlag) return NULL;
if (ctx->Texture._EnabledUnits) return NULL;
298,6 → 306,14
const OSMesaContext osmesa = OSMESA_CONTEXT(ctx);
const SWcontext *swrast = SWRAST_CONTEXT(ctx);
 
if (ctx->DrawBuffer &&
ctx->DrawBuffer->Visual.redBits == 32) {
/* the special-case triangle functions in this file don't work
* for float color channels.
*/
return (swrast_tri_func) NULL;
}
 
if (ctx->RenderMode != GL_RENDER) return (swrast_tri_func) NULL;
if (ctx->Polygon.SmoothFlag) return (swrast_tri_func) NULL;
if (ctx->Polygon.StippleFlag) return (swrast_tri_func) NULL;
/contrib/sdk/sources/Mesa/src/mesa/main/querymatrix.c
38,6 → 38,7
#define FLOAT_TO_FIXED(x) ((GLfixed) ((x) * 65536.0))
 
#if defined(_MSC_VER)
#if _MSC_VER < 1800 /* Not required on VS2013 and above. */
/* Oddly, the fpclassify() function doesn't exist in such a form
* on MSVC. This is an implementation using slightly different
* lower-level Windows functions.
70,6 → 71,7
return FP_NAN;
}
}
#endif /* _MSC_VER < 1800 */
 
#elif defined(__APPLE__) || defined(__CYGWIN__) || defined(__FreeBSD__) || \
defined(__OpenBSD__) || defined(__NetBSD__) || defined(__DragonFly__) || \
/contrib/sdk/sources/Mesa/src/mesa/main/queryobj.c
201,13 → 201,6
return;
}
 
/* No query objects can be active at this time! */
if (ctx->Query.CurrentOcclusionObject ||
ctx->Query.CurrentTimerObject) {
_mesa_error(ctx, GL_INVALID_OPERATION, "glGenQueriesARB");
return;
}
 
first = _mesa_HashFindFreeKeyBlock(ctx->Query.QueryObjects, n);
if (first) {
GLsizei i;
240,18 → 233,20
return;
}
 
/* No query objects can be active at this time! */
if (ctx->Query.CurrentOcclusionObject ||
ctx->Query.CurrentTimerObject) {
_mesa_error(ctx, GL_INVALID_OPERATION, "glDeleteQueriesARB");
return;
}
 
for (i = 0; i < n; i++) {
if (ids[i] > 0) {
struct gl_query_object *q = _mesa_lookup_query_object(ctx, ids[i]);
if (q) {
ASSERT(!q->Active); /* should be caught earlier */
if (q->Active) {
struct gl_query_object **bindpt;
bindpt = get_query_binding_point(ctx, q->Target);
assert(bindpt); /* Should be non-null for active q. */
if (bindpt) {
*bindpt = NULL;
}
q->Active = GL_FALSE;
ctx->Driver.EndQuery(ctx, q);
}
_mesa_HashRemove(ctx->Query.QueryObjects, ids[i]);
ctx->Driver.DeleteQuery(ctx, q);
}
/contrib/sdk/sources/Mesa/src/mesa/main/texparam.c
660,11 → 660,8
return GL_FALSE;
 
case GL_TEXTURE_LOD_BIAS:
/* NOTE: this is really part of OpenGL 1.4, not EXT_texture_lod_bias.
* It was removed in core-profile, and it has never existed in OpenGL
* ES.
*/
if (ctx->API != API_OPENGL_COMPAT)
/* NOTE: this is really part of OpenGL 1.4, not EXT_texture_lod_bias. */
if (_mesa_is_gles(ctx))
goto invalid_pname;
 
if (!target_allows_setting_sampler_parameters(texObj->Target))
1489,7 → 1486,7
*params = (GLfloat) obj->DepthMode;
break;
case GL_TEXTURE_LOD_BIAS:
if (ctx->API != API_OPENGL_COMPAT)
if (_mesa_is_gles(ctx))
goto invalid_pname;
 
*params = obj->Sampler.LodBias;
1677,10 → 1674,13
*params = (GLint) obj->DepthMode;
break;
case GL_TEXTURE_LOD_BIAS:
if (ctx->API != API_OPENGL_COMPAT)
if (_mesa_is_gles(ctx))
goto invalid_pname;
 
*params = (GLint) obj->Sampler.LodBias;
/* GL spec 'Data Conversions' section specifies that floating-point
* value in integer Get function is rounded to nearest integer
*/
*params = (GLint) roundf(obj->Sampler.LodBias);
break;
case GL_TEXTURE_CROP_RECT_OES:
if (ctx->API != API_OPENGLES || !ctx->Extensions.OES_draw_texture)
/contrib/sdk/sources/Mesa/src/mesa/state_tracker/st_cb_feedback.c
85,9 → 85,11
const GLfloat *color, *texcoord;
GLuint slot;
 
/* Recall that Y=0=Top of window for Gallium wincoords */
win[0] = v->data[0][0];
if (st_fb_orientation(ctx->DrawBuffer) == Y_0_TOP)
win[1] = ctx->DrawBuffer->Height - v->data[0][1];
else
win[1] = v->data[0][1];
win[2] = v->data[0][2];
win[3] = 1.0F / v->data[0][3];
 
/contrib/sdk/sources/Mesa/src/mesa/state_tracker/st_draw.c
209,9 → 209,6
if (st->dirty.st || ctx->NewDriverState) {
st_validate_state(st);
 
if (st->vertex_array_out_of_memory)
return;
 
#if 0
if (MESA_VERBOSE & VERBOSE_GLSL) {
check_uniforms(ctx);
221,6 → 218,10
#endif
}
 
if (st->vertex_array_out_of_memory) {
return;
}
 
util_draw_init_info(&info);
if (ib) {
/* Get index bounds for user buffers. */