/drivers/video/drm/i915/utils.c |
---|
267,7 → 267,6 |
} |
void msleep(unsigned int msecs) |
{ |
msecs /= 10; |
/drivers/video/drm/radeon/display.h |
---|
File deleted |
/drivers/video/drm/radeon/Makefile |
---|
1,42 → 1,45 |
CC = gcc |
CC = kos32-gcc |
LD = ld |
AS = as |
FASM = fasm.exe |
DEFINES = -D__KERNEL__ -DCONFIG_X86_32 -DCONFIG_X86_CMPXCHG64 -DCONFIG_TINY_RCU |
DEFINES += -DCONFIG_X86_L1_CACHE_SHIFT=6 |
DEFINES += -DCONFIG_DRM_FBDEV_EMULATION -DCONFIG_DMI -DCONFIG_ARCH_HAS_CACHE_LINE_SIZE |
DEFINES = -DDRM_DEBUG_CODE=0 -D__KERNEL__ -DCONFIG_X86 -DCONFIG_X86_32 -DCONFIG_PCI |
DEFINES += -DCONFIG_X86_CMPXCHG64 -DCONFIG_TINY_RCU -DCONFIG_X86_L1_CACHE_SHIFT=6 |
DEFINES += -DCONFIG_DRM_FBDEV_EMULATION -DCONFIG_DMI |
DEFINES += -DKBUILD_MODNAME=\"ati.dll\" |
DRV_TOPDIR = $(CURDIR)/../../.. |
DDK_TOPDIR = $(CURDIR)/../../.. |
DDK_INCLUDES = $(DRV_TOPDIR)/include |
DRM_TOPDIR = $(CURDIR)/.. |
DRV_INCLUDES = $(DRV_TOPDIR)/include |
INCLUDES = -I$(DDK_INCLUDES) \ |
-I$(DDK_INCLUDES)/asm \ |
-I$(DDK_INCLUDES)/uapi \ |
-I$(DDK_INCLUDES)/drm -I./ |
INCLUDES = -I$(DRV_INCLUDES) \ |
-I$(DRV_INCLUDES)/asm \ |
-I$(DRV_INCLUDES)/uapi \ |
-I$(DRV_INCLUDES)/drm -I./ -I$(DRV_INCLUDES) |
CFLAGS= -c -O2 $(INCLUDES) $(DEFINES) -march=i686 -fno-ident -fomit-frame-pointer -fno-builtin-printf |
CFLAGS+= -mno-stack-arg-probe -mpreferred-stack-boundary=2 -mincoming-stack-boundary=2 -mno-ms-bitfields |
LIBPATH:= $(DRV_TOPDIR)/ddk |
LIBPATH:= $(DDK_TOPDIR) |
LIBS:= -lddk -lcore -lgcc |
LDFLAGS = -nostdlib -shared -s -Map atikms.map --image-base 0\ |
PE_FLAGS = --major-os-version 0 --minor-os-version 7 --major-subsystem-version 0 \ |
--minor-subsystem-version 5 --subsystem native |
LDFLAGS = -nostdlib -shared -s $(PE_FLAGS) --image-base 0\ |
--file-alignment 512 --section-alignment 4096 |
NAME:= atikms |
HFILES:= $(DRV_INCLUDES)/linux/types.h \ |
$(DRV_INCLUDES)/linux/list.h \ |
$(DRV_INCLUDES)/linux/pci.h \ |
$(DRV_INCLUDES)/drm/drmP.h \ |
$(DRV_INCLUDES)/drm/drm_edid.h \ |
$(DRV_INCLUDES)/drm/drm_crtc.h \ |
$(DRV_INCLUDES)/drm/drm_mm.h \ |
HFILES:= $(DDK_INCLUDES)/linux/types.h \ |
$(DDK_INCLUDES)/linux/list.h \ |
$(DDK_INCLUDES)/linux/pci.h \ |
$(DDK_INCLUDES)/drm/drmP.h \ |
$(DDK_INCLUDES)/drm/drm_edid.h \ |
$(DDK_INCLUDES)/drm/drm_crtc.h \ |
$(DDK_INCLUDES)/drm/drm_mm.h \ |
atom.h \ |
radeon.h \ |
radeon_asic.h |
233,7 → 236,7 |
%.o : %.c $(HFILES) Makefile |
$(CC) $(CFLAGS) $(DEFINES) -o $@ $< |
$(CC) $(CFLAGS) -o $@ $< |
%.o : %.S $(HFILES) Makefile |
$(AS) -o $@ $< |
/drivers/video/drm/radeon/Makefile.lto |
---|
5,8 → 5,10 |
AS = as |
FASM = fasm |
DEFINES = -D__KERNEL__ -DCONFIG_X86_32 -DCONFIG_TINY_RCU -DCONFIG_X86_L1_CACHE_SHIFT=6 |
DEFINES += -DCONFIG_ARCH_HAS_CACHE_LINE_SIZE |
DEFINES = -DDRM_DEBUG_CODE=0 -D__KERNEL__ -DCONFIG_X86 -DCONFIG_X86_32 -DCONFIG_PCI |
DEFINES += -DCONFIG_X86_CMPXCHG64 -DCONFIG_TINY_RCU -DCONFIG_X86_L1_CACHE_SHIFT=6 |
DEFINES += -DCONFIG_DRM_FBDEV_EMULATION -DCONFIG_DMI |
DEFINES += -DKBUILD_MODNAME=\"ati.dll\" |
DDK_TOPDIR = d:\kos\kolibri\drivers\ddk |
DRV_INCLUDES = /d/kos/kolibri/drivers/include |
36,7 → 38,6 |
HFILES:= $(DRV_INCLUDES)/linux/types.h \ |
$(DRV_INCLUDES)/linux/list.h \ |
$(DRV_INCLUDES)/linux/pci.h \ |
$(DRV_INCLUDES)/drm/drm.h \ |
$(DRV_INCLUDES)/drm/drmP.h \ |
$(DRV_INCLUDES)/drm/drm_edid.h \ |
$(DRV_INCLUDES)/drm/drm_crtc.h \ |
55,10 → 56,14 |
../ttm/ttm_memory.c \ |
../ttm/ttm_page_alloc.c \ |
../ttm/ttm_tt.c \ |
$(DRM_TOPDIR)/drm_atomic.c \ |
$(DRM_TOPDIR)/drm_atomic_helper.c \ |
$(DRM_TOPDIR)/drm_bridge.c \ |
$(DRM_TOPDIR)/drm_cache.c \ |
$(DRM_TOPDIR)/drm_crtc.c \ |
$(DRM_TOPDIR)/drm_crtc_helper.c \ |
$(DRM_TOPDIR)/drm_dp_helper.c \ |
$(DRM_TOPDIR)/drm_dp_mst_topology.c \ |
$(DRM_TOPDIR)/drm_drv.c \ |
$(DRM_TOPDIR)/drm_edid.c \ |
$(DRM_TOPDIR)/drm_fb_helper.c \ |
106,6 → 111,7 |
radeon_agp.c \ |
radeon_asic.c \ |
radeon_atombios.c \ |
radeon_audio.c \ |
radeon_benchmark.c \ |
radeon_bios.c \ |
radeon_combios.c \ |
113,6 → 119,8 |
radeon_cs.c \ |
radeon_clocks.c \ |
radeon_display.c \ |
radeon_dp_auxch.c \ |
radeon_dp_mst.c \ |
radeon_encoders.c \ |
radeon_fence.c \ |
radeon_fb.c \ |
121,6 → 129,7 |
radeon_i2c.c \ |
radeon_ib.c \ |
radeon_irq_kms.c \ |
radeon_kms.c \ |
radeon_legacy_crtc.c \ |
radeon_legacy_encoders.c \ |
radeon_legacy_tv.c \ |
129,6 → 138,7 |
radeon_ring.c \ |
radeon_sa.c \ |
radeon_semaphore.c \ |
radeon_sync.c \ |
radeon_test.c \ |
radeon_ttm.c \ |
radeon_ucode.c \ |
145,7 → 155,6 |
rv740_dpm.c \ |
r520.c \ |
r600.c \ |
r600_audio.c \ |
r600_blit_shaders.c \ |
r600_cs.c \ |
r600_dma.c \ |
/drivers/video/drm/radeon/atombios_crtc.c |
---|
25,6 → 25,7 |
*/ |
#include <drm/drmP.h> |
#include <drm/drm_crtc_helper.h> |
#include <drm/drm_fb_helper.h> |
#include <drm/radeon_drm.h> |
#include <drm/drm_fixed.h> |
#include "radeon.h" |
/drivers/video/drm/radeon/atombios_dp.c |
---|
315,8 → 315,19 |
unsigned max_lane_num = drm_dp_max_lane_count(dpcd); |
unsigned lane_num, i, max_pix_clock; |
if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) == |
ENCODER_OBJECT_ID_NUTMEG) { |
for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) { |
max_pix_clock = (lane_num * 270000 * 8) / bpp; |
if (max_pix_clock >= pix_clock) { |
*dp_lanes = lane_num; |
*dp_rate = 270000; |
return 0; |
} |
} |
} else { |
for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) { |
for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) { |
max_pix_clock = (lane_num * link_rates[i] * 8) / bpp; |
if (max_pix_clock >= pix_clock) { |
*dp_lanes = lane_num; |
325,6 → 336,7 |
} |
} |
} |
} |
return -EINVAL; |
} |
/drivers/video/drm/radeon/atombios_encoders.c |
---|
120,7 → 120,6 |
case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: |
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3: |
if (dig->backlight_level == 0) |
atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_LCD_BLOFF, 0, 0); |
else { |
2774,16 → 2773,19 |
case ENCODER_OBJECT_ID_INTERNAL_LVTM1: |
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
radeon_encoder->rmx_type = RMX_FULL; |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_LVDS); |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, |
DRM_MODE_ENCODER_LVDS, NULL); |
radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder); |
} else { |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS); |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, |
DRM_MODE_ENCODER_TMDS, NULL); |
radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder); |
} |
drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); |
break; |
case ENCODER_OBJECT_ID_INTERNAL_DAC1: |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC); |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, |
DRM_MODE_ENCODER_DAC, NULL); |
radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder); |
drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs); |
break; |
2790,7 → 2792,8 |
case ENCODER_OBJECT_ID_INTERNAL_DAC2: |
case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: |
case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TVDAC); |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, |
DRM_MODE_ENCODER_TVDAC, NULL); |
radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder); |
drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs); |
break; |
2804,13 → 2807,16 |
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3: |
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
radeon_encoder->rmx_type = RMX_FULL; |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_LVDS); |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, |
DRM_MODE_ENCODER_LVDS, NULL); |
radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder); |
} else if (radeon_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) { |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC); |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, |
DRM_MODE_ENCODER_DAC, NULL); |
radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder); |
} else { |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS); |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, |
DRM_MODE_ENCODER_TMDS, NULL); |
radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder); |
} |
drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); |
2827,11 → 2833,14 |
/* these are handled by the primary encoders */ |
radeon_encoder->is_ext_encoder = true; |
if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_LVDS); |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, |
DRM_MODE_ENCODER_LVDS, NULL); |
else if (radeon_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC); |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, |
DRM_MODE_ENCODER_DAC, NULL); |
else |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS); |
drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, |
DRM_MODE_ENCODER_TMDS, NULL); |
drm_encoder_helper_add(encoder, &radeon_atom_ext_helper_funcs); |
break; |
} |
/drivers/video/drm/radeon/cik.c |
---|
4132,10 → 4132,10 |
* @rdev: radeon_device pointer |
* @ib: radeon indirect buffer object |
* |
* Emits an DE (drawing engine) or CE (constant engine) IB |
* Emits a DE (drawing engine) or CE (constant engine) IB |
* on the gfx ring. IBs are usually generated by userspace |
* acceleration drivers and submitted to the kernel for |
* sheduling on the ring. This function schedules the IB |
* scheduling on the ring. This function schedules the IB |
* on the gfx ring for execution by the GPU. |
*/ |
void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) |
/drivers/video/drm/radeon/main.c |
---|
5,9 → 5,12 |
#include "radeon.h" |
#include "bitmap.h" |
#define DRV_NAME "atikms v4.4.30" |
#define DRV_NAME "atikms v4.5.7" |
void __init dmi_scan_machine(void); |
int printf ( const char * format, ... ); |
void parse_cmdline(char *cmdline, videomode_t *mode, char *log, int *kms); |
int kmap_init(); |
#define KMS_DEV_CLOSE 0 |
#define KMS_DEV_INIT 1 |
311,14 → 314,3 |
// return ret; |
return 0; |
} |
s64 div64_s64(s64 dividend, s64 divisor) |
{ |
s64 quot, t; |
quot = div64_u64(abs(dividend), abs(divisor)); |
t = (dividend ^ divisor) >> 63; |
return (quot ^ t) - t; |
} |
/drivers/video/drm/radeon/r100.c |
---|
3146,7 → 3146,8 |
{ |
fixed20_12 trcd_ff, trp_ff, tras_ff, trbs_ff, tcas_ff; |
fixed20_12 sclk_ff, mclk_ff, sclk_eff_ff, sclk_delay_ff; |
fixed20_12 peak_disp_bw, mem_bw, pix_clk, pix_clk2, temp_ff, crit_point_ff; |
fixed20_12 peak_disp_bw, mem_bw, pix_clk, pix_clk2, temp_ff; |
fixed20_12 crit_point_ff = {0}; |
uint32_t temp, data, mem_trcd, mem_trp, mem_tras; |
fixed20_12 memtcas_ff[8] = { |
dfixed_init(1), |
3200,7 → 3201,7 |
fixed20_12 min_mem_eff; |
fixed20_12 mc_latency_sclk, mc_latency_mclk, k1; |
fixed20_12 cur_latency_mclk, cur_latency_sclk; |
fixed20_12 disp_latency, disp_latency_overhead, disp_drain_rate, |
fixed20_12 disp_latency, disp_latency_overhead, disp_drain_rate = {0}, |
disp_drain_rate2, read_return_rate; |
fixed20_12 time_disp1_drop_priority; |
int c; |
/drivers/video/drm/radeon/r600_cs.c |
---|
2328,101 → 2328,6 |
return 0; |
} |
#ifdef CONFIG_DRM_RADEON_UMS |
/** |
* cs_parser_fini() - clean parser states |
* @parser: parser structure holding parsing context. |
* @error: error number |
* |
* If error is set than unvalidate buffer, otherwise just free memory |
* used by parsing context. |
**/ |
static void r600_cs_parser_fini(struct radeon_cs_parser *parser, int error) |
{ |
unsigned i; |
kfree(parser->relocs); |
for (i = 0; i < parser->nchunks; i++) |
drm_free_large(parser->chunks[i].kdata); |
kfree(parser->chunks); |
kfree(parser->chunks_array); |
} |
static int r600_cs_parser_relocs_legacy(struct radeon_cs_parser *p) |
{ |
if (p->chunk_relocs == NULL) { |
return 0; |
} |
p->relocs = kzalloc(sizeof(struct radeon_bo_list), GFP_KERNEL); |
if (p->relocs == NULL) { |
return -ENOMEM; |
} |
return 0; |
} |
int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp, |
unsigned family, u32 *ib, int *l) |
{ |
struct radeon_cs_parser parser; |
struct radeon_cs_chunk *ib_chunk; |
struct r600_cs_track *track; |
int r; |
/* initialize tracker */ |
track = kzalloc(sizeof(*track), GFP_KERNEL); |
if (track == NULL) |
return -ENOMEM; |
r600_cs_track_init(track); |
r600_cs_legacy_get_tiling_conf(dev, &track->npipes, &track->nbanks, &track->group_size); |
/* initialize parser */ |
memset(&parser, 0, sizeof(struct radeon_cs_parser)); |
parser.filp = filp; |
parser.dev = &dev->pdev->dev; |
parser.rdev = NULL; |
parser.family = family; |
parser.track = track; |
parser.ib.ptr = ib; |
r = radeon_cs_parser_init(&parser, data); |
if (r) { |
DRM_ERROR("Failed to initialize parser !\n"); |
r600_cs_parser_fini(&parser, r); |
return r; |
} |
r = r600_cs_parser_relocs_legacy(&parser); |
if (r) { |
DRM_ERROR("Failed to parse relocation !\n"); |
r600_cs_parser_fini(&parser, r); |
return r; |
} |
/* Copy the packet into the IB, the parser will read from the |
* input memory (cached) and write to the IB (which can be |
* uncached). */ |
ib_chunk = parser.chunk_ib; |
parser.ib.length_dw = ib_chunk->length_dw; |
*l = parser.ib.length_dw; |
if (copy_from_user(ib, ib_chunk->user_ptr, ib_chunk->length_dw * 4)) { |
r = -EFAULT; |
r600_cs_parser_fini(&parser, r); |
return r; |
} |
r = r600_cs_parse(&parser); |
if (r) { |
DRM_ERROR("Invalid command stream !\n"); |
r600_cs_parser_fini(&parser, r); |
return r; |
} |
r600_cs_parser_fini(&parser, r); |
return r; |
} |
void r600_cs_legacy_init(void) |
{ |
r600_nomm = 1; |
} |
#endif |
/* |
* DMA |
*/ |
/drivers/video/drm/radeon/r600_dpm.c |
---|
156,7 → 156,7 |
struct drm_device *dev = rdev->ddev; |
struct drm_crtc *crtc; |
struct radeon_crtc *radeon_crtc; |
u32 vblank_in_pixels; |
u32 line_time_us, vblank_lines; |
u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */ |
if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { |
163,13 → 163,12 |
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
radeon_crtc = to_radeon_crtc(crtc); |
if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { |
vblank_in_pixels = |
radeon_crtc->hw_mode.crtc_htotal * |
(radeon_crtc->hw_mode.crtc_vblank_end - |
line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) / |
radeon_crtc->hw_mode.clock; |
vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end - |
radeon_crtc->hw_mode.crtc_vdisplay + |
(radeon_crtc->v_border * 2)); |
vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock; |
(radeon_crtc->v_border * 2); |
vblank_time_us = vblank_lines * line_time_us; |
break; |
} |
} |
/drivers/video/drm/radeon/radeon.h |
---|
1884,7 → 1884,7 |
void (*pad_ib)(struct radeon_ib *ib); |
} vm; |
/* ring specific callbacks */ |
struct radeon_asic_ring *ring[RADEON_NUM_RINGS]; |
const struct radeon_asic_ring *ring[RADEON_NUM_RINGS]; |
/* irqs */ |
struct { |
int (*set)(struct radeon_device *rdev); |
2382,6 → 2382,7 |
struct mutex dc_hw_i2c_mutex; /* display controller hw i2c mutex */ |
bool has_uvd; |
struct r600_audio audio; /* audio stuff */ |
struct notifier_block acpi_nb; |
/* only one userspace can use Hyperz features or CMASK at a time */ |
struct drm_file *hyperz_filp; |
struct drm_file *cmask_filp; |
2927,6 → 2928,4 |
resource_size_t |
drm_get_resource_len(struct drm_device *dev, unsigned int resource); |
#define ioread32(addr) readl(addr) |
#endif |
/drivers/video/drm/radeon/radeon_asic.c |
---|
179,7 → 179,7 |
* ASIC |
*/ |
static struct radeon_asic_ring r100_gfx_ring = { |
static const struct radeon_asic_ring r100_gfx_ring = { |
.ib_execute = &r100_ring_ib_execute, |
.emit_fence = &r100_fence_ring_emit, |
.emit_semaphore = &r100_semaphore_ring_emit, |
328,7 → 328,7 |
}, |
}; |
static struct radeon_asic_ring r300_gfx_ring = { |
static const struct radeon_asic_ring r300_gfx_ring = { |
.ib_execute = &r100_ring_ib_execute, |
.emit_fence = &r300_fence_ring_emit, |
.emit_semaphore = &r100_semaphore_ring_emit, |
342,7 → 342,7 |
.set_wptr = &r100_gfx_set_wptr, |
}; |
static struct radeon_asic_ring rv515_gfx_ring = { |
static const struct radeon_asic_ring rv515_gfx_ring = { |
.ib_execute = &r100_ring_ib_execute, |
.emit_fence = &r300_fence_ring_emit, |
.emit_semaphore = &r100_semaphore_ring_emit, |
900,7 → 900,7 |
}, |
}; |
static struct radeon_asic_ring r600_gfx_ring = { |
static const struct radeon_asic_ring r600_gfx_ring = { |
.ib_execute = &r600_ring_ib_execute, |
.emit_fence = &r600_fence_ring_emit, |
.emit_semaphore = &r600_semaphore_ring_emit, |
913,7 → 913,7 |
.set_wptr = &r600_gfx_set_wptr, |
}; |
static struct radeon_asic_ring r600_dma_ring = { |
static const struct radeon_asic_ring r600_dma_ring = { |
.ib_execute = &r600_dma_ring_ib_execute, |
.emit_fence = &r600_dma_fence_ring_emit, |
.emit_semaphore = &r600_dma_semaphore_ring_emit, |
998,7 → 998,7 |
}, |
}; |
static struct radeon_asic_ring rv6xx_uvd_ring = { |
static const struct radeon_asic_ring rv6xx_uvd_ring = { |
.ib_execute = &uvd_v1_0_ib_execute, |
.emit_fence = &uvd_v1_0_fence_emit, |
.emit_semaphore = &uvd_v1_0_semaphore_emit, |
1197,7 → 1197,7 |
}, |
}; |
static struct radeon_asic_ring rv770_uvd_ring = { |
static const struct radeon_asic_ring rv770_uvd_ring = { |
.ib_execute = &uvd_v1_0_ib_execute, |
.emit_fence = &uvd_v2_2_fence_emit, |
.emit_semaphore = &uvd_v2_2_semaphore_emit, |
1304,7 → 1304,7 |
}, |
}; |
static struct radeon_asic_ring evergreen_gfx_ring = { |
static const struct radeon_asic_ring evergreen_gfx_ring = { |
.ib_execute = &evergreen_ring_ib_execute, |
.emit_fence = &r600_fence_ring_emit, |
.emit_semaphore = &r600_semaphore_ring_emit, |
1317,7 → 1317,7 |
.set_wptr = &r600_gfx_set_wptr, |
}; |
static struct radeon_asic_ring evergreen_dma_ring = { |
static const struct radeon_asic_ring evergreen_dma_ring = { |
.ib_execute = &evergreen_dma_ring_ib_execute, |
.emit_fence = &evergreen_dma_fence_ring_emit, |
.emit_semaphore = &r600_dma_semaphore_ring_emit, |
1609,7 → 1609,7 |
}, |
}; |
static struct radeon_asic_ring cayman_gfx_ring = { |
static const struct radeon_asic_ring cayman_gfx_ring = { |
.ib_execute = &cayman_ring_ib_execute, |
.ib_parse = &evergreen_ib_parse, |
.emit_fence = &cayman_fence_ring_emit, |
1624,7 → 1624,7 |
.set_wptr = &cayman_gfx_set_wptr, |
}; |
static struct radeon_asic_ring cayman_dma_ring = { |
static const struct radeon_asic_ring cayman_dma_ring = { |
.ib_execute = &cayman_dma_ring_ib_execute, |
.ib_parse = &evergreen_dma_ib_parse, |
.emit_fence = &evergreen_dma_fence_ring_emit, |
1639,7 → 1639,7 |
.set_wptr = &cayman_dma_set_wptr |
}; |
static struct radeon_asic_ring cayman_uvd_ring = { |
static const struct radeon_asic_ring cayman_uvd_ring = { |
.ib_execute = &uvd_v1_0_ib_execute, |
.emit_fence = &uvd_v2_2_fence_emit, |
.emit_semaphore = &uvd_v3_1_semaphore_emit, |
1757,7 → 1757,7 |
}, |
}; |
static struct radeon_asic_ring trinity_vce_ring = { |
static const struct radeon_asic_ring trinity_vce_ring = { |
.ib_execute = &radeon_vce_ib_execute, |
.emit_fence = &radeon_vce_fence_emit, |
.emit_semaphore = &radeon_vce_semaphore_emit, |
1878,7 → 1878,7 |
}, |
}; |
static struct radeon_asic_ring si_gfx_ring = { |
static const struct radeon_asic_ring si_gfx_ring = { |
.ib_execute = &si_ring_ib_execute, |
.ib_parse = &si_ib_parse, |
.emit_fence = &si_fence_ring_emit, |
1893,7 → 1893,7 |
.set_wptr = &cayman_gfx_set_wptr, |
}; |
static struct radeon_asic_ring si_dma_ring = { |
static const struct radeon_asic_ring si_dma_ring = { |
.ib_execute = &cayman_dma_ring_ib_execute, |
.ib_parse = &evergreen_dma_ib_parse, |
.emit_fence = &evergreen_dma_fence_ring_emit, |
2020,7 → 2020,7 |
}, |
}; |
static struct radeon_asic_ring ci_gfx_ring = { |
static const struct radeon_asic_ring ci_gfx_ring = { |
.ib_execute = &cik_ring_ib_execute, |
.ib_parse = &cik_ib_parse, |
.emit_fence = &cik_fence_gfx_ring_emit, |
2035,7 → 2035,7 |
.set_wptr = &cik_gfx_set_wptr, |
}; |
static struct radeon_asic_ring ci_cp_ring = { |
static const struct radeon_asic_ring ci_cp_ring = { |
.ib_execute = &cik_ring_ib_execute, |
.ib_parse = &cik_ib_parse, |
.emit_fence = &cik_fence_compute_ring_emit, |
2050,7 → 2050,7 |
.set_wptr = &cik_compute_set_wptr, |
}; |
static struct radeon_asic_ring ci_dma_ring = { |
static const struct radeon_asic_ring ci_dma_ring = { |
.ib_execute = &cik_sdma_ring_ib_execute, |
.ib_parse = &cik_ib_parse, |
.emit_fence = &cik_sdma_fence_ring_emit, |
2065,7 → 2065,7 |
.set_wptr = &cik_sdma_set_wptr, |
}; |
static struct radeon_asic_ring ci_vce_ring = { |
static const struct radeon_asic_ring ci_vce_ring = { |
.ib_execute = &radeon_vce_ib_execute, |
.emit_fence = &radeon_vce_fence_emit, |
.emit_semaphore = &radeon_vce_semaphore_emit, |
/drivers/video/drm/radeon/radeon_atombios.c |
---|
1155,7 → 1155,7 |
le16_to_cpu(firmware_info->info.usReferenceClock); |
p1pll->reference_div = 0; |
if ((frev < 2) && (crev < 2)) |
if (crev < 2) |
p1pll->pll_out_min = |
le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output); |
else |
1164,7 → 1164,7 |
p1pll->pll_out_max = |
le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output); |
if (((frev < 2) && (crev >= 4)) || (frev >= 2)) { |
if (crev >= 4) { |
p1pll->lcd_pll_out_min = |
le16_to_cpu(firmware_info->info_14.usLcdMinPixelClockPLL_Output) * 100; |
if (p1pll->lcd_pll_out_min == 0) |
/drivers/video/drm/radeon/radeon_connectors.c |
---|
2030,6 → 2030,7 |
RADEON_OUTPUT_CSC_BYPASS); |
/* no HPD on analog connectors */ |
radeon_connector->hpd.hpd = RADEON_HPD_NONE; |
connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
connector->interlace_allowed = true; |
connector->doublescan_allowed = true; |
break; |
2279,10 → 2280,8 |
} |
if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
if (i2c_bus->valid) { |
connector->polled = DRM_CONNECTOR_POLL_CONNECT | |
DRM_CONNECTOR_POLL_DISCONNECT; |
} |
if (i2c_bus->valid) |
connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
} else |
connector->polled = DRM_CONNECTOR_POLL_HPD; |
2358,6 → 2357,7 |
1); |
/* no HPD on analog connectors */ |
radeon_connector->hpd.hpd = RADEON_HPD_NONE; |
connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
connector->interlace_allowed = true; |
connector->doublescan_allowed = true; |
break; |
2442,13 → 2442,10 |
} |
if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) { |
if (i2c_bus->valid) { |
connector->polled = DRM_CONNECTOR_POLL_CONNECT | |
DRM_CONNECTOR_POLL_DISCONNECT; |
} |
if (i2c_bus->valid) |
connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
} else |
connector->polled = DRM_CONNECTOR_POLL_HPD; |
connector->display_info.subpixel_order = subpixel_order; |
drm_connector_register(connector); |
} |
/drivers/video/drm/radeon/radeon_device.c |
---|
1198,7 → 1198,7 |
} |
if (radeon_vm_size < 1) { |
dev_warn(rdev->dev, "VM size (%d) to small, min is 1GB\n", |
dev_warn(rdev->dev, "VM size (%d) too small, min is 1GB\n", |
radeon_vm_size); |
radeon_vm_size = 4; |
} |
/drivers/video/drm/radeon/radeon_display.c |
---|
998,7 → 998,7 |
{ |
struct radeon_framebuffer *radeon_fb = to_radeon_framebuffer(fb); |
return NULL; |
return 0; |
// return drm_gem_handle_create(file_priv, radeon_fb->obj, handle); |
} |
1010,7 → 1010,7 |
int |
radeon_framebuffer_init(struct drm_device *dev, |
struct radeon_framebuffer *rfb, |
struct drm_mode_fb_cmd2 *mode_cmd, |
const struct drm_mode_fb_cmd2 *mode_cmd, |
struct drm_gem_object *obj) |
{ |
int ret; |
/drivers/video/drm/radeon/radeon_dp_mst.c |
---|
329,7 → 329,7 |
drm_kms_helper_hotplug_event(dev); |
} |
struct drm_dp_mst_topology_cbs mst_cbs = { |
const struct drm_dp_mst_topology_cbs mst_cbs = { |
.add_connector = radeon_dp_add_mst_connector, |
.register_connector = radeon_dp_register_mst_connector, |
.destroy_connector = radeon_dp_destroy_mst_connector, |
639,7 → 639,7 |
} |
drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs, |
DRM_MODE_ENCODER_DPMST); |
DRM_MODE_ENCODER_DPMST, NULL); |
drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs); |
mst_enc = radeon_encoder->enc_priv; |
/drivers/video/drm/radeon/radeon_fb.c |
---|
45,7 → 45,6 |
struct radeon_fbdev { |
struct drm_fb_helper helper; |
struct radeon_framebuffer rfb; |
struct list_head fbdev_list; |
struct radeon_device *rdev; |
}; |
/drivers/video/drm/radeon/radeon_fence.c |
---|
111,7 → 111,7 |
struct radeon_fence **fence, |
int ring) |
{ |
u64 seq = ++rdev->fence_drv[ring].sync_seq[ring]; |
u64 seq; |
/* we are protected by the ring emission mutex */ |
*fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL); |
119,7 → 119,7 |
return -ENOMEM; |
} |
(*fence)->rdev = rdev; |
(*fence)->seq = seq; |
(*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; |
(*fence)->ring = ring; |
(*fence)->is_vm_update = false; |
fence_init(&(*fence)->base, &radeon_fence_ops, |
/drivers/video/drm/radeon/radeon_kms.c |
---|
49,19 → 49,19 |
* radeon_get_vblank_counter_kms - get frame count |
* |
* @dev: drm dev pointer |
* @crtc: crtc to get the frame count from |
* @pipe: crtc to get the frame count from |
* |
* Gets the frame count on the requested crtc (all asics). |
* Returns frame count on success, -EINVAL on failure. |
*/ |
u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc) |
u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe) |
{ |
int vpos, hpos, stat; |
u32 count; |
struct radeon_device *rdev = dev->dev_private; |
if (crtc < 0 || crtc >= rdev->num_crtc) { |
DRM_ERROR("Invalid crtc %d\n", crtc); |
if (pipe >= rdev->num_crtc) { |
DRM_ERROR("Invalid crtc %u\n", pipe); |
return -EINVAL; |
} |
73,21 → 73,21 |
* and start of vsync, so vpos >= 0 means to bump the hw frame counter |
* result by 1 to give the proper appearance to caller. |
*/ |
if (rdev->mode_info.crtcs[crtc]) { |
if (rdev->mode_info.crtcs[pipe]) { |
/* Repeat readout if needed to provide stable result if |
* we cross start of vsync during the queries. |
*/ |
do { |
count = radeon_get_vblank_counter(rdev, crtc); |
count = radeon_get_vblank_counter(rdev, pipe); |
/* Ask radeon_get_crtc_scanoutpos to return vpos as |
* distance to start of vblank, instead of regular |
* vertical scanout pos. |
*/ |
stat = radeon_get_crtc_scanoutpos( |
dev, crtc, GET_DISTANCE_TO_VBLANKSTART, |
dev, pipe, GET_DISTANCE_TO_VBLANKSTART, |
&vpos, &hpos, NULL, NULL, |
&rdev->mode_info.crtcs[crtc]->base.hwmode); |
} while (count != radeon_get_vblank_counter(rdev, crtc)); |
&rdev->mode_info.crtcs[pipe]->base.hwmode); |
} while (count != radeon_get_vblank_counter(rdev, pipe)); |
if (((stat & (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE)) != |
(DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE))) { |
94,8 → 94,8 |
DRM_DEBUG_VBL("Query failed! stat %d\n", stat); |
} |
else { |
DRM_DEBUG_VBL("crtc %d: dist from vblank start %d\n", |
crtc, vpos); |
DRM_DEBUG_VBL("crtc %u: dist from vblank start %d\n", |
pipe, vpos); |
/* Bump counter if we are at >= leading edge of vblank, |
* but before vsync where vpos would turn negative and |
107,7 → 107,7 |
} |
else { |
/* Fallback to use value as is. */ |
count = radeon_get_vblank_counter(rdev, crtc); |
count = radeon_get_vblank_counter(rdev, pipe); |
DRM_DEBUG_VBL("NULL mode info! Returned count may be wrong.\n"); |
} |
/drivers/video/drm/radeon/radeon_legacy_crtc.c |
---|
25,6 → 25,7 |
*/ |
#include <drm/drmP.h> |
#include <drm/drm_crtc_helper.h> |
#include <drm/drm_fb_helper.h> |
#include <drm/radeon_drm.h> |
#include <drm/drm_fixed.h> |
#include "radeon.h" |
/drivers/video/drm/radeon/radeon_legacy_encoders.c |
---|
1772,7 → 1772,8 |
switch (radeon_encoder->encoder_id) { |
case ENCODER_OBJECT_ID_INTERNAL_LVDS: |
encoder->possible_crtcs = 0x1; |
drm_encoder_init(dev, encoder, &radeon_legacy_lvds_enc_funcs, DRM_MODE_ENCODER_LVDS); |
drm_encoder_init(dev, encoder, &radeon_legacy_lvds_enc_funcs, |
DRM_MODE_ENCODER_LVDS, NULL); |
drm_encoder_helper_add(encoder, &radeon_legacy_lvds_helper_funcs); |
if (rdev->is_atom_bios) |
radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder); |
1781,12 → 1782,14 |
radeon_encoder->rmx_type = RMX_FULL; |
break; |
case ENCODER_OBJECT_ID_INTERNAL_TMDS1: |
drm_encoder_init(dev, encoder, &radeon_legacy_tmds_int_enc_funcs, DRM_MODE_ENCODER_TMDS); |
drm_encoder_init(dev, encoder, &radeon_legacy_tmds_int_enc_funcs, |
DRM_MODE_ENCODER_TMDS, NULL); |
drm_encoder_helper_add(encoder, &radeon_legacy_tmds_int_helper_funcs); |
radeon_encoder->enc_priv = radeon_legacy_get_tmds_info(radeon_encoder); |
break; |
case ENCODER_OBJECT_ID_INTERNAL_DAC1: |
drm_encoder_init(dev, encoder, &radeon_legacy_primary_dac_enc_funcs, DRM_MODE_ENCODER_DAC); |
drm_encoder_init(dev, encoder, &radeon_legacy_primary_dac_enc_funcs, |
DRM_MODE_ENCODER_DAC, NULL); |
drm_encoder_helper_add(encoder, &radeon_legacy_primary_dac_helper_funcs); |
if (rdev->is_atom_bios) |
radeon_encoder->enc_priv = radeon_atombios_get_primary_dac_info(radeon_encoder); |
1794,7 → 1797,8 |
radeon_encoder->enc_priv = radeon_combios_get_primary_dac_info(radeon_encoder); |
break; |
case ENCODER_OBJECT_ID_INTERNAL_DAC2: |
drm_encoder_init(dev, encoder, &radeon_legacy_tv_dac_enc_funcs, DRM_MODE_ENCODER_TVDAC); |
drm_encoder_init(dev, encoder, &radeon_legacy_tv_dac_enc_funcs, |
DRM_MODE_ENCODER_TVDAC, NULL); |
drm_encoder_helper_add(encoder, &radeon_legacy_tv_dac_helper_funcs); |
if (rdev->is_atom_bios) |
radeon_encoder->enc_priv = radeon_atombios_get_tv_dac_info(radeon_encoder); |
1802,7 → 1806,8 |
radeon_encoder->enc_priv = radeon_combios_get_tv_dac_info(radeon_encoder); |
break; |
case ENCODER_OBJECT_ID_INTERNAL_DVO1: |
drm_encoder_init(dev, encoder, &radeon_legacy_tmds_ext_enc_funcs, DRM_MODE_ENCODER_TMDS); |
drm_encoder_init(dev, encoder, &radeon_legacy_tmds_ext_enc_funcs, |
DRM_MODE_ENCODER_TMDS, NULL); |
drm_encoder_helper_add(encoder, &radeon_legacy_tmds_ext_helper_funcs); |
if (!rdev->is_atom_bios) |
radeon_encoder->enc_priv = radeon_legacy_get_ext_tmds_info(radeon_encoder); |
/drivers/video/drm/radeon/radeon_mode.h |
---|
936,7 → 936,7 |
u16 *blue, int regno); |
int radeon_framebuffer_init(struct drm_device *dev, |
struct radeon_framebuffer *rfb, |
struct drm_mode_fb_cmd2 *mode_cmd, |
const struct drm_mode_fb_cmd2 *mode_cmd, |
struct drm_gem_object *obj); |
int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); |
/drivers/video/drm/radeon/radeon_object.c |
---|
33,6 → 33,7 |
#include <linux/slab.h> |
#include <drm/drmP.h> |
#include <drm/radeon_drm.h> |
#include <drm/drm_cache.h> |
#include "radeon.h" |
#include "radeon_trace.h" |
/drivers/video/drm/radeon/radeon_pm.c |
---|
273,8 → 273,12 |
if (rdev->irq.installed) { |
for (i = 0; i < rdev->num_crtc; i++) { |
if (rdev->pm.active_crtcs & (1 << i)) { |
/* This can fail if a modeset is in progress */ |
if (drm_vblank_get(rdev->ddev, i) == 0) |
rdev->pm.req_vblank |= (1 << i); |
drm_vblank_get(rdev->ddev, i); |
else |
DRM_DEBUG_DRIVER("crtc %d no vblank, can glitch\n", |
i); |
} |
} |
} |
/drivers/video/drm/radeon/radeon_ttm.c |
---|
247,8 → 247,8 |
rdev = radeon_get_rdev(bo->bdev); |
ridx = radeon_copy_ring_index(rdev); |
old_start = (u64)old_mem->start << PAGE_SHIFT; |
new_start = (u64)new_mem->start << PAGE_SHIFT; |
old_start = old_mem->start << PAGE_SHIFT; |
new_start = new_mem->start << PAGE_SHIFT; |
switch (old_mem->mem_type) { |
case TTM_PL_VRAM: |
/drivers/video/drm/radeon/si_dpm.c |
---|
3015,12 → 3015,6 |
if (rdev->pdev->device == 0x6811 && |
rdev->pdev->revision == 0x81) |
max_mclk = 120000; |
/* limit sclk/mclk on Jet parts for stability */ |
if (rdev->pdev->device == 0x6665 && |
rdev->pdev->revision == 0xc3) { |
max_sclk = 75000; |
max_mclk = 80000; |
} |
if (rps->vce_active) { |
rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; |
4112,7 → 4106,7 |
&rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) { |
si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table); |
table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] = |
table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] = |
cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low); |
si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay, |
/drivers/video/drm/radeon/sislands_smc.h |
---|
194,7 → 194,6 |
#define SISLANDS_SMC_VOLTAGEMASK_VDDC 0 |
#define SISLANDS_SMC_VOLTAGEMASK_MVDD 1 |
#define SISLANDS_SMC_VOLTAGEMASK_VDDCI 2 |
#define SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING 3 |
#define SISLANDS_SMC_VOLTAGEMASK_MAX 4 |
struct SISLANDS_SMC_VOLTAGEMASKTABLE |
/drivers/video/drm/radeon/utils.c |
---|
809,3 → 809,15 |
{ |
return 0; |
}; |
char *strdup(const char *str) |
{ |
size_t len = strlen(str) + 1; |
char *copy = __builtin_malloc(len); |
if (copy) |
{ |
memcpy (copy, str, len); |
} |
return copy; |
} |
/drivers/video/drm/ttm/ttm_bo.c |
---|
116,7 → 116,7 |
list_add_tail(&bo->lru, &man->lru); |
kref_get(&bo->list_kref); |
if (bo->ttm != NULL) { |
if (bo->ttm && !(bo->ttm->page_flags & TTM_PAGE_FLAG_SG)) { |
list_add_tail(&bo->swap, &bo->glob->swap_lru); |
kref_get(&bo->list_kref); |
} |
854,7 → 854,6 |
return false; |
} |
EXPORT_SYMBOL(ttm_bo_mem_compat); |
int ttm_bo_validate(struct ttm_buffer_object *bo, |
struct ttm_placement *placement, |
/drivers/video/drm/ttm/ttm_bo_util.c |
---|
27,8 → 27,6 |
/* |
* Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> |
*/ |
#define iowrite32(v, addr) writel((v), (addr)) |
#define ioread32(addr) readl(addr) |
#include <drm/ttm/ttm_bo_driver.h> |
#include <drm/ttm/ttm_placement.h> |
461,7 → 459,10 |
pgprot_t ttm_io_prot(uint32_t caching_flags, pgprot_t tmp) |
{ |
/* Cached mappings need no adjustment */ |
if (caching_flags & TTM_PL_FLAG_CACHED) |
return tmp; |
return tmp; |
} |
EXPORT_SYMBOL(ttm_io_prot); |
/drivers/video/drm/ttm/ttm_tt.c |
---|
344,7 → 344,7 |
swap_storage = shmem_file_setup("ttm swap", |
ttm->num_pages << PAGE_SHIFT, |
0); |
if (unlikely(IS_ERR(swap_storage))) { |
if (IS_ERR(swap_storage)) { |
pr_err("Failed allocating swap storage\n"); |
return PTR_ERR(swap_storage); |
} |
358,7 → 358,7 |
if (unlikely(from_page == NULL)) |
continue; |
to_page = shmem_read_mapping_page(swap_space, i); |
if (unlikely(IS_ERR(to_page))) { |
if (IS_ERR(to_page)) { |
ret = PTR_ERR(to_page); |
goto out_err; |
} |