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31 halyavin 1 
PCI_CMD_REG  = 04h             ; reg 04, command reg
2 
 IO_ENA      = 0x00000001      ; i/o decode enable
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 MEM_ENA     = 0x00000002      ; memory decode enable
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 BM_ENA      = 0x00000004      ; bus master enable
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pciRegRead8: ; register in CL!
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    mov   bl, 4
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    mov   bh, [bus]
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    mov   ch, [devfn]
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    mcall MF_PCI
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ret
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pciRegRead16:
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    mov   bl, 5
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    mov   bh, [bus]
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    mov   ch, [devfn]
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    mcall MF_PCI
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ret
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pciRegRead32:
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    mov   bl, 6
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    mov   bh, [bus]
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    mov   ch, [devfn]
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    mcall MF_PCI
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ret
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pciRegWrite8: ; value in DL!
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    mov   bl, 8
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    mov   bh, [bus]
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    mov   ch, [devfn]
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    mcall MF_PCI
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ret
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pciRegWrite16:
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    mov   bl, 9
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    mov   bh, [bus]
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    mov   ch, [devfn]
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    mcall MF_PCI
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ret
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pciRegWrite32:
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    mov   bl, 10
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    mov   bh, [bus]
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    mov   ch, [devfn]
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    mcall MF_PCI
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ret