WebSVN – Kolibri OS – Blame – /programs/emulator/dgen-sdl-1.33/musa/m68kdasm.c

Rev	Author	Line No.	Line
9837	turbocat	1	/* ======================================================================== */
		2	/* ========================= LICENSING & COPYRIGHT ======================== */
		3	/* ======================================================================== */
		4	/*
		5	* MUSASHI
		6	* Version 3.31
		7	*
		8	* A portable Motorola M680x0 processor emulation engine.
		9	* Copyright 1998-2007 Karl Stenerud. All rights reserved.
		10	*
		11	* This code may be freely used for non-commercial purposes as long as this
		12	* copyright notice remains unaltered in the source code and any binary files
		13	* containing this code in compiled form.
		14	*
		15	* All other lisencing terms must be negotiated with the author
		16	* (Karl Stenerud).
		17	*
		18	* The latest version of this code can be obtained at:
		19	* http://kstenerud.cjb.net
		20	*/
		21
		22
		23
		24	/* ======================================================================== */
		25	/* ================================ INCLUDES ============================== */
		26	/* ======================================================================== */
		27
		28	#include
		29	#include
		30	#include
		31	#include "m68k.h"
		32
		33	#ifndef DECL_SPEC
		34	#define DECL_SPEC
		35	#endif
		36
		37	/* ======================================================================== */
		38	/* ============================ GENERAL DEFINES =========================== */
		39	/* ======================================================================== */
		40
		41	/* unsigned int and int must be at least 32 bits wide */
		42	#undef uint
		43	#define uint unsigned int
		44
		45	/* Bit Isolation Functions */
		46	#define BIT_0(A) ((A) & 0x00000001)
		47	#define BIT_1(A) ((A) & 0x00000002)
		48	#define BIT_2(A) ((A) & 0x00000004)
		49	#define BIT_3(A) ((A) & 0x00000008)
		50	#define BIT_4(A) ((A) & 0x00000010)
		51	#define BIT_5(A) ((A) & 0x00000020)
		52	#define BIT_6(A) ((A) & 0x00000040)
		53	#define BIT_7(A) ((A) & 0x00000080)
		54	#define BIT_8(A) ((A) & 0x00000100)
		55	#define BIT_9(A) ((A) & 0x00000200)
		56	#define BIT_A(A) ((A) & 0x00000400)
		57	#define BIT_B(A) ((A) & 0x00000800)
		58	#define BIT_C(A) ((A) & 0x00001000)
		59	#define BIT_D(A) ((A) & 0x00002000)
		60	#define BIT_E(A) ((A) & 0x00004000)
		61	#define BIT_F(A) ((A) & 0x00008000)
		62	#define BIT_10(A) ((A) & 0x00010000)
		63	#define BIT_11(A) ((A) & 0x00020000)
		64	#define BIT_12(A) ((A) & 0x00040000)
		65	#define BIT_13(A) ((A) & 0x00080000)
		66	#define BIT_14(A) ((A) & 0x00100000)
		67	#define BIT_15(A) ((A) & 0x00200000)
		68	#define BIT_16(A) ((A) & 0x00400000)
		69	#define BIT_17(A) ((A) & 0x00800000)
		70	#define BIT_18(A) ((A) & 0x01000000)
		71	#define BIT_19(A) ((A) & 0x02000000)
		72	#define BIT_1A(A) ((A) & 0x04000000)
		73	#define BIT_1B(A) ((A) & 0x08000000)
		74	#define BIT_1C(A) ((A) & 0x10000000)
		75	#define BIT_1D(A) ((A) & 0x20000000)
		76	#define BIT_1E(A) ((A) & 0x40000000)
		77	#define BIT_1F(A) ((A) & 0x80000000)
		78
		79	/* These are the CPU types understood by this disassembler */
		80	#define TYPE_68000 1
		81	#define TYPE_68008 2
		82	#define TYPE_68010 4
		83	#define TYPE_68020 8
		84	#define TYPE_68030 16
		85	#define TYPE_68040 32
		86
		87	#define M68000_ONLY (TYPE_68000 \| TYPE_68008)
		88
		89	#define M68010_ONLY TYPE_68010
		90	#define M68010_LESS (TYPE_68000 \| TYPE_68008 \| TYPE_68010)
		91	#define M68010_PLUS (TYPE_68010 \| TYPE_68020 \| TYPE_68030 \| TYPE_68040)
		92
		93	#define M68020_ONLY TYPE_68020
		94	#define M68020_LESS (TYPE_68010 \| TYPE_68020)
		95	#define M68020_PLUS (TYPE_68020 \| TYPE_68030 \| TYPE_68040)
		96
		97	#define M68030_ONLY TYPE_68030
		98	#define M68030_LESS (TYPE_68010 \| TYPE_68020 \| TYPE_68030)
		99	#define M68030_PLUS (TYPE_68030 \| TYPE_68040)
		100
		101	#define M68040_PLUS TYPE_68040
		102
		103
		104	/* Extension word formats */
		105	#define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff)
		106	#define EXT_FULL(A) BIT_8(A)
		107	#define EXT_EFFECTIVE_ZERO(A) (((A)&0xe4) == 0xc4 \|\| ((A)&0xe2) == 0xc0)
		108	#define EXT_BASE_REGISTER_PRESENT(A) (!BIT_7(A))
		109	#define EXT_INDEX_REGISTER_PRESENT(A) (!BIT_6(A))
		110	#define EXT_INDEX_REGISTER(A) (((A)>>12)&7)
		111	#define EXT_INDEX_PRE_POST(A) (EXT_INDEX_PRESENT(A) && (A)&3)
		112	#define EXT_INDEX_PRE(A) (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0)
		113	#define EXT_INDEX_POST(A) (EXT_INDEX_PRESENT(A) && ((A)&7) > 4)
		114	#define EXT_INDEX_SCALE(A) (((A)>>9)&3)
		115	#define EXT_INDEX_LONG(A) BIT_B(A)
		116	#define EXT_INDEX_AR(A) BIT_F(A)
		117	#define EXT_BASE_DISPLACEMENT_PRESENT(A) (((A)&0x30) > 0x10)
		118	#define EXT_BASE_DISPLACEMENT_WORD(A) (((A)&0x30) == 0x20)
		119	#define EXT_BASE_DISPLACEMENT_LONG(A) (((A)&0x30) == 0x30)
		120	#define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44)
		121	#define EXT_OUTER_DISPLACEMENT_WORD(A) (((A)&3) == 2 && ((A)&0x47) < 0x44)
		122	#define EXT_OUTER_DISPLACEMENT_LONG(A) (((A)&3) == 3 && ((A)&0x47) < 0x44)
		123
		124
		125	/* Opcode flags */
		126	#if M68K_COMPILE_FOR_MAME == OPT_ON
		127	#define SET_OPCODE_FLAGS(x) g_opcode_type = x;
		128	#define COMBINE_OPCODE_FLAGS(x) ((x) \| g_opcode_type \| DASMFLAG_SUPPORTED)
		129	#else
		130	#define SET_OPCODE_FLAGS(x)
		131	#define COMBINE_OPCODE_FLAGS(x) (x)
		132	#endif
		133
		134
		135	/* ======================================================================== */
		136	/* =============================== PROTOTYPES ============================= */
		137	/* ======================================================================== */
		138
		139	/* Read data at the PC and increment PC */
		140	uint read_imm_8(void);
		141	uint read_imm_16(void);
		142	uint read_imm_32(void);
		143
		144	/* Read data at the PC but don't imcrement the PC */
		145	uint peek_imm_8(void);
		146	uint peek_imm_16(void);
		147	uint peek_imm_32(void);
		148
		149	/* make signed integers 100% portably */
		150	static int make_int_8(int value);
		151	static int make_int_16(int value);
		152
		153	/* make a string of a hex value */
		154	static char* make_signed_hex_str_8(uint val);
		155	static char* make_signed_hex_str_16(uint val);
		156	static char* make_signed_hex_str_32(uint val);
		157
		158	/* make string of ea mode */
		159	static char* get_ea_mode_str(uint instruction, uint size);
		160
		161	char* get_ea_mode_str_8(uint instruction);
		162	char* get_ea_mode_str_16(uint instruction);
		163	char* get_ea_mode_str_32(uint instruction);
		164
		165	/* make string of immediate value */
		166	static char* get_imm_str_s(uint size);
		167	static char* get_imm_str_u(uint size);
		168
		169	char* get_imm_str_s8(void);
		170	char* get_imm_str_s16(void);
		171	char* get_imm_str_s32(void);
		172
		173	/* Stuff to build the opcode handler jump table */
		174	static void build_opcode_table(void);
		175	static int valid_ea(uint opcode, uint mask);
		176	static int DECL_SPEC compare_nof_true_bits(const void aptr, const void bptr);
		177
		178	/* used to build opcode handler jump table */
		179	typedef struct
		180	{
		181	void (opcode_handler)(void); / handler function */
		182	uint mask; /* mask on opcode */
		183	uint match; /* what to match after masking */
		184	uint ea_mask; /* what ea modes are allowed */
		185	} opcode_struct;
		186
		187
		188
		189	/* ======================================================================== */
		190	/* ================================= DATA ================================= */
		191	/* ======================================================================== */
		192
		193	/* Opcode handler jump table */
		194	static void (*g_instruction_table[0x10000])(void);
		195	/* Flag if disassembler initialized */
		196	static int g_initialized = 0;
		197
		198	/* Address mask to simulate address lines */
		199	static unsigned int g_address_mask = 0xffffffff;
		200
		201	static char g_dasm_str[100]; /* string to hold disassembly */
		202	static char g_helper_str[100]; /* string to hold helpful info */
		203	static uint g_cpu_pc; /* program counter */
		204	static uint g_cpu_ir; /* instruction register */
		205	static uint g_cpu_type;
		206	static uint g_opcode_type;
		207	static const unsigned char* g_rawop;
		208	static uint g_rawbasepc;
		209
		210	/* used by ops like asr, ror, addq, etc */
		211	static uint g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
		212
		213	static uint g_5bit_data_table[32] =
		214	{
		215	32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
		216	16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
		217	};
		218
		219	static const char* g_cc[16] =
		220	{"t", "f", "hi", "ls", "cc", "cs", "ne", "eq", "vc", "vs", "pl", "mi", "ge", "lt", "gt", "le"};
		221
		222	static const char* g_cpcc[64] =
		223	{/* 000 001 010 011 100 101 110 111 */
		224	"f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */
		225	"un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */
		226	"sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */
		227	"ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */
		228	"?", "?", "?", "?", "?", "?", "?", "?", /* 100 */
		229	"?", "?", "?", "?", "?", "?", "?", "?", /* 101 */
		230	"?", "?", "?", "?", "?", "?", "?", "?", /* 110 */
		231	"?", "?", "?", "?", "?", "?", "?", "?" /* 111 */
		232	};
		233
		234
		235	/* ======================================================================== */
		236	/* =========================== UTILITY FUNCTIONS ========================== */
		237	/* ======================================================================== */
		238
		239	#define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \
		240	if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \
		241	{ \
		242	if((g_cpu_ir & 0xf000) == 0xf000) \
		243	d68000_1111(); \
		244	else d68000_illegal(); \
		245	return; \
		246	}
		247
		248	static uint dasm_read_imm_8(uint advance)
		249	{
		250	uint result;
		251	if (g_rawop)
		252	result = g_rawop[g_cpu_pc + 1 - g_rawbasepc];
		253	else
		254	result = m68k_read_disassembler_8(g_cpu_pc & g_address_mask) & 0xff;
		255	g_cpu_pc += advance;
		256	return result;
		257	}
		258
		259	static uint dasm_read_imm_16(uint advance)
		260	{
		261	uint result;
		262	if (g_rawop)
		263	result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 8) \|
		264	g_rawop[g_cpu_pc + 1 - g_rawbasepc];
		265	else
		266	result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xffff;
		267	g_cpu_pc += advance;
		268	return result;
		269	}
		270
		271	static uint dasm_read_imm_32(uint advance)
		272	{
		273	uint result;
		274	if (g_rawop)
		275	result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 24) \|
		276	(g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) \|
		277	(g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) \|
		278	g_rawop[g_cpu_pc + 3 - g_rawbasepc];
		279	else
		280	result = m68k_read_disassembler_32(g_cpu_pc & g_address_mask) & 0xffffffff;
		281	g_cpu_pc += advance;
		282	return result;
		283	}
		284
		285	#define read_imm_8() dasm_read_imm_8(2)
		286	#define read_imm_16() dasm_read_imm_16(2)
		287	#define read_imm_32() dasm_read_imm_32(4)
		288
		289	#define peek_imm_8() dasm_read_imm_8(0)
		290	#define peek_imm_16() dasm_read_imm_16(0)
		291	#define peek_imm_32() dasm_read_imm_32(0)
		292
		293	/* Fake a split interface */
		294	#define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0)
		295	#define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1)
		296	#define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2)
		297
		298	#define get_imm_str_s8() get_imm_str_s(0)
		299	#define get_imm_str_s16() get_imm_str_s(1)
		300	#define get_imm_str_s32() get_imm_str_s(2)
		301
		302	#define get_imm_str_u8() get_imm_str_u(0)
		303	#define get_imm_str_u16() get_imm_str_u(1)
		304	#define get_imm_str_u32() get_imm_str_u(2)
		305
		306
		307	/* 100% portable signed int generators */
		308	static int make_int_8(int value)
		309	{
		310	return (value & 0x80) ? value \| ~0xff : value & 0xff;
		311	}
		312
		313	static int make_int_16(int value)
		314	{
		315	return (value & 0x8000) ? value \| ~0xffff : value & 0xffff;
		316	}
		317
		318
		319	/* Get string representation of hex values */
		320	static char* make_signed_hex_str_8(uint val)
		321	{
		322	static char str[20];
		323
		324	val &= 0xff;
		325
		326	if(val == 0x80)
		327	sprintf(str, "-$80");
		328	else if(val & 0x80)
		329	sprintf(str, "-$%x", (0-val) & 0x7f);
		330	else
		331	sprintf(str, "$%x", val & 0x7f);
		332
		333	return str;
		334	}
		335
		336	static char* make_signed_hex_str_16(uint val)
		337	{
		338	static char str[20];
		339
		340	val &= 0xffff;
		341
		342	if(val == 0x8000)
		343	sprintf(str, "-$8000");
		344	else if(val & 0x8000)
		345	sprintf(str, "-$%x", (0-val) & 0x7fff);
		346	else
		347	sprintf(str, "$%x", val & 0x7fff);
		348
		349	return str;
		350	}
		351
		352	static char* make_signed_hex_str_32(uint val)
		353	{
		354	static char str[20];
		355
		356	val &= 0xffffffff;
		357
		358	if(val == 0x80000000)
		359	sprintf(str, "-$80000000");
		360	else if(val & 0x80000000)
		361	sprintf(str, "-$%x", (0-val) & 0x7fffffff);
		362	else
		363	sprintf(str, "$%x", val & 0x7fffffff);
		364
		365	return str;
		366	}
		367
		368
		369	/* make string of immediate value */
		370	static char* get_imm_str_s(uint size)
		371	{
		372	static char str[15];
		373	if(size == 0)
		374	sprintf(str, "#%s", make_signed_hex_str_8(read_imm_8()));
		375	else if(size == 1)
		376	sprintf(str, "#%s", make_signed_hex_str_16(read_imm_16()));
		377	else
		378	sprintf(str, "#%s", make_signed_hex_str_32(read_imm_32()));
		379	return str;
		380	}
		381
		382	static char* get_imm_str_u(uint size)
		383	{
		384	static char str[15];
		385	if(size == 0)
		386	sprintf(str, "#$%x", read_imm_8() & 0xff);
		387	else if(size == 1)
		388	sprintf(str, "#$%x", read_imm_16() & 0xffff);
		389	else
		390	sprintf(str, "#$%x", read_imm_32() & 0xffffffff);
		391	return str;
		392	}
		393
		394	/* Make string of effective address mode */
		395	static char* get_ea_mode_str(uint instruction, uint size)
		396	{
		397	static char b1[64];
		398	static char b2[64];
		399	static char* mode = b2;
		400	uint extension;
		401	uint base;
		402	uint outer;
		403	char base_reg[4];
		404	char index_reg[8];
		405	uint preindex;
		406	uint postindex;
		407	uint comma = 0;
		408	uint temp_value;
		409	char invalid_mode = 0;
		410
		411	/* Switch buffers so we don't clobber on a double-call to this function */
		412	mode = mode == b1 ? b2 : b1;
		413
		414	switch(instruction & 0x3f)
		415	{
		416	case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
		417	/* data register direct */
		418	sprintf(mode, "D%d", instruction&7);
		419	break;
		420	case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
		421	/* address register direct */
		422	sprintf(mode, "A%d", instruction&7);
		423	break;
		424	case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
		425	/* address register indirect */
		426	sprintf(mode, "(A%d)", instruction&7);
		427	break;
		428	case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
		429	/* address register indirect with postincrement */
		430	sprintf(mode, "(A%d)+", instruction&7);
		431	break;
		432	case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
		433	/* address register indirect with predecrement */
		434	sprintf(mode, "-(A%d)", instruction&7);
		435	break;
		436	case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
		437	/* address register indirect with displacement*/
		438	sprintf(mode, "(%s,A%d)", make_signed_hex_str_16(read_imm_16()), instruction&7);
		439	break;
		440	case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
		441	/* address register indirect with index */
		442	extension = read_imm_16();
		443
		444	if((g_cpu_type & M68010_LESS) && EXT_INDEX_SCALE(extension))
		445	{
		446	invalid_mode = 1;
		447	break;
		448	}
		449
		450	if(EXT_FULL(extension))
		451	{
		452	if(g_cpu_type & M68010_LESS)
		453	{
		454	invalid_mode = 1;
		455	break;
		456	}
		457
		458	if(EXT_EFFECTIVE_ZERO(extension))
		459	{
		460	strcpy(mode, "0");
		461	break;
		462	}
		463
		464	base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
		465	outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
		466	if(EXT_BASE_REGISTER_PRESENT(extension))
		467	sprintf(base_reg, "A%d", instruction&7);
		468	else
		469	*base_reg = 0;
		470	if(EXT_INDEX_REGISTER_PRESENT(extension))
		471	{
		472	sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
		473	if(EXT_INDEX_SCALE(extension))
		474	sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
		475	}
		476	else
		477	*index_reg = 0;
		478	preindex = (extension&7) > 0 && (extension&7) < 4;
		479	postindex = (extension&7) > 4;
		480
		481	strcpy(mode, "(");
		482	if(preindex \|\| postindex)
		483	strcat(mode, "[");
		484	if(base)
		485	{
		486	strcat(mode, make_signed_hex_str_16(base));
		487	comma = 1;
		488	}
		489	if(*base_reg)
		490	{
		491	if(comma)
		492	strcat(mode, ",");
		493	strcat(mode, base_reg);
		494	comma = 1;
		495	}
		496	if(postindex)
		497	{
		498	strcat(mode, "]");
		499	comma = 1;
		500	}
		501	if(*index_reg)
		502	{
		503	if(comma)
		504	strcat(mode, ",");
		505	strcat(mode, index_reg);
		506	comma = 1;
		507	}
		508	if(preindex)
		509	{
		510	strcat(mode, "]");
		511	comma = 1;
		512	}
		513	if(outer)
		514	{
		515	if(comma)
		516	strcat(mode, ",");
		517	strcat(mode, make_signed_hex_str_16(outer));
		518	}
		519	strcat(mode, ")");
		520	break;
		521	}
		522
		523	if(EXT_8BIT_DISPLACEMENT(extension) == 0)
		524	sprintf(mode, "(A%d,%c%d.%c", instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
		525	else
		526	sprintf(mode, "(%s,A%d,%c%d.%c", make_signed_hex_str_8(extension), instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
		527	if(EXT_INDEX_SCALE(extension))
		528	sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
		529	strcat(mode, ")");
		530	break;
		531	case 0x38:
		532	/* absolute short address */
		533	sprintf(mode, "$%x.w", read_imm_16());
		534	break;
		535	case 0x39:
		536	/* absolute long address */
		537	sprintf(mode, "$%x.l", read_imm_32());
		538	break;
		539	case 0x3a:
		540	/* program counter with displacement */
		541	temp_value = read_imm_16();
		542	sprintf(mode, "(%s,PC)", make_signed_hex_str_16(temp_value));
		543	sprintf(g_helper_str, "; ($%x)", (make_int_16(temp_value) + g_cpu_pc-2) & 0xffffffff);
		544	break;
		545	case 0x3b:
		546	/* program counter with index */
		547	extension = read_imm_16();
		548
		549	if((g_cpu_type & M68010_LESS) && EXT_INDEX_SCALE(extension))
		550	{
		551	invalid_mode = 1;
		552	break;
		553	}
		554
		555	if(EXT_FULL(extension))
		556	{
		557	if(g_cpu_type & M68010_LESS)
		558	{
		559	invalid_mode = 1;
		560	break;
		561	}
		562
		563	if(EXT_EFFECTIVE_ZERO(extension))
		564	{
		565	strcpy(mode, "0");
		566	break;
		567	}
		568	base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
		569	outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
		570	if(EXT_BASE_REGISTER_PRESENT(extension))
		571	strcpy(base_reg, "PC");
		572	else
		573	*base_reg = 0;
		574	if(EXT_INDEX_REGISTER_PRESENT(extension))
		575	{
		576	sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
		577	if(EXT_INDEX_SCALE(extension))
		578	sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
		579	}
		580	else
		581	*index_reg = 0;
		582	preindex = (extension&7) > 0 && (extension&7) < 4;
		583	postindex = (extension&7) > 4;
		584
		585	strcpy(mode, "(");
		586	if(preindex \|\| postindex)
		587	strcat(mode, "[");
		588	if(base)
		589	{
		590	strcat(mode, make_signed_hex_str_16(base));
		591	comma = 1;
		592	}
		593	if(*base_reg)
		594	{
		595	if(comma)
		596	strcat(mode, ",");
		597	strcat(mode, base_reg);
		598	comma = 1;
		599	}
		600	if(postindex)
		601	{
		602	strcat(mode, "]");
		603	comma = 1;
		604	}
		605	if(*index_reg)
		606	{
		607	if(comma)
		608	strcat(mode, ",");
		609	strcat(mode, index_reg);
		610	comma = 1;
		611	}
		612	if(preindex)
		613	{
		614	strcat(mode, "]");
		615	comma = 1;
		616	}
		617	if(outer)
		618	{
		619	if(comma)
		620	strcat(mode, ",");
		621	strcat(mode, make_signed_hex_str_16(outer));
		622	}
		623	strcat(mode, ")");
		624	break;
		625	}
		626
		627	if(EXT_8BIT_DISPLACEMENT(extension) == 0)
		628	sprintf(mode, "(PC,%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
		629	else
		630	sprintf(mode, "(%s,PC,%c%d.%c", make_signed_hex_str_8(extension), EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
		631	if(EXT_INDEX_SCALE(extension))
		632	sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
		633	strcat(mode, ")");
		634	break;
		635	case 0x3c:
		636	/* Immediate */
		637	sprintf(mode, "%s", get_imm_str_u(size));
		638	break;
		639	default:
		640	invalid_mode = 1;
		641	}
		642
		643	if(invalid_mode)
		644	sprintf(mode, "INVALID %x", instruction & 0x3f);
		645
		646	return mode;
		647	}
		648
		649
		650
		651	/* ======================================================================== */
		652	/* ========================= INSTRUCTION HANDLERS ========================= */
		653	/* ======================================================================== */
		654	/* Instruction handler function names follow this convention:
		655	*
		656	* d68000_NAME_EXTENSIONS(void)
		657	* where NAME is the name of the opcode it handles and EXTENSIONS are any
		658	* extensions for special instances of that opcode.
		659	*
		660	* Examples:
		661	* d68000_add_er_8(): add opcode, from effective address to register,
		662	* size = byte
		663	*
		664	* d68000_asr_s_8(): arithmetic shift right, static count, size = byte
		665	*
		666	*
		667	* Common extensions:
		668	* 8 : size = byte
		669	* 16 : size = word
		670	* 32 : size = long
		671	* rr : register to register
		672	* mm : memory to memory
		673	* r : register
		674	* s : static
		675	* er : effective address -> register
		676	* re : register -> effective address
		677	* ea : using effective address mode of operation
		678	* d : data register direct
		679	* a : address register direct
		680	* ai : address register indirect
		681	* pi : address register indirect with postincrement
		682	* pd : address register indirect with predecrement
		683	* di : address register indirect with displacement
		684	* ix : address register indirect with index
		685	* aw : absolute word
		686	* al : absolute long
		687	*/
		688
		689	static void d68000_illegal(void)
		690	{
		691	sprintf(g_dasm_str, "dc.w $%04x; ILLEGAL", g_cpu_ir);
		692	}
		693
		694	static void d68000_1010(void)
		695	{
		696	sprintf(g_dasm_str, "dc.w $%04x; opcode 1010", g_cpu_ir);
		697	}
		698
		699
		700	static void d68000_1111(void)
		701	{
		702	sprintf(g_dasm_str, "dc.w $%04x; opcode 1111", g_cpu_ir);
		703	}
		704
		705
		706	static void d68000_abcd_rr(void)
		707	{
		708	sprintf(g_dasm_str, "abcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		709	}
		710
		711
		712	static void d68000_abcd_mm(void)
		713	{
		714	sprintf(g_dasm_str, "abcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		715	}
		716
		717	static void d68000_add_er_8(void)
		718	{
		719	sprintf(g_dasm_str, "add.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
		720	}
		721
		722
		723	static void d68000_add_er_16(void)
		724	{
		725	sprintf(g_dasm_str, "add.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		726	}
		727
		728	static void d68000_add_er_32(void)
		729	{
		730	sprintf(g_dasm_str, "add.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		731	}
		732
		733	static void d68000_add_re_8(void)
		734	{
		735	sprintf(g_dasm_str, "add.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		736	}
		737
		738	static void d68000_add_re_16(void)
		739	{
		740	sprintf(g_dasm_str, "add.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
		741	}
		742
		743	static void d68000_add_re_32(void)
		744	{
		745	sprintf(g_dasm_str, "add.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
		746	}
		747
		748	static void d68000_adda_16(void)
		749	{
		750	sprintf(g_dasm_str, "adda.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		751	}
		752
		753	static void d68000_adda_32(void)
		754	{
		755	sprintf(g_dasm_str, "adda.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		756	}
		757
		758	static void d68000_addi_8(void)
		759	{
		760	char* str = get_imm_str_s8();
		761	sprintf(g_dasm_str, "addi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
		762	}
		763
		764	static void d68000_addi_16(void)
		765	{
		766	char* str = get_imm_str_s16();
		767	sprintf(g_dasm_str, "addi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
		768	}
		769
		770	static void d68000_addi_32(void)
		771	{
		772	char* str = get_imm_str_s32();
		773	sprintf(g_dasm_str, "addi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
		774	}
		775
		776	static void d68000_addq_8(void)
		777	{
		778	sprintf(g_dasm_str, "addq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
		779	}
		780
		781	static void d68000_addq_16(void)
		782	{
		783	sprintf(g_dasm_str, "addq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
		784	}
		785
		786	static void d68000_addq_32(void)
		787	{
		788	sprintf(g_dasm_str, "addq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
		789	}
		790
		791	static void d68000_addx_rr_8(void)
		792	{
		793	sprintf(g_dasm_str, "addx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		794	}
		795
		796	static void d68000_addx_rr_16(void)
		797	{
		798	sprintf(g_dasm_str, "addx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		799	}
		800
		801	static void d68000_addx_rr_32(void)
		802	{
		803	sprintf(g_dasm_str, "addx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		804	}
		805
		806	static void d68000_addx_mm_8(void)
		807	{
		808	sprintf(g_dasm_str, "addx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		809	}
		810
		811	static void d68000_addx_mm_16(void)
		812	{
		813	sprintf(g_dasm_str, "addx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		814	}
		815
		816	static void d68000_addx_mm_32(void)
		817	{
		818	sprintf(g_dasm_str, "addx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		819	}
		820
		821	static void d68000_and_er_8(void)
		822	{
		823	sprintf(g_dasm_str, "and.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
		824	}
		825
		826	static void d68000_and_er_16(void)
		827	{
		828	sprintf(g_dasm_str, "and.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		829	}
		830
		831	static void d68000_and_er_32(void)
		832	{
		833	sprintf(g_dasm_str, "and.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		834	}
		835
		836	static void d68000_and_re_8(void)
		837	{
		838	sprintf(g_dasm_str, "and.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		839	}
		840
		841	static void d68000_and_re_16(void)
		842	{
		843	sprintf(g_dasm_str, "and.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
		844	}
		845
		846	static void d68000_and_re_32(void)
		847	{
		848	sprintf(g_dasm_str, "and.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
		849	}
		850
		851	static void d68000_andi_8(void)
		852	{
		853	char* str = get_imm_str_u8();
		854	sprintf(g_dasm_str, "andi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
		855	}
		856
		857	static void d68000_andi_16(void)
		858	{
		859	char* str = get_imm_str_u16();
		860	sprintf(g_dasm_str, "andi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
		861	}
		862
		863	static void d68000_andi_32(void)
		864	{
		865	char* str = get_imm_str_u32();
		866	sprintf(g_dasm_str, "andi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
		867	}
		868
		869	static void d68000_andi_to_ccr(void)
		870	{
		871	sprintf(g_dasm_str, "andi %s, CCR", get_imm_str_u8());
		872	}
		873
		874	static void d68000_andi_to_sr(void)
		875	{
		876	sprintf(g_dasm_str, "andi %s, SR", get_imm_str_u16());
		877	}
		878
		879	static void d68000_asr_s_8(void)
		880	{
		881	sprintf(g_dasm_str, "asr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		882	}
		883
		884	static void d68000_asr_s_16(void)
		885	{
		886	sprintf(g_dasm_str, "asr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		887	}
		888
		889	static void d68000_asr_s_32(void)
		890	{
		891	sprintf(g_dasm_str, "asr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		892	}
		893
		894	static void d68000_asr_r_8(void)
		895	{
		896	sprintf(g_dasm_str, "asr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		897	}
		898
		899	static void d68000_asr_r_16(void)
		900	{
		901	sprintf(g_dasm_str, "asr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		902	}
		903
		904	static void d68000_asr_r_32(void)
		905	{
		906	sprintf(g_dasm_str, "asr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		907	}
		908
		909	static void d68000_asr_ea(void)
		910	{
		911	sprintf(g_dasm_str, "asr.w %s", get_ea_mode_str_16(g_cpu_ir));
		912	}
		913
		914	static void d68000_asl_s_8(void)
		915	{
		916	sprintf(g_dasm_str, "asl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		917	}
		918
		919	static void d68000_asl_s_16(void)
		920	{
		921	sprintf(g_dasm_str, "asl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		922	}
		923
		924	static void d68000_asl_s_32(void)
		925	{
		926	sprintf(g_dasm_str, "asl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		927	}
		928
		929	static void d68000_asl_r_8(void)
		930	{
		931	sprintf(g_dasm_str, "asl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		932	}
		933
		934	static void d68000_asl_r_16(void)
		935	{
		936	sprintf(g_dasm_str, "asl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		937	}
		938
		939	static void d68000_asl_r_32(void)
		940	{
		941	sprintf(g_dasm_str, "asl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		942	}
		943
		944	static void d68000_asl_ea(void)
		945	{
		946	sprintf(g_dasm_str, "asl.w %s", get_ea_mode_str_16(g_cpu_ir));
		947	}
		948
		949	static void d68000_bcc_8(void)
		950	{
		951	uint temp_pc = g_cpu_pc;
		952	sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_8(g_cpu_ir));
		953	}
		954
		955	static void d68000_bcc_16(void)
		956	{
		957	uint temp_pc = g_cpu_pc;
		958	sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16()));
		959	}
		960
		961	static void d68020_bcc_32(void)
		962	{
		963	uint temp_pc = g_cpu_pc;
		964	LIMIT_CPU_TYPES(M68020_PLUS);
		965	sprintf(g_dasm_str, "b%-2s $%x; (2+)", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + read_imm_32());
		966	}
		967
		968	static void d68000_bchg_r(void)
		969	{
		970	sprintf(g_dasm_str, "bchg D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		971	}
		972
		973	static void d68000_bchg_s(void)
		974	{
		975	char* str = get_imm_str_u8();
		976	sprintf(g_dasm_str, "bchg %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
		977	}
		978
		979	static void d68000_bclr_r(void)
		980	{
		981	sprintf(g_dasm_str, "bclr D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		982	}
		983
		984	static void d68000_bclr_s(void)
		985	{
		986	char* str = get_imm_str_u8();
		987	sprintf(g_dasm_str, "bclr %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
		988	}
		989
		990	static void d68010_bkpt(void)
		991	{
		992	LIMIT_CPU_TYPES(M68010_PLUS);
		993	sprintf(g_dasm_str, "bkpt #%d; (1+)", g_cpu_ir&7);
		994	}
		995
		996	static void d68020_bfchg(void)
		997	{
		998	uint extension;
		999	char offset[3];
		1000	char width[3];
		1001
		1002	LIMIT_CPU_TYPES(M68020_PLUS);
		1003
		1004	extension = read_imm_16();
		1005
		1006	if(BIT_B(extension))
		1007	sprintf(offset, "D%d", (extension>>6)&7);
		1008	else
		1009	sprintf(offset, "%d", (extension>>6)&31);
		1010	if(BIT_5(extension))
		1011	sprintf(width, "D%d", extension&7);
		1012	else
		1013	sprintf(width, "%d", g_5bit_data_table[extension&31]);
		1014	sprintf(g_dasm_str, "bfchg %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
		1015	}
		1016
		1017	static void d68020_bfclr(void)
		1018	{
		1019	uint extension;
		1020	char offset[3];
		1021	char width[3];
		1022
		1023	LIMIT_CPU_TYPES(M68020_PLUS);
		1024
		1025	extension = read_imm_16();
		1026
		1027	if(BIT_B(extension))
		1028	sprintf(offset, "D%d", (extension>>6)&7);
		1029	else
		1030	sprintf(offset, "%d", (extension>>6)&31);
		1031	if(BIT_5(extension))
		1032	sprintf(width, "D%d", extension&7);
		1033	else
		1034	sprintf(width, "%d", g_5bit_data_table[extension&31]);
		1035	sprintf(g_dasm_str, "bfclr %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
		1036	}
		1037
		1038	static void d68020_bfexts(void)
		1039	{
		1040	uint extension;
		1041	char offset[3];
		1042	char width[3];
		1043
		1044	LIMIT_CPU_TYPES(M68020_PLUS);
		1045
		1046	extension = read_imm_16();
		1047
		1048	if(BIT_B(extension))
		1049	sprintf(offset, "D%d", (extension>>6)&7);
		1050	else
		1051	sprintf(offset, "%d", (extension>>6)&31);
		1052	if(BIT_5(extension))
		1053	sprintf(width, "D%d", extension&7);
		1054	else
		1055	sprintf(width, "%d", g_5bit_data_table[extension&31]);
		1056	sprintf(g_dasm_str, "bfexts D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
		1057	}
		1058
		1059	static void d68020_bfextu(void)
		1060	{
		1061	uint extension;
		1062	char offset[3];
		1063	char width[3];
		1064
		1065	LIMIT_CPU_TYPES(M68020_PLUS);
		1066
		1067	extension = read_imm_16();
		1068
		1069	if(BIT_B(extension))
		1070	sprintf(offset, "D%d", (extension>>6)&7);
		1071	else
		1072	sprintf(offset, "%d", (extension>>6)&31);
		1073	if(BIT_5(extension))
		1074	sprintf(width, "D%d", extension&7);
		1075	else
		1076	sprintf(width, "%d", g_5bit_data_table[extension&31]);
		1077	sprintf(g_dasm_str, "bfextu D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
		1078	}
		1079
		1080	static void d68020_bfffo(void)
		1081	{
		1082	uint extension;
		1083	char offset[3];
		1084	char width[3];
		1085
		1086	LIMIT_CPU_TYPES(M68020_PLUS);
		1087
		1088	extension = read_imm_16();
		1089
		1090	if(BIT_B(extension))
		1091	sprintf(offset, "D%d", (extension>>6)&7);
		1092	else
		1093	sprintf(offset, "%d", (extension>>6)&31);
		1094	if(BIT_5(extension))
		1095	sprintf(width, "D%d", extension&7);
		1096	else
		1097	sprintf(width, "%d", g_5bit_data_table[extension&31]);
		1098	sprintf(g_dasm_str, "bfffo D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
		1099	}
		1100
		1101	static void d68020_bfins(void)
		1102	{
		1103	uint extension;
		1104	char offset[3];
		1105	char width[3];
		1106
		1107	LIMIT_CPU_TYPES(M68020_PLUS);
		1108
		1109	extension = read_imm_16();
		1110
		1111	if(BIT_B(extension))
		1112	sprintf(offset, "D%d", (extension>>6)&7);
		1113	else
		1114	sprintf(offset, "%d", (extension>>6)&31);
		1115	if(BIT_5(extension))
		1116	sprintf(width, "D%d", extension&7);
		1117	else
		1118	sprintf(width, "%d", g_5bit_data_table[extension&31]);
		1119	sprintf(g_dasm_str, "bfins D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);
		1120	}
		1121
		1122	static void d68020_bfset(void)
		1123	{
		1124	uint extension;
		1125	char offset[3];
		1126	char width[3];
		1127
		1128	LIMIT_CPU_TYPES(M68020_PLUS);
		1129
		1130	extension = read_imm_16();
		1131
		1132	if(BIT_B(extension))
		1133	sprintf(offset, "D%d", (extension>>6)&7);
		1134	else
		1135	sprintf(offset, "%d", (extension>>6)&31);
		1136	if(BIT_5(extension))
		1137	sprintf(width, "D%d", extension&7);
		1138	else
		1139	sprintf(width, "%d", g_5bit_data_table[extension&31]);
		1140	sprintf(g_dasm_str, "bfset %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
		1141	}
		1142
		1143	static void d68020_bftst(void)
		1144	{
		1145	uint extension;
		1146	char offset[3];
		1147	char width[3];
		1148
		1149	LIMIT_CPU_TYPES(M68020_PLUS);
		1150
		1151	extension = read_imm_16();
		1152
		1153	if(BIT_B(extension))
		1154	sprintf(offset, "D%d", (extension>>6)&7);
		1155	else
		1156	sprintf(offset, "%d", (extension>>6)&31);
		1157	if(BIT_5(extension))
		1158	sprintf(width, "D%d", extension&7);
		1159	else
		1160	sprintf(width, "%d", g_5bit_data_table[extension&31]);
		1161	sprintf(g_dasm_str, "bftst %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);
		1162	}
		1163
		1164	static void d68000_bra_8(void)
		1165	{
		1166	uint temp_pc = g_cpu_pc;
		1167	sprintf(g_dasm_str, "bra $%x", temp_pc + make_int_8(g_cpu_ir));
		1168	}
		1169
		1170	static void d68000_bra_16(void)
		1171	{
		1172	uint temp_pc = g_cpu_pc;
		1173	sprintf(g_dasm_str, "bra $%x", temp_pc + make_int_16(read_imm_16()));
		1174	}
		1175
		1176	static void d68020_bra_32(void)
		1177	{
		1178	uint temp_pc = g_cpu_pc;
		1179	LIMIT_CPU_TYPES(M68020_PLUS);
		1180	sprintf(g_dasm_str, "bra $%x; (2+)", temp_pc + read_imm_32());
		1181	}
		1182
		1183	static void d68000_bset_r(void)
		1184	{
		1185	sprintf(g_dasm_str, "bset D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		1186	}
		1187
		1188	static void d68000_bset_s(void)
		1189	{
		1190	char* str = get_imm_str_u8();
		1191	sprintf(g_dasm_str, "bset %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
		1192	}
		1193
		1194	static void d68000_bsr_8(void)
		1195	{
		1196	uint temp_pc = g_cpu_pc;
		1197	sprintf(g_dasm_str, "bsr $%x", temp_pc + make_int_8(g_cpu_ir));
		1198	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		1199	}
		1200
		1201	static void d68000_bsr_16(void)
		1202	{
		1203	uint temp_pc = g_cpu_pc;
		1204	sprintf(g_dasm_str, "bsr $%x", temp_pc + make_int_16(read_imm_16()));
		1205	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		1206	}
		1207
		1208	static void d68020_bsr_32(void)
		1209	{
		1210	uint temp_pc = g_cpu_pc;
		1211	LIMIT_CPU_TYPES(M68020_PLUS);
		1212	sprintf(g_dasm_str, "bsr $%x; (2+)", temp_pc + read_imm_32());
		1213	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		1214	}
		1215
		1216	static void d68000_btst_r(void)
		1217	{
		1218	sprintf(g_dasm_str, "btst D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		1219	}
		1220
		1221	static void d68000_btst_s(void)
		1222	{
		1223	char* str = get_imm_str_u8();
		1224	sprintf(g_dasm_str, "btst %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
		1225	}
		1226
		1227	static void d68020_callm(void)
		1228	{
		1229	char* str;
		1230	LIMIT_CPU_TYPES(M68020_ONLY);
		1231	str = get_imm_str_u8();
		1232
		1233	sprintf(g_dasm_str, "callm %s, %s; (2)", str, get_ea_mode_str_8(g_cpu_ir));
		1234	}
		1235
		1236	static void d68020_cas_8(void)
		1237	{
		1238	uint extension;
		1239	LIMIT_CPU_TYPES(M68020_PLUS);
		1240	extension = read_imm_16();
		1241	sprintf(g_dasm_str, "cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_8(g_cpu_ir));
		1242	}
		1243
		1244	static void d68020_cas_16(void)
		1245	{
		1246	uint extension;
		1247	LIMIT_CPU_TYPES(M68020_PLUS);
		1248	extension = read_imm_16();
		1249	sprintf(g_dasm_str, "cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_16(g_cpu_ir));
		1250	}
		1251
		1252	static void d68020_cas_32(void)
		1253	{
		1254	uint extension;
		1255	LIMIT_CPU_TYPES(M68020_PLUS);
		1256	extension = read_imm_16();
		1257	sprintf(g_dasm_str, "cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_32(g_cpu_ir));
		1258	}
		1259
		1260	static void d68020_cas2_16(void)
		1261	{
		1262	/* CAS2 Dc1:Dc2,Du1:Dc2:(Rn1):(Rn2)
		1263	f e d c b a 9 8 7 6 5 4 3 2 1 0
		1264	DARn1 0 0 0 Du1 0 0 0 Dc1
		1265	DARn2 0 0 0 Du2 0 0 0 Dc2
		1266	*/
		1267
		1268	uint extension;
		1269	LIMIT_CPU_TYPES(M68020_PLUS);
		1270	extension = read_imm_32();
		1271	sprintf(g_dasm_str, "cas2.w D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
		1272	(extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
		1273	BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,
		1274	BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
		1275	}
		1276
		1277	static void d68020_cas2_32(void)
		1278	{
		1279	uint extension;
		1280	LIMIT_CPU_TYPES(M68020_PLUS);
		1281	extension = read_imm_32();
		1282	sprintf(g_dasm_str, "cas2.l D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",
		1283	(extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,
		1284	BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,
		1285	BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
		1286	}
		1287
		1288	static void d68000_chk_16(void)
		1289	{
		1290	sprintf(g_dasm_str, "chk.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		1291	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		1292	}
		1293
		1294	static void d68020_chk_32(void)
		1295	{
		1296	LIMIT_CPU_TYPES(M68020_PLUS);
		1297	sprintf(g_dasm_str, "chk.l %s, D%d; (2+)", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		1298	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		1299	}
		1300
		1301	static void d68020_chk2_cmp2_8(void)
		1302	{
		1303	uint extension;
		1304	LIMIT_CPU_TYPES(M68020_PLUS);
		1305	extension = read_imm_16();
		1306	sprintf(g_dasm_str, "%s.b %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
		1307	}
		1308
		1309	static void d68020_chk2_cmp2_16(void)
		1310	{
		1311	uint extension;
		1312	LIMIT_CPU_TYPES(M68020_PLUS);
		1313	extension = read_imm_16();
		1314	sprintf(g_dasm_str, "%s.w %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
		1315	}
		1316
		1317	static void d68020_chk2_cmp2_32(void)
		1318	{
		1319	uint extension;
		1320	LIMIT_CPU_TYPES(M68020_PLUS);
		1321	extension = read_imm_16();
		1322	sprintf(g_dasm_str, "%s.l %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
		1323	}
		1324
		1325	static void d68040_cinv(void)
		1326	{
		1327	LIMIT_CPU_TYPES(M68040_PLUS);
		1328	switch((g_cpu_ir>>3)&3)
		1329	{
		1330	case 0:
		1331	sprintf(g_dasm_str, "cinv (illegal scope); (4)");
		1332	break;
		1333	case 1:
		1334	sprintf(g_dasm_str, "cinvl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
		1335	break;
		1336	case 2:
		1337	sprintf(g_dasm_str, "cinvp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
		1338	break;
		1339	case 3:
		1340	sprintf(g_dasm_str, "cinva %d; (4)", (g_cpu_ir>>6)&3);
		1341	break;
		1342	}
		1343	}
		1344
		1345	static void d68000_clr_8(void)
		1346	{
		1347	sprintf(g_dasm_str, "clr.b %s", get_ea_mode_str_8(g_cpu_ir));
		1348	}
		1349
		1350	static void d68000_clr_16(void)
		1351	{
		1352	sprintf(g_dasm_str, "clr.w %s", get_ea_mode_str_16(g_cpu_ir));
		1353	}
		1354
		1355	static void d68000_clr_32(void)
		1356	{
		1357	sprintf(g_dasm_str, "clr.l %s", get_ea_mode_str_32(g_cpu_ir));
		1358	}
		1359
		1360	static void d68000_cmp_8(void)
		1361	{
		1362	sprintf(g_dasm_str, "cmp.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
		1363	}
		1364
		1365	static void d68000_cmp_16(void)
		1366	{
		1367	sprintf(g_dasm_str, "cmp.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		1368	}
		1369
		1370	static void d68000_cmp_32(void)
		1371	{
		1372	sprintf(g_dasm_str, "cmp.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		1373	}
		1374
		1375	static void d68000_cmpa_16(void)
		1376	{
		1377	sprintf(g_dasm_str, "cmpa.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		1378	}
		1379
		1380	static void d68000_cmpa_32(void)
		1381	{
		1382	sprintf(g_dasm_str, "cmpa.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		1383	}
		1384
		1385	static void d68000_cmpi_8(void)
		1386	{
		1387	char* str = get_imm_str_s8();
		1388	sprintf(g_dasm_str, "cmpi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
		1389	}
		1390
		1391	static void d68020_cmpi_pcdi_8(void)
		1392	{
		1393	char* str;
		1394	LIMIT_CPU_TYPES(M68010_PLUS);
		1395	str = get_imm_str_s8();
		1396	sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));
		1397	}
		1398
		1399	static void d68020_cmpi_pcix_8(void)
		1400	{
		1401	char* str;
		1402	LIMIT_CPU_TYPES(M68010_PLUS);
		1403	str = get_imm_str_s8();
		1404	sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));
		1405	}
		1406
		1407	static void d68000_cmpi_16(void)
		1408	{
		1409	char* str;
		1410	str = get_imm_str_s16();
		1411	sprintf(g_dasm_str, "cmpi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
		1412	}
		1413
		1414	static void d68020_cmpi_pcdi_16(void)
		1415	{
		1416	char* str;
		1417	LIMIT_CPU_TYPES(M68010_PLUS);
		1418	str = get_imm_str_s16();
		1419	sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));
		1420	}
		1421
		1422	static void d68020_cmpi_pcix_16(void)
		1423	{
		1424	char* str;
		1425	LIMIT_CPU_TYPES(M68010_PLUS);
		1426	str = get_imm_str_s16();
		1427	sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));
		1428	}
		1429
		1430	static void d68000_cmpi_32(void)
		1431	{
		1432	char* str;
		1433	str = get_imm_str_s32();
		1434	sprintf(g_dasm_str, "cmpi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
		1435	}
		1436
		1437	static void d68020_cmpi_pcdi_32(void)
		1438	{
		1439	char* str;
		1440	LIMIT_CPU_TYPES(M68010_PLUS);
		1441	str = get_imm_str_s32();
		1442	sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));
		1443	}
		1444
		1445	static void d68020_cmpi_pcix_32(void)
		1446	{
		1447	char* str;
		1448	LIMIT_CPU_TYPES(M68010_PLUS);
		1449	str = get_imm_str_s32();
		1450	sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));
		1451	}
		1452
		1453	static void d68000_cmpm_8(void)
		1454	{
		1455	sprintf(g_dasm_str, "cmpm.b (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		1456	}
		1457
		1458	static void d68000_cmpm_16(void)
		1459	{
		1460	sprintf(g_dasm_str, "cmpm.w (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		1461	}
		1462
		1463	static void d68000_cmpm_32(void)
		1464	{
		1465	sprintf(g_dasm_str, "cmpm.l (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		1466	}
		1467
		1468	static void d68020_cpbcc_16(void)
		1469	{
		1470	uint extension;
		1471	uint new_pc = g_cpu_pc;
		1472	LIMIT_CPU_TYPES(M68020_PLUS);
		1473	extension = read_imm_16();
		1474	new_pc += make_int_16(read_imm_16());
		1475	sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);
		1476	}
		1477
		1478	static void d68020_cpbcc_32(void)
		1479	{
		1480	uint extension;
		1481	uint new_pc = g_cpu_pc;
		1482	LIMIT_CPU_TYPES(M68020_PLUS);
		1483	extension = read_imm_16();
		1484	new_pc += read_imm_32();
		1485	sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);
		1486	}
		1487
		1488	static void d68020_cpdbcc(void)
		1489	{
		1490	uint extension1;
		1491	uint extension2;
		1492	uint new_pc = g_cpu_pc;
		1493	LIMIT_CPU_TYPES(M68020_PLUS);
		1494	extension1 = read_imm_16();
		1495	extension2 = read_imm_16();
		1496	new_pc += make_int_16(read_imm_16());
		1497	sprintf(g_dasm_str, "%ddb%-4s D%d,%s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], g_cpu_ir&7, get_imm_str_s16(), new_pc, extension2);
		1498	}
		1499
		1500	static void d68020_cpgen(void)
		1501	{
		1502	LIMIT_CPU_TYPES(M68020_PLUS);
		1503	sprintf(g_dasm_str, "%dgen %s; (2-3)", (g_cpu_ir>>9)&7, get_imm_str_u32());
		1504	}
		1505
		1506	static void d68020_cprestore(void)
		1507	{
		1508	LIMIT_CPU_TYPES(M68020_PLUS);
		1509	sprintf(g_dasm_str, "%drestore %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		1510	}
		1511
		1512	static void d68020_cpsave(void)
		1513	{
		1514	LIMIT_CPU_TYPES(M68020_PLUS);
		1515	sprintf(g_dasm_str, "%dsave %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		1516	}
		1517
		1518	static void d68020_cpscc(void)
		1519	{
		1520	uint extension1;
		1521	uint extension2;
		1522	LIMIT_CPU_TYPES(M68020_PLUS);
		1523	extension1 = read_imm_16();
		1524	extension2 = read_imm_16();
		1525	sprintf(g_dasm_str, "%ds%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_ea_mode_str_8(g_cpu_ir), extension2);
		1526	}
		1527
		1528	static void d68020_cptrapcc_0(void)
		1529	{
		1530	uint extension1;
		1531	uint extension2;
		1532	LIMIT_CPU_TYPES(M68020_PLUS);
		1533	extension1 = read_imm_16();
		1534	extension2 = read_imm_16();
		1535	sprintf(g_dasm_str, "%dtrap%-4s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], extension2);
		1536	}
		1537
		1538	static void d68020_cptrapcc_16(void)
		1539	{
		1540	uint extension1;
		1541	uint extension2;
		1542	LIMIT_CPU_TYPES(M68020_PLUS);
		1543	extension1 = read_imm_16();
		1544	extension2 = read_imm_16();
		1545	sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u16(), extension2);
		1546	}
		1547
		1548	static void d68020_cptrapcc_32(void)
		1549	{
		1550	uint extension1;
		1551	uint extension2;
		1552	LIMIT_CPU_TYPES(M68020_PLUS);
		1553	extension1 = read_imm_16();
		1554	extension2 = read_imm_16();
		1555	sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u32(), extension2);
		1556	}
		1557
		1558	static void d68040_cpush(void)
		1559	{
		1560	LIMIT_CPU_TYPES(M68040_PLUS);
		1561	switch((g_cpu_ir>>3)&3)
		1562	{
		1563	case 0:
		1564	sprintf(g_dasm_str, "cpush (illegal scope); (4)");
		1565	break;
		1566	case 1:
		1567	sprintf(g_dasm_str, "cpushl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
		1568	break;
		1569	case 2:
		1570	sprintf(g_dasm_str, "cpushp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);
		1571	break;
		1572	case 3:
		1573	sprintf(g_dasm_str, "cpusha %d; (4)", (g_cpu_ir>>6)&3);
		1574	break;
		1575	}
		1576	}
		1577
		1578	static void d68000_dbra(void)
		1579	{
		1580	uint temp_pc = g_cpu_pc;
		1581	sprintf(g_dasm_str, "dbra D%d, $%x", g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
		1582	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		1583	}
		1584
		1585	static void d68000_dbcc(void)
		1586	{
		1587	uint temp_pc = g_cpu_pc;
		1588	sprintf(g_dasm_str, "db%-2s D%d, $%x", g_cc[(g_cpu_ir>>8)&0xf], g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));
		1589	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		1590	}
		1591
		1592	static void d68000_divs(void)
		1593	{
		1594	sprintf(g_dasm_str, "divs.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		1595	}
		1596
		1597	static void d68000_divu(void)
		1598	{
		1599	sprintf(g_dasm_str, "divu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		1600	}
		1601
		1602	static void d68020_divl(void)
		1603	{
		1604	uint extension;
		1605	LIMIT_CPU_TYPES(M68020_PLUS);
		1606	extension = read_imm_16();
		1607
		1608	if(BIT_A(extension))
		1609	sprintf(g_dasm_str, "div%c.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
		1610	else if((extension&7) == ((extension>>12)&7))
		1611	sprintf(g_dasm_str, "div%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);
		1612	else
		1613	sprintf(g_dasm_str, "div%cl.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
		1614	}
		1615
		1616	static void d68000_eor_8(void)
		1617	{
		1618	sprintf(g_dasm_str, "eor.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		1619	}
		1620
		1621	static void d68000_eor_16(void)
		1622	{
		1623	sprintf(g_dasm_str, "eor.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
		1624	}
		1625
		1626	static void d68000_eor_32(void)
		1627	{
		1628	sprintf(g_dasm_str, "eor.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
		1629	}
		1630
		1631	static void d68000_eori_8(void)
		1632	{
		1633	char* str = get_imm_str_u8();
		1634	sprintf(g_dasm_str, "eori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
		1635	}
		1636
		1637	static void d68000_eori_16(void)
		1638	{
		1639	char* str = get_imm_str_u16();
		1640	sprintf(g_dasm_str, "eori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
		1641	}
		1642
		1643	static void d68000_eori_32(void)
		1644	{
		1645	char* str = get_imm_str_u32();
		1646	sprintf(g_dasm_str, "eori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
		1647	}
		1648
		1649	static void d68000_eori_to_ccr(void)
		1650	{
		1651	sprintf(g_dasm_str, "eori %s, CCR", get_imm_str_u8());
		1652	}
		1653
		1654	static void d68000_eori_to_sr(void)
		1655	{
		1656	sprintf(g_dasm_str, "eori %s, SR", get_imm_str_u16());
		1657	}
		1658
		1659	static void d68000_exg_dd(void)
		1660	{
		1661	sprintf(g_dasm_str, "exg D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		1662	}
		1663
		1664	static void d68000_exg_aa(void)
		1665	{
		1666	sprintf(g_dasm_str, "exg A%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		1667	}
		1668
		1669	static void d68000_exg_da(void)
		1670	{
		1671	sprintf(g_dasm_str, "exg D%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		1672	}
		1673
		1674	static void d68000_ext_16(void)
		1675	{
		1676	sprintf(g_dasm_str, "ext.w D%d", g_cpu_ir&7);
		1677	}
		1678
		1679	static void d68000_ext_32(void)
		1680	{
		1681	sprintf(g_dasm_str, "ext.l D%d", g_cpu_ir&7);
		1682	}
		1683
		1684	static void d68020_extb_32(void)
		1685	{
		1686	LIMIT_CPU_TYPES(M68020_PLUS);
		1687	sprintf(g_dasm_str, "extb.l D%d; (2+)", g_cpu_ir&7);
		1688	}
		1689
		1690	static void d68040_fpu(void)
		1691	{
		1692	char float_data_format[8][3] =
		1693	{
		1694	".l", ".s", ".x", ".p", ".w", ".d", ".b", ".?"
		1695	};
		1696
		1697	char mnemonic[40];
		1698	uint w2, src, dst_reg;
		1699	LIMIT_CPU_TYPES(M68040_PLUS);
		1700	w2 = read_imm_16();
		1701
		1702	src = (w2 >> 10) & 0x7;
		1703	dst_reg = (w2 >> 7) & 0x7;
		1704
		1705	switch ((w2 >> 13) & 0x7)
		1706	{
		1707	case 0x0:
		1708	case 0x2:
		1709	{
		1710	switch(w2 & 0x7f)
		1711	{
		1712	case 0x00: sprintf(mnemonic, "fmove"); break;
		1713	case 0x01: sprintf(mnemonic, "fint"); break;
		1714	case 0x02: sprintf(mnemonic, "fsinh"); break;
		1715	case 0x03: sprintf(mnemonic, "fintrz"); break;
		1716	case 0x04: sprintf(mnemonic, "fsqrt"); break;
		1717	case 0x06: sprintf(mnemonic, "flognp1"); break;
		1718	case 0x08: sprintf(mnemonic, "fetoxm1"); break;
		1719	case 0x09: sprintf(mnemonic, "ftanh1"); break;
		1720	case 0x0a: sprintf(mnemonic, "fatan"); break;
		1721	case 0x0c: sprintf(mnemonic, "fasin"); break;
		1722	case 0x0d: sprintf(mnemonic, "fatanh"); break;
		1723	case 0x0e: sprintf(mnemonic, "fsin"); break;
		1724	case 0x0f: sprintf(mnemonic, "ftan"); break;
		1725	case 0x10: sprintf(mnemonic, "fetox"); break;
		1726	case 0x11: sprintf(mnemonic, "ftwotox"); break;
		1727	case 0x12: sprintf(mnemonic, "ftentox"); break;
		1728	case 0x14: sprintf(mnemonic, "flogn"); break;
		1729	case 0x15: sprintf(mnemonic, "flog10"); break;
		1730	case 0x16: sprintf(mnemonic, "flog2"); break;
		1731	case 0x18: sprintf(mnemonic, "fabs"); break;
		1732	case 0x19: sprintf(mnemonic, "fcosh"); break;
		1733	case 0x1a: sprintf(mnemonic, "fneg"); break;
		1734	case 0x1c: sprintf(mnemonic, "facos"); break;
		1735	case 0x1d: sprintf(mnemonic, "fcos"); break;
		1736	case 0x1e: sprintf(mnemonic, "fgetexp"); break;
		1737	case 0x1f: sprintf(mnemonic, "fgetman"); break;
		1738	case 0x20: sprintf(mnemonic, "fdiv"); break;
		1739	case 0x21: sprintf(mnemonic, "fmod"); break;
		1740	case 0x22: sprintf(mnemonic, "fadd"); break;
		1741	case 0x23: sprintf(mnemonic, "fmul"); break;
		1742	case 0x24: sprintf(mnemonic, "fsgldiv"); break;
		1743	case 0x25: sprintf(mnemonic, "frem"); break;
		1744	case 0x26: sprintf(mnemonic, "fscale"); break;
		1745	case 0x27: sprintf(mnemonic, "fsglmul"); break;
		1746	case 0x28: sprintf(mnemonic, "fsub"); break;
		1747	case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
		1748	sprintf(mnemonic, "fsincos"); break;
		1749	case 0x38: sprintf(mnemonic, "fcmp"); break;
		1750	case 0x3a: sprintf(mnemonic, "ftst"); break;
		1751	case 0x41: sprintf(mnemonic, "fssqrt"); break;
		1752	case 0x45: sprintf(mnemonic, "fdsqrt"); break;
		1753	case 0x58: sprintf(mnemonic, "fsabs"); break;
		1754	case 0x5a: sprintf(mnemonic, "fsneg"); break;
		1755	case 0x5c: sprintf(mnemonic, "fdabs"); break;
		1756	case 0x5e: sprintf(mnemonic, "fdneg"); break;
		1757	case 0x60: sprintf(mnemonic, "fsdiv"); break;
		1758	case 0x62: sprintf(mnemonic, "fsadd"); break;
		1759	case 0x63: sprintf(mnemonic, "fsmul"); break;
		1760	case 0x64: sprintf(mnemonic, "fddiv"); break;
		1761	case 0x66: sprintf(mnemonic, "fdadd"); break;
		1762	case 0x67: sprintf(mnemonic, "fdmul"); break;
		1763	case 0x68: sprintf(mnemonic, "fssub"); break;
		1764	case 0x6c: sprintf(mnemonic, "fdsub"); break;
		1765
		1766	default: sprintf(mnemonic, "FPU (?)"); break;
		1767	}
		1768
		1769	if (w2 & 0x4000)
		1770	{
		1771	sprintf(g_dasm_str, "%s%s %s, FP%d", mnemonic, float_data_format[src], get_ea_mode_str_32(g_cpu_ir), dst_reg);
		1772	}
		1773	else
		1774	{
		1775	sprintf(g_dasm_str, "%s.x FP%d, FP%d", mnemonic, src, dst_reg);
		1776	}
		1777	break;
		1778	}
		1779
		1780	case 0x3:
		1781	{
		1782	sprintf(g_dasm_str, "fmove /todo");
		1783	break;
		1784	}
		1785
		1786	case 0x4:
		1787	case 0x5:
		1788	{
		1789	sprintf(g_dasm_str, "fmove /todo");
		1790	break;
		1791	}
		1792
		1793	case 0x6:
		1794	case 0x7:
		1795	{
		1796	sprintf(g_dasm_str, "fmovem /todo");
		1797	break;
		1798	}
		1799
		1800	default:
		1801	{
		1802	sprintf(g_dasm_str, "FPU (?) ");
		1803	break;
		1804	}
		1805	}
		1806	}
		1807
		1808	static void d68000_jmp(void)
		1809	{
		1810	sprintf(g_dasm_str, "jmp %s", get_ea_mode_str_32(g_cpu_ir));
		1811	}
		1812
		1813	static void d68000_jsr(void)
		1814	{
		1815	sprintf(g_dasm_str, "jsr %s", get_ea_mode_str_32(g_cpu_ir));
		1816	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		1817	}
		1818
		1819	static void d68000_lea(void)
		1820	{
		1821	sprintf(g_dasm_str, "lea %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		1822	}
		1823
		1824	static void d68000_link_16(void)
		1825	{
		1826	sprintf(g_dasm_str, "link A%d, %s", g_cpu_ir&7, get_imm_str_s16());
		1827	}
		1828
		1829	static void d68020_link_32(void)
		1830	{
		1831	LIMIT_CPU_TYPES(M68020_PLUS);
		1832	sprintf(g_dasm_str, "link A%d, %s; (2+)", g_cpu_ir&7, get_imm_str_s32());
		1833	}
		1834
		1835	static void d68000_lsr_s_8(void)
		1836	{
		1837	sprintf(g_dasm_str, "lsr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		1838	}
		1839
		1840	static void d68000_lsr_s_16(void)
		1841	{
		1842	sprintf(g_dasm_str, "lsr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		1843	}
		1844
		1845	static void d68000_lsr_s_32(void)
		1846	{
		1847	sprintf(g_dasm_str, "lsr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		1848	}
		1849
		1850	static void d68000_lsr_r_8(void)
		1851	{
		1852	sprintf(g_dasm_str, "lsr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		1853	}
		1854
		1855	static void d68000_lsr_r_16(void)
		1856	{
		1857	sprintf(g_dasm_str, "lsr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		1858	}
		1859
		1860	static void d68000_lsr_r_32(void)
		1861	{
		1862	sprintf(g_dasm_str, "lsr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		1863	}
		1864
		1865	static void d68000_lsr_ea(void)
		1866	{
		1867	sprintf(g_dasm_str, "lsr.w %s", get_ea_mode_str_32(g_cpu_ir));
		1868	}
		1869
		1870	static void d68000_lsl_s_8(void)
		1871	{
		1872	sprintf(g_dasm_str, "lsl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		1873	}
		1874
		1875	static void d68000_lsl_s_16(void)
		1876	{
		1877	sprintf(g_dasm_str, "lsl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		1878	}
		1879
		1880	static void d68000_lsl_s_32(void)
		1881	{
		1882	sprintf(g_dasm_str, "lsl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		1883	}
		1884
		1885	static void d68000_lsl_r_8(void)
		1886	{
		1887	sprintf(g_dasm_str, "lsl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		1888	}
		1889
		1890	static void d68000_lsl_r_16(void)
		1891	{
		1892	sprintf(g_dasm_str, "lsl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		1893	}
		1894
		1895	static void d68000_lsl_r_32(void)
		1896	{
		1897	sprintf(g_dasm_str, "lsl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		1898	}
		1899
		1900	static void d68000_lsl_ea(void)
		1901	{
		1902	sprintf(g_dasm_str, "lsl.w %s", get_ea_mode_str_32(g_cpu_ir));
		1903	}
		1904
		1905	static void d68000_move_8(void)
		1906	{
		1907	char* str = get_ea_mode_str_8(g_cpu_ir);
		1908	sprintf(g_dasm_str, "move.b %s, %s", str, get_ea_mode_str_8(((g_cpu_ir>>9) & 7) \| ((g_cpu_ir>>3) & 0x38)));
		1909	}
		1910
		1911	static void d68000_move_16(void)
		1912	{
		1913	char* str = get_ea_mode_str_16(g_cpu_ir);
		1914	sprintf(g_dasm_str, "move.w %s, %s", str, get_ea_mode_str_16(((g_cpu_ir>>9) & 7) \| ((g_cpu_ir>>3) & 0x38)));
		1915	}
		1916
		1917	static void d68000_move_32(void)
		1918	{
		1919	char* str = get_ea_mode_str_32(g_cpu_ir);
		1920	sprintf(g_dasm_str, "move.l %s, %s", str, get_ea_mode_str_32(((g_cpu_ir>>9) & 7) \| ((g_cpu_ir>>3) & 0x38)));
		1921	}
		1922
		1923	static void d68000_movea_16(void)
		1924	{
		1925	sprintf(g_dasm_str, "movea.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		1926	}
		1927
		1928	static void d68000_movea_32(void)
		1929	{
		1930	sprintf(g_dasm_str, "movea.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		1931	}
		1932
		1933	static void d68000_move_to_ccr(void)
		1934	{
		1935	sprintf(g_dasm_str, "move %s, CCR", get_ea_mode_str_8(g_cpu_ir));
		1936	}
		1937
		1938	static void d68010_move_fr_ccr(void)
		1939	{
		1940	LIMIT_CPU_TYPES(M68010_PLUS);
		1941	sprintf(g_dasm_str, "move CCR, %s; (1+)", get_ea_mode_str_8(g_cpu_ir));
		1942	}
		1943
		1944	static void d68000_move_fr_sr(void)
		1945	{
		1946	sprintf(g_dasm_str, "move SR, %s", get_ea_mode_str_16(g_cpu_ir));
		1947	}
		1948
		1949	static void d68000_move_to_sr(void)
		1950	{
		1951	sprintf(g_dasm_str, "move %s, SR", get_ea_mode_str_16(g_cpu_ir));
		1952	}
		1953
		1954	static void d68000_move_fr_usp(void)
		1955	{
		1956	sprintf(g_dasm_str, "move USP, A%d", g_cpu_ir&7);
		1957	}
		1958
		1959	static void d68000_move_to_usp(void)
		1960	{
		1961	sprintf(g_dasm_str, "move A%d, USP", g_cpu_ir&7);
		1962	}
		1963
		1964	static void d68010_movec(void)
		1965	{
		1966	uint extension;
		1967	const char* reg_name;
		1968	const char* processor;
		1969	LIMIT_CPU_TYPES(M68010_PLUS);
		1970	extension = read_imm_16();
		1971
		1972	switch(extension & 0xfff)
		1973	{
		1974	case 0x000:
		1975	reg_name = "SFC";
		1976	processor = "1+";
		1977	break;
		1978	case 0x001:
		1979	reg_name = "DFC";
		1980	processor = "1+";
		1981	break;
		1982	case 0x800:
		1983	reg_name = "USP";
		1984	processor = "1+";
		1985	break;
		1986	case 0x801:
		1987	reg_name = "VBR";
		1988	processor = "1+";
		1989	break;
		1990	case 0x002:
		1991	reg_name = "CACR";
		1992	processor = "2+";
		1993	break;
		1994	case 0x802:
		1995	reg_name = "CAAR";
		1996	processor = "2,3";
		1997	break;
		1998	case 0x803:
		1999	reg_name = "MSP";
		2000	processor = "2+";
		2001	break;
		2002	case 0x804:
		2003	reg_name = "ISP";
		2004	processor = "2+";
		2005	break;
		2006	case 0x003:
		2007	reg_name = "TC";
		2008	processor = "4+";
		2009	break;
		2010	case 0x004:
		2011	reg_name = "ITT0";
		2012	processor = "4+";
		2013	break;
		2014	case 0x005:
		2015	reg_name = "ITT1";
		2016	processor = "4+";
		2017	break;
		2018	case 0x006:
		2019	reg_name = "DTT0";
		2020	processor = "4+";
		2021	break;
		2022	case 0x007:
		2023	reg_name = "DTT1";
		2024	processor = "4+";
		2025	break;
		2026	case 0x805:
		2027	reg_name = "MMUSR";
		2028	processor = "4+";
		2029	break;
		2030	case 0x806:
		2031	reg_name = "URP";
		2032	processor = "4+";
		2033	break;
		2034	case 0x807:
		2035	reg_name = "SRP";
		2036	processor = "4+";
		2037	break;
		2038	default:
		2039	reg_name = make_signed_hex_str_16(extension & 0xfff);
		2040	processor = "?";
		2041	}
		2042
		2043	if(BIT_0(g_cpu_ir))
		2044	sprintf(g_dasm_str, "movec %c%d, %s; (%s)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, reg_name, processor);
		2045	else
		2046	sprintf(g_dasm_str, "movec %s, %c%d; (%s)", reg_name, BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, processor);
		2047	}
		2048
		2049	static void d68000_movem_pd_16(void)
		2050	{
		2051	uint data = read_imm_16();
		2052	char buffer[40];
		2053	uint first;
		2054	uint run_length;
		2055	uint i;
		2056
		2057	buffer[0] = 0;
		2058	for(i=0;i<8;i++)
		2059	{
		2060	if(data&(1<<(15-i)))
		2061	{
		2062	first = i;
		2063	run_length = 0;
		2064	while(i<7 && (data&(1<<(15-(i+1)))))
		2065	{
		2066	i++;
		2067	run_length++;
		2068	}
		2069	if(buffer[0] != 0)
		2070	strcat(buffer, "/");
		2071	sprintf(buffer+strlen(buffer), "D%d", first);
		2072	if(run_length > 0)
		2073	sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
		2074	}
		2075	}
		2076	for(i=0;i<8;i++)
		2077	{
		2078	if(data&(1<<(7-i)))
		2079	{
		2080	first = i;
		2081	run_length = 0;
		2082	while(i<7 && (data&(1<<(7-(i+1)))))
		2083	{
		2084	i++;
		2085	run_length++;
		2086	}
		2087	if(buffer[0] != 0)
		2088	strcat(buffer, "/");
		2089	sprintf(buffer+strlen(buffer), "A%d", first);
		2090	if(run_length > 0)
		2091	sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
		2092	}
		2093	}
		2094	sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));
		2095	}
		2096
		2097	static void d68000_movem_pd_32(void)
		2098	{
		2099	uint data = read_imm_16();
		2100	char buffer[40];
		2101	uint first;
		2102	uint run_length;
		2103	uint i;
		2104
		2105	buffer[0] = 0;
		2106	for(i=0;i<8;i++)
		2107	{
		2108	if(data&(1<<(15-i)))
		2109	{
		2110	first = i;
		2111	run_length = 0;
		2112	while(i<7 && (data&(1<<(15-(i+1)))))
		2113	{
		2114	i++;
		2115	run_length++;
		2116	}
		2117	if(buffer[0] != 0)
		2118	strcat(buffer, "/");
		2119	sprintf(buffer+strlen(buffer), "D%d", first);
		2120	if(run_length > 0)
		2121	sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
		2122	}
		2123	}
		2124	for(i=0;i<8;i++)
		2125	{
		2126	if(data&(1<<(7-i)))
		2127	{
		2128	first = i;
		2129	run_length = 0;
		2130	while(i<7 && (data&(1<<(7-(i+1)))))
		2131	{
		2132	i++;
		2133	run_length++;
		2134	}
		2135	if(buffer[0] != 0)
		2136	strcat(buffer, "/");
		2137	sprintf(buffer+strlen(buffer), "A%d", first);
		2138	if(run_length > 0)
		2139	sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
		2140	}
		2141	}
		2142	sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));
		2143	}
		2144
		2145	static void d68000_movem_er_16(void)
		2146	{
		2147	uint data = read_imm_16();
		2148	char buffer[40];
		2149	uint first;
		2150	uint run_length;
		2151	uint i;
		2152
		2153	buffer[0] = 0;
		2154	for(i=0;i<8;i++)
		2155	{
		2156	if(data&(1<
		2157	{
		2158	first = i;
		2159	run_length = 0;
		2160	while(i<7 && (data&(1<<(i+1))))
		2161	{
		2162	i++;
		2163	run_length++;
		2164	}
		2165	if(buffer[0] != 0)
		2166	strcat(buffer, "/");
		2167	sprintf(buffer+strlen(buffer), "D%d", first);
		2168	if(run_length > 0)
		2169	sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
		2170	}
		2171	}
		2172	for(i=0;i<8;i++)
		2173	{
		2174	if(data&(1<<(i+8)))
		2175	{
		2176	first = i;
		2177	run_length = 0;
		2178	while(i<7 && (data&(1<<(i+8+1))))
		2179	{
		2180	i++;
		2181	run_length++;
		2182	}
		2183	if(buffer[0] != 0)
		2184	strcat(buffer, "/");
		2185	sprintf(buffer+strlen(buffer), "A%d", first);
		2186	if(run_length > 0)
		2187	sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
		2188	}
		2189	}
		2190	sprintf(g_dasm_str, "movem.w %s, %s", get_ea_mode_str_16(g_cpu_ir), buffer);
		2191	}
		2192
		2193	static void d68000_movem_er_32(void)
		2194	{
		2195	uint data = read_imm_16();
		2196	char buffer[40];
		2197	uint first;
		2198	uint run_length;
		2199	uint i;
		2200
		2201	buffer[0] = 0;
		2202	for(i=0;i<8;i++)
		2203	{
		2204	if(data&(1<
		2205	{
		2206	first = i;
		2207	run_length = 0;
		2208	while(i<7 && (data&(1<<(i+1))))
		2209	{
		2210	i++;
		2211	run_length++;
		2212	}
		2213	if(buffer[0] != 0)
		2214	strcat(buffer, "/");
		2215	sprintf(buffer+strlen(buffer), "D%d", first);
		2216	if(run_length > 0)
		2217	sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
		2218	}
		2219	}
		2220	for(i=0;i<8;i++)
		2221	{
		2222	if(data&(1<<(i+8)))
		2223	{
		2224	first = i;
		2225	run_length = 0;
		2226	while(i<7 && (data&(1<<(i+8+1))))
		2227	{
		2228	i++;
		2229	run_length++;
		2230	}
		2231	if(buffer[0] != 0)
		2232	strcat(buffer, "/");
		2233	sprintf(buffer+strlen(buffer), "A%d", first);
		2234	if(run_length > 0)
		2235	sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
		2236	}
		2237	}
		2238	sprintf(g_dasm_str, "movem.l %s, %s", get_ea_mode_str_32(g_cpu_ir), buffer);
		2239	}
		2240
		2241	static void d68000_movem_re_16(void)
		2242	{
		2243	uint data = read_imm_16();
		2244	char buffer[40];
		2245	uint first;
		2246	uint run_length;
		2247	uint i;
		2248
		2249	buffer[0] = 0;
		2250	for(i=0;i<8;i++)
		2251	{
		2252	if(data&(1<
		2253	{
		2254	first = i;
		2255	run_length = 0;
		2256	while(i<7 && (data&(1<<(i+1))))
		2257	{
		2258	i++;
		2259	run_length++;
		2260	}
		2261	if(buffer[0] != 0)
		2262	strcat(buffer, "/");
		2263	sprintf(buffer+strlen(buffer), "D%d", first);
		2264	if(run_length > 0)
		2265	sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
		2266	}
		2267	}
		2268	for(i=0;i<8;i++)
		2269	{
		2270	if(data&(1<<(i+8)))
		2271	{
		2272	first = i;
		2273	run_length = 0;
		2274	while(i<7 && (data&(1<<(i+8+1))))
		2275	{
		2276	i++;
		2277	run_length++;
		2278	}
		2279	if(buffer[0] != 0)
		2280	strcat(buffer, "/");
		2281	sprintf(buffer+strlen(buffer), "A%d", first);
		2282	if(run_length > 0)
		2283	sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
		2284	}
		2285	}
		2286	sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));
		2287	}
		2288
		2289	static void d68000_movem_re_32(void)
		2290	{
		2291	uint data = read_imm_16();
		2292	char buffer[40];
		2293	uint first;
		2294	uint run_length;
		2295	uint i;
		2296
		2297	buffer[0] = 0;
		2298	for(i=0;i<8;i++)
		2299	{
		2300	if(data&(1<
		2301	{
		2302	first = i;
		2303	run_length = 0;
		2304	while(i<7 && (data&(1<<(i+1))))
		2305	{
		2306	i++;
		2307	run_length++;
		2308	}
		2309	if(buffer[0] != 0)
		2310	strcat(buffer, "/");
		2311	sprintf(buffer+strlen(buffer), "D%d", first);
		2312	if(run_length > 0)
		2313	sprintf(buffer+strlen(buffer), "-D%d", first + run_length);
		2314	}
		2315	}
		2316	for(i=0;i<8;i++)
		2317	{
		2318	if(data&(1<<(i+8)))
		2319	{
		2320	first = i;
		2321	run_length = 0;
		2322	while(i<7 && (data&(1<<(i+8+1))))
		2323	{
		2324	i++;
		2325	run_length++;
		2326	}
		2327	if(buffer[0] != 0)
		2328	strcat(buffer, "/");
		2329	sprintf(buffer+strlen(buffer), "A%d", first);
		2330	if(run_length > 0)
		2331	sprintf(buffer+strlen(buffer), "-A%d", first + run_length);
		2332	}
		2333	}
		2334	sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));
		2335	}
		2336
		2337	static void d68000_movep_re_16(void)
		2338	{
		2339	sprintf(g_dasm_str, "movep.w D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);
		2340	}
		2341
		2342	static void d68000_movep_re_32(void)
		2343	{
		2344	sprintf(g_dasm_str, "movep.l D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);
		2345	}
		2346
		2347	static void d68000_movep_er_16(void)
		2348	{
		2349	sprintf(g_dasm_str, "movep.w ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);
		2350	}
		2351
		2352	static void d68000_movep_er_32(void)
		2353	{
		2354	sprintf(g_dasm_str, "movep.l ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);
		2355	}
		2356
		2357	static void d68010_moves_8(void)
		2358	{
		2359	uint extension;
		2360	LIMIT_CPU_TYPES(M68010_PLUS);
		2361	extension = read_imm_16();
		2362	if(BIT_B(extension))
		2363	sprintf(g_dasm_str, "moves.b %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir));
		2364	else
		2365	sprintf(g_dasm_str, "moves.b %s, %c%d; (1+)", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
		2366	}
		2367
		2368	static void d68010_moves_16(void)
		2369	{
		2370	uint extension;
		2371	LIMIT_CPU_TYPES(M68010_PLUS);
		2372	extension = read_imm_16();
		2373	if(BIT_B(extension))
		2374	sprintf(g_dasm_str, "moves.w %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_16(g_cpu_ir));
		2375	else
		2376	sprintf(g_dasm_str, "moves.w %s, %c%d; (1+)", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
		2377	}
		2378
		2379	static void d68010_moves_32(void)
		2380	{
		2381	uint extension;
		2382	LIMIT_CPU_TYPES(M68010_PLUS);
		2383	extension = read_imm_16();
		2384	if(BIT_B(extension))
		2385	sprintf(g_dasm_str, "moves.l %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_32(g_cpu_ir));
		2386	else
		2387	sprintf(g_dasm_str, "moves.l %s, %c%d; (1+)", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);
		2388	}
		2389
		2390	static void d68000_moveq(void)
		2391	{
		2392	sprintf(g_dasm_str, "moveq #%s, D%d", make_signed_hex_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
		2393	}
		2394
		2395	static void d68040_move16_pi_pi(void)
		2396	{
		2397	LIMIT_CPU_TYPES(M68040_PLUS);
		2398	sprintf(g_dasm_str, "move16 (A%d)+, (A%d)+; (4)", g_cpu_ir&7, (read_imm_16()>>12)&7);
		2399	}
		2400
		2401	static void d68040_move16_pi_al(void)
		2402	{
		2403	LIMIT_CPU_TYPES(M68040_PLUS);
		2404	sprintf(g_dasm_str, "move16 (A%d)+, %s; (4)", g_cpu_ir&7, get_imm_str_u32());
		2405	}
		2406
		2407	static void d68040_move16_al_pi(void)
		2408	{
		2409	LIMIT_CPU_TYPES(M68040_PLUS);
		2410	sprintf(g_dasm_str, "move16 %s, (A%d)+; (4)", get_imm_str_u32(), g_cpu_ir&7);
		2411	}
		2412
		2413	static void d68040_move16_ai_al(void)
		2414	{
		2415	LIMIT_CPU_TYPES(M68040_PLUS);
		2416	sprintf(g_dasm_str, "move16 (A%d), %s; (4)", g_cpu_ir&7, get_imm_str_u32());
		2417	}
		2418
		2419	static void d68040_move16_al_ai(void)
		2420	{
		2421	LIMIT_CPU_TYPES(M68040_PLUS);
		2422	sprintf(g_dasm_str, "move16 %s, (A%d); (4)", get_imm_str_u32(), g_cpu_ir&7);
		2423	}
		2424
		2425	static void d68000_muls(void)
		2426	{
		2427	sprintf(g_dasm_str, "muls.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		2428	}
		2429
		2430	static void d68000_mulu(void)
		2431	{
		2432	sprintf(g_dasm_str, "mulu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		2433	}
		2434
		2435	static void d68020_mull(void)
		2436	{
		2437	uint extension;
		2438	LIMIT_CPU_TYPES(M68020_PLUS);
		2439	extension = read_imm_16();
		2440
		2441	if(BIT_A(extension))
		2442	sprintf(g_dasm_str, "mul%c.l %s, D%d-D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);
		2443	else
		2444	sprintf(g_dasm_str, "mul%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);
		2445	}
		2446
		2447	static void d68000_nbcd(void)
		2448	{
		2449	sprintf(g_dasm_str, "nbcd %s", get_ea_mode_str_8(g_cpu_ir));
		2450	}
		2451
		2452	static void d68000_neg_8(void)
		2453	{
		2454	sprintf(g_dasm_str, "neg.b %s", get_ea_mode_str_8(g_cpu_ir));
		2455	}
		2456
		2457	static void d68000_neg_16(void)
		2458	{
		2459	sprintf(g_dasm_str, "neg.w %s", get_ea_mode_str_16(g_cpu_ir));
		2460	}
		2461
		2462	static void d68000_neg_32(void)
		2463	{
		2464	sprintf(g_dasm_str, "neg.l %s", get_ea_mode_str_32(g_cpu_ir));
		2465	}
		2466
		2467	static void d68000_negx_8(void)
		2468	{
		2469	sprintf(g_dasm_str, "negx.b %s", get_ea_mode_str_8(g_cpu_ir));
		2470	}
		2471
		2472	static void d68000_negx_16(void)
		2473	{
		2474	sprintf(g_dasm_str, "negx.w %s", get_ea_mode_str_16(g_cpu_ir));
		2475	}
		2476
		2477	static void d68000_negx_32(void)
		2478	{
		2479	sprintf(g_dasm_str, "negx.l %s", get_ea_mode_str_32(g_cpu_ir));
		2480	}
		2481
		2482	static void d68000_nop(void)
		2483	{
		2484	sprintf(g_dasm_str, "nop");
		2485	}
		2486
		2487	static void d68000_not_8(void)
		2488	{
		2489	sprintf(g_dasm_str, "not.b %s", get_ea_mode_str_8(g_cpu_ir));
		2490	}
		2491
		2492	static void d68000_not_16(void)
		2493	{
		2494	sprintf(g_dasm_str, "not.w %s", get_ea_mode_str_16(g_cpu_ir));
		2495	}
		2496
		2497	static void d68000_not_32(void)
		2498	{
		2499	sprintf(g_dasm_str, "not.l %s", get_ea_mode_str_32(g_cpu_ir));
		2500	}
		2501
		2502	static void d68000_or_er_8(void)
		2503	{
		2504	sprintf(g_dasm_str, "or.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
		2505	}
		2506
		2507	static void d68000_or_er_16(void)
		2508	{
		2509	sprintf(g_dasm_str, "or.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		2510	}
		2511
		2512	static void d68000_or_er_32(void)
		2513	{
		2514	sprintf(g_dasm_str, "or.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		2515	}
		2516
		2517	static void d68000_or_re_8(void)
		2518	{
		2519	sprintf(g_dasm_str, "or.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		2520	}
		2521
		2522	static void d68000_or_re_16(void)
		2523	{
		2524	sprintf(g_dasm_str, "or.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
		2525	}
		2526
		2527	static void d68000_or_re_32(void)
		2528	{
		2529	sprintf(g_dasm_str, "or.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
		2530	}
		2531
		2532	static void d68000_ori_8(void)
		2533	{
		2534	char* str = get_imm_str_u8();
		2535	sprintf(g_dasm_str, "ori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
		2536	}
		2537
		2538	static void d68000_ori_16(void)
		2539	{
		2540	char* str = get_imm_str_u16();
		2541	sprintf(g_dasm_str, "ori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
		2542	}
		2543
		2544	static void d68000_ori_32(void)
		2545	{
		2546	char* str = get_imm_str_u32();
		2547	sprintf(g_dasm_str, "ori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
		2548	}
		2549
		2550	static void d68000_ori_to_ccr(void)
		2551	{
		2552	sprintf(g_dasm_str, "ori %s, CCR", get_imm_str_u8());
		2553	}
		2554
		2555	static void d68000_ori_to_sr(void)
		2556	{
		2557	sprintf(g_dasm_str, "ori %s, SR", get_imm_str_u16());
		2558	}
		2559
		2560	static void d68020_pack_rr(void)
		2561	{
		2562	LIMIT_CPU_TYPES(M68020_PLUS);
		2563	sprintf(g_dasm_str, "pack D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
		2564	}
		2565
		2566	static void d68020_pack_mm(void)
		2567	{
		2568	LIMIT_CPU_TYPES(M68020_PLUS);
		2569	sprintf(g_dasm_str, "pack -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
		2570	}
		2571
		2572	static void d68000_pea(void)
		2573	{
		2574	sprintf(g_dasm_str, "pea %s", get_ea_mode_str_32(g_cpu_ir));
		2575	}
		2576
		2577	static void d68040_pflush(void)
		2578	{
		2579	LIMIT_CPU_TYPES(M68040_PLUS);
		2580
		2581	if (g_cpu_ir & 0x10)
		2582	{
		2583	sprintf(g_dasm_str, "pflusha%s", (g_cpu_ir & 8) ? "" : "n");
		2584	}
		2585	else
		2586	{
		2587	sprintf(g_dasm_str, "pflush%s(A%d)", (g_cpu_ir & 8) ? "" : "n", g_cpu_ir & 7);
		2588	}
		2589	}
		2590
		2591	static void d68000_reset(void)
		2592	{
		2593	sprintf(g_dasm_str, "reset");
		2594	}
		2595
		2596	static void d68000_ror_s_8(void)
		2597	{
		2598	sprintf(g_dasm_str, "ror.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2599	}
		2600
		2601	static void d68000_ror_s_16(void)
		2602	{
		2603	sprintf(g_dasm_str, "ror.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7],g_cpu_ir&7);
		2604	}
		2605
		2606	static void d68000_ror_s_32(void)
		2607	{
		2608	sprintf(g_dasm_str, "ror.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2609	}
		2610
		2611	static void d68000_ror_r_8(void)
		2612	{
		2613	sprintf(g_dasm_str, "ror.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2614	}
		2615
		2616	static void d68000_ror_r_16(void)
		2617	{
		2618	sprintf(g_dasm_str, "ror.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2619	}
		2620
		2621	static void d68000_ror_r_32(void)
		2622	{
		2623	sprintf(g_dasm_str, "ror.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2624	}
		2625
		2626	static void d68000_ror_ea(void)
		2627	{
		2628	sprintf(g_dasm_str, "ror.w %s", get_ea_mode_str_32(g_cpu_ir));
		2629	}
		2630
		2631	static void d68000_rol_s_8(void)
		2632	{
		2633	sprintf(g_dasm_str, "rol.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2634	}
		2635
		2636	static void d68000_rol_s_16(void)
		2637	{
		2638	sprintf(g_dasm_str, "rol.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2639	}
		2640
		2641	static void d68000_rol_s_32(void)
		2642	{
		2643	sprintf(g_dasm_str, "rol.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2644	}
		2645
		2646	static void d68000_rol_r_8(void)
		2647	{
		2648	sprintf(g_dasm_str, "rol.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2649	}
		2650
		2651	static void d68000_rol_r_16(void)
		2652	{
		2653	sprintf(g_dasm_str, "rol.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2654	}
		2655
		2656	static void d68000_rol_r_32(void)
		2657	{
		2658	sprintf(g_dasm_str, "rol.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2659	}
		2660
		2661	static void d68000_rol_ea(void)
		2662	{
		2663	sprintf(g_dasm_str, "rol.w %s", get_ea_mode_str_32(g_cpu_ir));
		2664	}
		2665
		2666	static void d68000_roxr_s_8(void)
		2667	{
		2668	sprintf(g_dasm_str, "roxr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2669	}
		2670
		2671	static void d68000_roxr_s_16(void)
		2672	{
		2673	sprintf(g_dasm_str, "roxr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2674	}
		2675
		2676
		2677	static void d68000_roxr_s_32(void)
		2678	{
		2679	sprintf(g_dasm_str, "roxr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2680	}
		2681
		2682	static void d68000_roxr_r_8(void)
		2683	{
		2684	sprintf(g_dasm_str, "roxr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2685	}
		2686
		2687	static void d68000_roxr_r_16(void)
		2688	{
		2689	sprintf(g_dasm_str, "roxr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2690	}
		2691
		2692	static void d68000_roxr_r_32(void)
		2693	{
		2694	sprintf(g_dasm_str, "roxr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2695	}
		2696
		2697	static void d68000_roxr_ea(void)
		2698	{
		2699	sprintf(g_dasm_str, "roxr.w %s", get_ea_mode_str_32(g_cpu_ir));
		2700	}
		2701
		2702	static void d68000_roxl_s_8(void)
		2703	{
		2704	sprintf(g_dasm_str, "roxl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2705	}
		2706
		2707	static void d68000_roxl_s_16(void)
		2708	{
		2709	sprintf(g_dasm_str, "roxl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2710	}
		2711
		2712	static void d68000_roxl_s_32(void)
		2713	{
		2714	sprintf(g_dasm_str, "roxl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
		2715	}
		2716
		2717	static void d68000_roxl_r_8(void)
		2718	{
		2719	sprintf(g_dasm_str, "roxl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2720	}
		2721
		2722	static void d68000_roxl_r_16(void)
		2723	{
		2724	sprintf(g_dasm_str, "roxl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2725	}
		2726
		2727	static void d68000_roxl_r_32(void)
		2728	{
		2729	sprintf(g_dasm_str, "roxl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
		2730	}
		2731
		2732	static void d68000_roxl_ea(void)
		2733	{
		2734	sprintf(g_dasm_str, "roxl.w %s", get_ea_mode_str_32(g_cpu_ir));
		2735	}
		2736
		2737	static void d68010_rtd(void)
		2738	{
		2739	LIMIT_CPU_TYPES(M68010_PLUS);
		2740	sprintf(g_dasm_str, "rtd %s; (1+)", get_imm_str_s16());
		2741	SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
		2742	}
		2743
		2744	static void d68000_rte(void)
		2745	{
		2746	sprintf(g_dasm_str, "rte");
		2747	SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
		2748	}
		2749
		2750	static void d68020_rtm(void)
		2751	{
		2752	LIMIT_CPU_TYPES(M68020_ONLY);
		2753	sprintf(g_dasm_str, "rtm %c%d; (2+)", BIT_3(g_cpu_ir) ? 'A' : 'D', g_cpu_ir&7);
		2754	SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
		2755	}
		2756
		2757	static void d68000_rtr(void)
		2758	{
		2759	sprintf(g_dasm_str, "rtr");
		2760	SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
		2761	}
		2762
		2763	static void d68000_rts(void)
		2764	{
		2765	sprintf(g_dasm_str, "rts");
		2766	SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);
		2767	}
		2768
		2769	static void d68000_sbcd_rr(void)
		2770	{
		2771	sprintf(g_dasm_str, "sbcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		2772	}
		2773
		2774	static void d68000_sbcd_mm(void)
		2775	{
		2776	sprintf(g_dasm_str, "sbcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		2777	}
		2778
		2779	static void d68000_scc(void)
		2780	{
		2781	sprintf(g_dasm_str, "s%-2s %s", g_cc[(g_cpu_ir>>8)&0xf], get_ea_mode_str_8(g_cpu_ir));
		2782	}
		2783
		2784	static void d68000_stop(void)
		2785	{
		2786	sprintf(g_dasm_str, "stop %s", get_imm_str_s16());
		2787	}
		2788
		2789	static void d68000_sub_er_8(void)
		2790	{
		2791	sprintf(g_dasm_str, "sub.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
		2792	}
		2793
		2794	static void d68000_sub_er_16(void)
		2795	{
		2796	sprintf(g_dasm_str, "sub.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		2797	}
		2798
		2799	static void d68000_sub_er_32(void)
		2800	{
		2801	sprintf(g_dasm_str, "sub.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		2802	}
		2803
		2804	static void d68000_sub_re_8(void)
		2805	{
		2806	sprintf(g_dasm_str, "sub.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
		2807	}
		2808
		2809	static void d68000_sub_re_16(void)
		2810	{
		2811	sprintf(g_dasm_str, "sub.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
		2812	}
		2813
		2814	static void d68000_sub_re_32(void)
		2815	{
		2816	sprintf(g_dasm_str, "sub.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
		2817	}
		2818
		2819	static void d68000_suba_16(void)
		2820	{
		2821	sprintf(g_dasm_str, "suba.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
		2822	}
		2823
		2824	static void d68000_suba_32(void)
		2825	{
		2826	sprintf(g_dasm_str, "suba.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
		2827	}
		2828
		2829	static void d68000_subi_8(void)
		2830	{
		2831	char* str = get_imm_str_s8();
		2832	sprintf(g_dasm_str, "subi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
		2833	}
		2834
		2835	static void d68000_subi_16(void)
		2836	{
		2837	char* str = get_imm_str_s16();
		2838	sprintf(g_dasm_str, "subi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
		2839	}
		2840
		2841	static void d68000_subi_32(void)
		2842	{
		2843	char* str = get_imm_str_s32();
		2844	sprintf(g_dasm_str, "subi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
		2845	}
		2846
		2847	static void d68000_subq_8(void)
		2848	{
		2849	sprintf(g_dasm_str, "subq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
		2850	}
		2851
		2852	static void d68000_subq_16(void)
		2853	{
		2854	sprintf(g_dasm_str, "subq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
		2855	}
		2856
		2857	static void d68000_subq_32(void)
		2858	{
		2859	sprintf(g_dasm_str, "subq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
		2860	}
		2861
		2862	static void d68000_subx_rr_8(void)
		2863	{
		2864	sprintf(g_dasm_str, "subx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		2865	}
		2866
		2867	static void d68000_subx_rr_16(void)
		2868	{
		2869	sprintf(g_dasm_str, "subx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		2870	}
		2871
		2872	static void d68000_subx_rr_32(void)
		2873	{
		2874	sprintf(g_dasm_str, "subx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		2875	}
		2876
		2877	static void d68000_subx_mm_8(void)
		2878	{
		2879	sprintf(g_dasm_str, "subx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		2880	}
		2881
		2882	static void d68000_subx_mm_16(void)
		2883	{
		2884	sprintf(g_dasm_str, "subx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		2885	}
		2886
		2887	static void d68000_subx_mm_32(void)
		2888	{
		2889	sprintf(g_dasm_str, "subx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
		2890	}
		2891
		2892	static void d68000_swap(void)
		2893	{
		2894	sprintf(g_dasm_str, "swap D%d", g_cpu_ir&7);
		2895	}
		2896
		2897	static void d68000_tas(void)
		2898	{
		2899	sprintf(g_dasm_str, "tas %s", get_ea_mode_str_8(g_cpu_ir));
		2900	}
		2901
		2902	static void d68000_trap(void)
		2903	{
		2904	sprintf(g_dasm_str, "trap #$%x", g_cpu_ir&0xf);
		2905	}
		2906
		2907	static void d68020_trapcc_0(void)
		2908	{
		2909	LIMIT_CPU_TYPES(M68020_PLUS);
		2910	sprintf(g_dasm_str, "trap%-2s; (2+)", g_cc[(g_cpu_ir>>8)&0xf]);
		2911	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		2912	}
		2913
		2914	static void d68020_trapcc_16(void)
		2915	{
		2916	LIMIT_CPU_TYPES(M68020_PLUS);
		2917	sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u16());
		2918	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		2919	}
		2920
		2921	static void d68020_trapcc_32(void)
		2922	{
		2923	LIMIT_CPU_TYPES(M68020_PLUS);
		2924	sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u32());
		2925	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		2926	}
		2927
		2928	static void d68000_trapv(void)
		2929	{
		2930	sprintf(g_dasm_str, "trapv");
		2931	SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);
		2932	}
		2933
		2934	static void d68000_tst_8(void)
		2935	{
		2936	sprintf(g_dasm_str, "tst.b %s", get_ea_mode_str_8(g_cpu_ir));
		2937	}
		2938
		2939	static void d68020_tst_pcdi_8(void)
		2940	{
		2941	LIMIT_CPU_TYPES(M68020_PLUS);
		2942	sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
		2943	}
		2944
		2945	static void d68020_tst_pcix_8(void)
		2946	{
		2947	LIMIT_CPU_TYPES(M68020_PLUS);
		2948	sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
		2949	}
		2950
		2951	static void d68020_tst_i_8(void)
		2952	{
		2953	LIMIT_CPU_TYPES(M68020_PLUS);
		2954	sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));
		2955	}
		2956
		2957	static void d68000_tst_16(void)
		2958	{
		2959	sprintf(g_dasm_str, "tst.w %s", get_ea_mode_str_16(g_cpu_ir));
		2960	}
		2961
		2962	static void d68020_tst_a_16(void)
		2963	{
		2964	LIMIT_CPU_TYPES(M68020_PLUS);
		2965	sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
		2966	}
		2967
		2968	static void d68020_tst_pcdi_16(void)
		2969	{
		2970	LIMIT_CPU_TYPES(M68020_PLUS);
		2971	sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
		2972	}
		2973
		2974	static void d68020_tst_pcix_16(void)
		2975	{
		2976	LIMIT_CPU_TYPES(M68020_PLUS);
		2977	sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
		2978	}
		2979
		2980	static void d68020_tst_i_16(void)
		2981	{
		2982	LIMIT_CPU_TYPES(M68020_PLUS);
		2983	sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));
		2984	}
		2985
		2986	static void d68000_tst_32(void)
		2987	{
		2988	sprintf(g_dasm_str, "tst.l %s", get_ea_mode_str_32(g_cpu_ir));
		2989	}
		2990
		2991	static void d68020_tst_a_32(void)
		2992	{
		2993	LIMIT_CPU_TYPES(M68020_PLUS);
		2994	sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
		2995	}
		2996
		2997	static void d68020_tst_pcdi_32(void)
		2998	{
		2999	LIMIT_CPU_TYPES(M68020_PLUS);
		3000	sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
		3001	}
		3002
		3003	static void d68020_tst_pcix_32(void)
		3004	{
		3005	LIMIT_CPU_TYPES(M68020_PLUS);
		3006	sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
		3007	}
		3008
		3009	static void d68020_tst_i_32(void)
		3010	{
		3011	LIMIT_CPU_TYPES(M68020_PLUS);
		3012	sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));
		3013	}
		3014
		3015	static void d68000_unlk(void)
		3016	{
		3017	sprintf(g_dasm_str, "unlk A%d", g_cpu_ir&7);
		3018	}
		3019
		3020	static void d68020_unpk_rr(void)
		3021	{
		3022	LIMIT_CPU_TYPES(M68020_PLUS);
		3023	sprintf(g_dasm_str, "unpk D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
		3024	}
		3025
		3026	static void d68020_unpk_mm(void)
		3027	{
		3028	LIMIT_CPU_TYPES(M68020_PLUS);
		3029	sprintf(g_dasm_str, "unpk -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());
		3030	}
		3031
		3032
		3033
		3034	/* ======================================================================== */
		3035	/* ======================= INSTRUCTION TABLE BUILDER ====================== */
		3036	/* ======================================================================== */
		3037
		3038	/* EA Masks:
		3039	800 = data register direct
		3040	400 = address register direct
		3041	200 = address register indirect
		3042	100 = ARI postincrement
		3043	80 = ARI pre-decrement
		3044	40 = ARI displacement
		3045	20 = ARI index
		3046	10 = absolute short
		3047	8 = absolute long
		3048	4 = immediate / sr
		3049	2 = pc displacement
		3050	1 = pc idx
		3051	*/
		3052
		3053	static opcode_struct g_opcode_info[] =
		3054	{
		3055	/* opcode handler mask match ea mask */
		3056	{d68000_1010 , 0xf000, 0xa000, 0x000},
		3057	{d68000_1111 , 0xf000, 0xf000, 0x000},
		3058	{d68000_abcd_rr , 0xf1f8, 0xc100, 0x000},
		3059	{d68000_abcd_mm , 0xf1f8, 0xc108, 0x000},
		3060	{d68000_add_er_8 , 0xf1c0, 0xd000, 0xbff},
		3061	{d68000_add_er_16 , 0xf1c0, 0xd040, 0xfff},
		3062	{d68000_add_er_32 , 0xf1c0, 0xd080, 0xfff},
		3063	{d68000_add_re_8 , 0xf1c0, 0xd100, 0x3f8},
		3064	{d68000_add_re_16 , 0xf1c0, 0xd140, 0x3f8},
		3065	{d68000_add_re_32 , 0xf1c0, 0xd180, 0x3f8},
		3066	{d68000_adda_16 , 0xf1c0, 0xd0c0, 0xfff},
		3067	{d68000_adda_32 , 0xf1c0, 0xd1c0, 0xfff},
		3068	{d68000_addi_8 , 0xffc0, 0x0600, 0xbf8},
		3069	{d68000_addi_16 , 0xffc0, 0x0640, 0xbf8},
		3070	{d68000_addi_32 , 0xffc0, 0x0680, 0xbf8},
		3071	{d68000_addq_8 , 0xf1c0, 0x5000, 0xbf8},
		3072	{d68000_addq_16 , 0xf1c0, 0x5040, 0xff8},
		3073	{d68000_addq_32 , 0xf1c0, 0x5080, 0xff8},
		3074	{d68000_addx_rr_8 , 0xf1f8, 0xd100, 0x000},
		3075	{d68000_addx_rr_16 , 0xf1f8, 0xd140, 0x000},
		3076	{d68000_addx_rr_32 , 0xf1f8, 0xd180, 0x000},
		3077	{d68000_addx_mm_8 , 0xf1f8, 0xd108, 0x000},
		3078	{d68000_addx_mm_16 , 0xf1f8, 0xd148, 0x000},
		3079	{d68000_addx_mm_32 , 0xf1f8, 0xd188, 0x000},
		3080	{d68000_and_er_8 , 0xf1c0, 0xc000, 0xbff},
		3081	{d68000_and_er_16 , 0xf1c0, 0xc040, 0xbff},
		3082	{d68000_and_er_32 , 0xf1c0, 0xc080, 0xbff},
		3083	{d68000_and_re_8 , 0xf1c0, 0xc100, 0x3f8},
		3084	{d68000_and_re_16 , 0xf1c0, 0xc140, 0x3f8},
		3085	{d68000_and_re_32 , 0xf1c0, 0xc180, 0x3f8},
		3086	{d68000_andi_to_ccr , 0xffff, 0x023c, 0x000},
		3087	{d68000_andi_to_sr , 0xffff, 0x027c, 0x000},
		3088	{d68000_andi_8 , 0xffc0, 0x0200, 0xbf8},
		3089	{d68000_andi_16 , 0xffc0, 0x0240, 0xbf8},
		3090	{d68000_andi_32 , 0xffc0, 0x0280, 0xbf8},
		3091	{d68000_asr_s_8 , 0xf1f8, 0xe000, 0x000},
		3092	{d68000_asr_s_16 , 0xf1f8, 0xe040, 0x000},
		3093	{d68000_asr_s_32 , 0xf1f8, 0xe080, 0x000},
		3094	{d68000_asr_r_8 , 0xf1f8, 0xe020, 0x000},
		3095	{d68000_asr_r_16 , 0xf1f8, 0xe060, 0x000},
		3096	{d68000_asr_r_32 , 0xf1f8, 0xe0a0, 0x000},
		3097	{d68000_asr_ea , 0xffc0, 0xe0c0, 0x3f8},
		3098	{d68000_asl_s_8 , 0xf1f8, 0xe100, 0x000},
		3099	{d68000_asl_s_16 , 0xf1f8, 0xe140, 0x000},
		3100	{d68000_asl_s_32 , 0xf1f8, 0xe180, 0x000},
		3101	{d68000_asl_r_8 , 0xf1f8, 0xe120, 0x000},
		3102	{d68000_asl_r_16 , 0xf1f8, 0xe160, 0x000},
		3103	{d68000_asl_r_32 , 0xf1f8, 0xe1a0, 0x000},
		3104	{d68000_asl_ea , 0xffc0, 0xe1c0, 0x3f8},
		3105	{d68000_bcc_8 , 0xf000, 0x6000, 0x000},
		3106	{d68000_bcc_16 , 0xf0ff, 0x6000, 0x000},
		3107	{d68020_bcc_32 , 0xf0ff, 0x60ff, 0x000},
		3108	{d68000_bchg_r , 0xf1c0, 0x0140, 0xbf8},
		3109	{d68000_bchg_s , 0xffc0, 0x0840, 0xbf8},
		3110	{d68000_bclr_r , 0xf1c0, 0x0180, 0xbf8},
		3111	{d68000_bclr_s , 0xffc0, 0x0880, 0xbf8},
		3112	{d68020_bfchg , 0xffc0, 0xeac0, 0xa78},
		3113	{d68020_bfclr , 0xffc0, 0xecc0, 0xa78},
		3114	{d68020_bfexts , 0xffc0, 0xebc0, 0xa7b},
		3115	{d68020_bfextu , 0xffc0, 0xe9c0, 0xa7b},
		3116	{d68020_bfffo , 0xffc0, 0xedc0, 0xa7b},
		3117	{d68020_bfins , 0xffc0, 0xefc0, 0xa78},
		3118	{d68020_bfset , 0xffc0, 0xeec0, 0xa78},
		3119	{d68020_bftst , 0xffc0, 0xe8c0, 0xa7b},
		3120	{d68010_bkpt , 0xfff8, 0x4848, 0x000},
		3121	{d68000_bra_8 , 0xff00, 0x6000, 0x000},
		3122	{d68000_bra_16 , 0xffff, 0x6000, 0x000},
		3123	{d68020_bra_32 , 0xffff, 0x60ff, 0x000},
		3124	{d68000_bset_r , 0xf1c0, 0x01c0, 0xbf8},
		3125	{d68000_bset_s , 0xffc0, 0x08c0, 0xbf8},
		3126	{d68000_bsr_8 , 0xff00, 0x6100, 0x000},
		3127	{d68000_bsr_16 , 0xffff, 0x6100, 0x000},
		3128	{d68020_bsr_32 , 0xffff, 0x61ff, 0x000},
		3129	{d68000_btst_r , 0xf1c0, 0x0100, 0xbff},
		3130	{d68000_btst_s , 0xffc0, 0x0800, 0xbfb},
		3131	{d68020_callm , 0xffc0, 0x06c0, 0x27b},
		3132	{d68020_cas_8 , 0xffc0, 0x0ac0, 0x3f8},
		3133	{d68020_cas_16 , 0xffc0, 0x0cc0, 0x3f8},
		3134	{d68020_cas_32 , 0xffc0, 0x0ec0, 0x3f8},
		3135	{d68020_cas2_16 , 0xffff, 0x0cfc, 0x000},
		3136	{d68020_cas2_32 , 0xffff, 0x0efc, 0x000},
		3137	{d68000_chk_16 , 0xf1c0, 0x4180, 0xbff},
		3138	{d68020_chk_32 , 0xf1c0, 0x4100, 0xbff},
		3139	{d68020_chk2_cmp2_8 , 0xffc0, 0x00c0, 0x27b},
		3140	{d68020_chk2_cmp2_16 , 0xffc0, 0x02c0, 0x27b},
		3141	{d68020_chk2_cmp2_32 , 0xffc0, 0x04c0, 0x27b},
		3142	{d68040_cinv , 0xff20, 0xf400, 0x000},
		3143	{d68000_clr_8 , 0xffc0, 0x4200, 0xbf8},
		3144	{d68000_clr_16 , 0xffc0, 0x4240, 0xbf8},
		3145	{d68000_clr_32 , 0xffc0, 0x4280, 0xbf8},
		3146	{d68000_cmp_8 , 0xf1c0, 0xb000, 0xbff},
		3147	{d68000_cmp_16 , 0xf1c0, 0xb040, 0xfff},
		3148	{d68000_cmp_32 , 0xf1c0, 0xb080, 0xfff},
		3149	{d68000_cmpa_16 , 0xf1c0, 0xb0c0, 0xfff},
		3150	{d68000_cmpa_32 , 0xf1c0, 0xb1c0, 0xfff},
		3151	{d68000_cmpi_8 , 0xffc0, 0x0c00, 0xbf8},
		3152	{d68020_cmpi_pcdi_8 , 0xffff, 0x0c3a, 0x000},
		3153	{d68020_cmpi_pcix_8 , 0xffff, 0x0c3b, 0x000},
		3154	{d68000_cmpi_16 , 0xffc0, 0x0c40, 0xbf8},
		3155	{d68020_cmpi_pcdi_16 , 0xffff, 0x0c7a, 0x000},
		3156	{d68020_cmpi_pcix_16 , 0xffff, 0x0c7b, 0x000},
		3157	{d68000_cmpi_32 , 0xffc0, 0x0c80, 0xbf8},
		3158	{d68020_cmpi_pcdi_32 , 0xffff, 0x0cba, 0x000},
		3159	{d68020_cmpi_pcix_32 , 0xffff, 0x0cbb, 0x000},
		3160	{d68000_cmpm_8 , 0xf1f8, 0xb108, 0x000},
		3161	{d68000_cmpm_16 , 0xf1f8, 0xb148, 0x000},
		3162	{d68000_cmpm_32 , 0xf1f8, 0xb188, 0x000},
		3163	{d68020_cpbcc_16 , 0xf1c0, 0xf080, 0x000},
		3164	{d68020_cpbcc_32 , 0xf1c0, 0xf0c0, 0x000},
		3165	{d68020_cpdbcc , 0xf1f8, 0xf048, 0x000},
		3166	{d68020_cpgen , 0xf1c0, 0xf000, 0x000},
		3167	{d68020_cprestore , 0xf1c0, 0xf140, 0x37f},
		3168	{d68020_cpsave , 0xf1c0, 0xf100, 0x2f8},
		3169	{d68020_cpscc , 0xf1c0, 0xf040, 0xbf8},
		3170	{d68020_cptrapcc_0 , 0xf1ff, 0xf07c, 0x000},
		3171	{d68020_cptrapcc_16 , 0xf1ff, 0xf07a, 0x000},
		3172	{d68020_cptrapcc_32 , 0xf1ff, 0xf07b, 0x000},
		3173	{d68040_cpush , 0xff20, 0xf420, 0x000},
		3174	{d68000_dbcc , 0xf0f8, 0x50c8, 0x000},
		3175	{d68000_dbra , 0xfff8, 0x51c8, 0x000},
		3176	{d68000_divs , 0xf1c0, 0x81c0, 0xbff},
		3177	{d68000_divu , 0xf1c0, 0x80c0, 0xbff},
		3178	{d68020_divl , 0xffc0, 0x4c40, 0xbff},
		3179	{d68000_eor_8 , 0xf1c0, 0xb100, 0xbf8},
		3180	{d68000_eor_16 , 0xf1c0, 0xb140, 0xbf8},
		3181	{d68000_eor_32 , 0xf1c0, 0xb180, 0xbf8},
		3182	{d68000_eori_to_ccr , 0xffff, 0x0a3c, 0x000},
		3183	{d68000_eori_to_sr , 0xffff, 0x0a7c, 0x000},
		3184	{d68000_eori_8 , 0xffc0, 0x0a00, 0xbf8},
		3185	{d68000_eori_16 , 0xffc0, 0x0a40, 0xbf8},
		3186	{d68000_eori_32 , 0xffc0, 0x0a80, 0xbf8},
		3187	{d68000_exg_dd , 0xf1f8, 0xc140, 0x000},
		3188	{d68000_exg_aa , 0xf1f8, 0xc148, 0x000},
		3189	{d68000_exg_da , 0xf1f8, 0xc188, 0x000},
		3190	{d68020_extb_32 , 0xfff8, 0x49c0, 0x000},
		3191	{d68000_ext_16 , 0xfff8, 0x4880, 0x000},
		3192	{d68000_ext_32 , 0xfff8, 0x48c0, 0x000},
		3193	{d68040_fpu , 0xffc0, 0xf200, 0x000},
		3194	{d68000_illegal , 0xffff, 0x4afc, 0x000},
		3195	{d68000_jmp , 0xffc0, 0x4ec0, 0x27b},
		3196	{d68000_jsr , 0xffc0, 0x4e80, 0x27b},
		3197	{d68000_lea , 0xf1c0, 0x41c0, 0x27b},
		3198	{d68000_link_16 , 0xfff8, 0x4e50, 0x000},
		3199	{d68020_link_32 , 0xfff8, 0x4808, 0x000},
		3200	{d68000_lsr_s_8 , 0xf1f8, 0xe008, 0x000},
		3201	{d68000_lsr_s_16 , 0xf1f8, 0xe048, 0x000},
		3202	{d68000_lsr_s_32 , 0xf1f8, 0xe088, 0x000},
		3203	{d68000_lsr_r_8 , 0xf1f8, 0xe028, 0x000},
		3204	{d68000_lsr_r_16 , 0xf1f8, 0xe068, 0x000},
		3205	{d68000_lsr_r_32 , 0xf1f8, 0xe0a8, 0x000},
		3206	{d68000_lsr_ea , 0xffc0, 0xe2c0, 0x3f8},
		3207	{d68000_lsl_s_8 , 0xf1f8, 0xe108, 0x000},
		3208	{d68000_lsl_s_16 , 0xf1f8, 0xe148, 0x000},
		3209	{d68000_lsl_s_32 , 0xf1f8, 0xe188, 0x000},
		3210	{d68000_lsl_r_8 , 0xf1f8, 0xe128, 0x000},
		3211	{d68000_lsl_r_16 , 0xf1f8, 0xe168, 0x000},
		3212	{d68000_lsl_r_32 , 0xf1f8, 0xe1a8, 0x000},
		3213	{d68000_lsl_ea , 0xffc0, 0xe3c0, 0x3f8},
		3214	{d68000_move_8 , 0xf000, 0x1000, 0xbff},
		3215	{d68000_move_16 , 0xf000, 0x3000, 0xfff},
		3216	{d68000_move_32 , 0xf000, 0x2000, 0xfff},
		3217	{d68000_movea_16 , 0xf1c0, 0x3040, 0xfff},
		3218	{d68000_movea_32 , 0xf1c0, 0x2040, 0xfff},
		3219	{d68000_move_to_ccr , 0xffc0, 0x44c0, 0xbff},
		3220	{d68010_move_fr_ccr , 0xffc0, 0x42c0, 0xbf8},
		3221	{d68000_move_to_sr , 0xffc0, 0x46c0, 0xbff},
		3222	{d68000_move_fr_sr , 0xffc0, 0x40c0, 0xbf8},
		3223	{d68000_move_to_usp , 0xfff8, 0x4e60, 0x000},
		3224	{d68000_move_fr_usp , 0xfff8, 0x4e68, 0x000},
		3225	{d68010_movec , 0xfffe, 0x4e7a, 0x000},
		3226	{d68000_movem_pd_16 , 0xfff8, 0x48a0, 0x000},
		3227	{d68000_movem_pd_32 , 0xfff8, 0x48e0, 0x000},
		3228	{d68000_movem_re_16 , 0xffc0, 0x4880, 0x2f8},
		3229	{d68000_movem_re_32 , 0xffc0, 0x48c0, 0x2f8},
		3230	{d68000_movem_er_16 , 0xffc0, 0x4c80, 0x37b},
		3231	{d68000_movem_er_32 , 0xffc0, 0x4cc0, 0x37b},
		3232	{d68000_movep_er_16 , 0xf1f8, 0x0108, 0x000},
		3233	{d68000_movep_er_32 , 0xf1f8, 0x0148, 0x000},
		3234	{d68000_movep_re_16 , 0xf1f8, 0x0188, 0x000},
		3235	{d68000_movep_re_32 , 0xf1f8, 0x01c8, 0x000},
		3236	{d68010_moves_8 , 0xffc0, 0x0e00, 0x3f8},
		3237	{d68010_moves_16 , 0xffc0, 0x0e40, 0x3f8},
		3238	{d68010_moves_32 , 0xffc0, 0x0e80, 0x3f8},
		3239	{d68000_moveq , 0xf100, 0x7000, 0x000},
		3240	{d68040_move16_pi_pi , 0xfff8, 0xf620, 0x000},
		3241	{d68040_move16_pi_al , 0xfff8, 0xf600, 0x000},
		3242	{d68040_move16_al_pi , 0xfff8, 0xf608, 0x000},
		3243	{d68040_move16_ai_al , 0xfff8, 0xf610, 0x000},
		3244	{d68040_move16_al_ai , 0xfff8, 0xf618, 0x000},
		3245	{d68000_muls , 0xf1c0, 0xc1c0, 0xbff},
		3246	{d68000_mulu , 0xf1c0, 0xc0c0, 0xbff},
		3247	{d68020_mull , 0xffc0, 0x4c00, 0xbff},
		3248	{d68000_nbcd , 0xffc0, 0x4800, 0xbf8},
		3249	{d68000_neg_8 , 0xffc0, 0x4400, 0xbf8},
		3250	{d68000_neg_16 , 0xffc0, 0x4440, 0xbf8},
		3251	{d68000_neg_32 , 0xffc0, 0x4480, 0xbf8},
		3252	{d68000_negx_8 , 0xffc0, 0x4000, 0xbf8},
		3253	{d68000_negx_16 , 0xffc0, 0x4040, 0xbf8},
		3254	{d68000_negx_32 , 0xffc0, 0x4080, 0xbf8},
		3255	{d68000_nop , 0xffff, 0x4e71, 0x000},
		3256	{d68000_not_8 , 0xffc0, 0x4600, 0xbf8},
		3257	{d68000_not_16 , 0xffc0, 0x4640, 0xbf8},
		3258	{d68000_not_32 , 0xffc0, 0x4680, 0xbf8},
		3259	{d68000_or_er_8 , 0xf1c0, 0x8000, 0xbff},
		3260	{d68000_or_er_16 , 0xf1c0, 0x8040, 0xbff},
		3261	{d68000_or_er_32 , 0xf1c0, 0x8080, 0xbff},
		3262	{d68000_or_re_8 , 0xf1c0, 0x8100, 0x3f8},
		3263	{d68000_or_re_16 , 0xf1c0, 0x8140, 0x3f8},
		3264	{d68000_or_re_32 , 0xf1c0, 0x8180, 0x3f8},
		3265	{d68000_ori_to_ccr , 0xffff, 0x003c, 0x000},
		3266	{d68000_ori_to_sr , 0xffff, 0x007c, 0x000},
		3267	{d68000_ori_8 , 0xffc0, 0x0000, 0xbf8},
		3268	{d68000_ori_16 , 0xffc0, 0x0040, 0xbf8},
		3269	{d68000_ori_32 , 0xffc0, 0x0080, 0xbf8},
		3270	{d68020_pack_rr , 0xf1f8, 0x8140, 0x000},
		3271	{d68020_pack_mm , 0xf1f8, 0x8148, 0x000},
		3272	{d68000_pea , 0xffc0, 0x4840, 0x27b},
		3273	{d68040_pflush , 0xffe0, 0xf500, 0x000},
		3274	{d68000_reset , 0xffff, 0x4e70, 0x000},
		3275	{d68000_ror_s_8 , 0xf1f8, 0xe018, 0x000},
		3276	{d68000_ror_s_16 , 0xf1f8, 0xe058, 0x000},
		3277	{d68000_ror_s_32 , 0xf1f8, 0xe098, 0x000},
		3278	{d68000_ror_r_8 , 0xf1f8, 0xe038, 0x000},
		3279	{d68000_ror_r_16 , 0xf1f8, 0xe078, 0x000},
		3280	{d68000_ror_r_32 , 0xf1f8, 0xe0b8, 0x000},
		3281	{d68000_ror_ea , 0xffc0, 0xe6c0, 0x3f8},
		3282	{d68000_rol_s_8 , 0xf1f8, 0xe118, 0x000},
		3283	{d68000_rol_s_16 , 0xf1f8, 0xe158, 0x000},
		3284	{d68000_rol_s_32 , 0xf1f8, 0xe198, 0x000},
		3285	{d68000_rol_r_8 , 0xf1f8, 0xe138, 0x000},
		3286	{d68000_rol_r_16 , 0xf1f8, 0xe178, 0x000},
		3287	{d68000_rol_r_32 , 0xf1f8, 0xe1b8, 0x000},
		3288	{d68000_rol_ea , 0xffc0, 0xe7c0, 0x3f8},
		3289	{d68000_roxr_s_8 , 0xf1f8, 0xe010, 0x000},
		3290	{d68000_roxr_s_16 , 0xf1f8, 0xe050, 0x000},
		3291	{d68000_roxr_s_32 , 0xf1f8, 0xe090, 0x000},
		3292	{d68000_roxr_r_8 , 0xf1f8, 0xe030, 0x000},
		3293	{d68000_roxr_r_16 , 0xf1f8, 0xe070, 0x000},
		3294	{d68000_roxr_r_32 , 0xf1f8, 0xe0b0, 0x000},
		3295	{d68000_roxr_ea , 0xffc0, 0xe4c0, 0x3f8},
		3296	{d68000_roxl_s_8 , 0xf1f8, 0xe110, 0x000},
		3297	{d68000_roxl_s_16 , 0xf1f8, 0xe150, 0x000},
		3298	{d68000_roxl_s_32 , 0xf1f8, 0xe190, 0x000},
		3299	{d68000_roxl_r_8 , 0xf1f8, 0xe130, 0x000},
		3300	{d68000_roxl_r_16 , 0xf1f8, 0xe170, 0x000},
		3301	{d68000_roxl_r_32 , 0xf1f8, 0xe1b0, 0x000},
		3302	{d68000_roxl_ea , 0xffc0, 0xe5c0, 0x3f8},
		3303	{d68010_rtd , 0xffff, 0x4e74, 0x000},
		3304	{d68000_rte , 0xffff, 0x4e73, 0x000},
		3305	{d68020_rtm , 0xfff0, 0x06c0, 0x000},
		3306	{d68000_rtr , 0xffff, 0x4e77, 0x000},
		3307	{d68000_rts , 0xffff, 0x4e75, 0x000},
		3308	{d68000_sbcd_rr , 0xf1f8, 0x8100, 0x000},
		3309	{d68000_sbcd_mm , 0xf1f8, 0x8108, 0x000},
		3310	{d68000_scc , 0xf0c0, 0x50c0, 0xbf8},
		3311	{d68000_stop , 0xffff, 0x4e72, 0x000},
		3312	{d68000_sub_er_8 , 0xf1c0, 0x9000, 0xbff},
		3313	{d68000_sub_er_16 , 0xf1c0, 0x9040, 0xfff},
		3314	{d68000_sub_er_32 , 0xf1c0, 0x9080, 0xfff},
		3315	{d68000_sub_re_8 , 0xf1c0, 0x9100, 0x3f8},
		3316	{d68000_sub_re_16 , 0xf1c0, 0x9140, 0x3f8},
		3317	{d68000_sub_re_32 , 0xf1c0, 0x9180, 0x3f8},
		3318	{d68000_suba_16 , 0xf1c0, 0x90c0, 0xfff},
		3319	{d68000_suba_32 , 0xf1c0, 0x91c0, 0xfff},
		3320	{d68000_subi_8 , 0xffc0, 0x0400, 0xbf8},
		3321	{d68000_subi_16 , 0xffc0, 0x0440, 0xbf8},
		3322	{d68000_subi_32 , 0xffc0, 0x0480, 0xbf8},
		3323	{d68000_subq_8 , 0xf1c0, 0x5100, 0xbf8},
		3324	{d68000_subq_16 , 0xf1c0, 0x5140, 0xff8},
		3325	{d68000_subq_32 , 0xf1c0, 0x5180, 0xff8},
		3326	{d68000_subx_rr_8 , 0xf1f8, 0x9100, 0x000},
		3327	{d68000_subx_rr_16 , 0xf1f8, 0x9140, 0x000},
		3328	{d68000_subx_rr_32 , 0xf1f8, 0x9180, 0x000},
		3329	{d68000_subx_mm_8 , 0xf1f8, 0x9108, 0x000},
		3330	{d68000_subx_mm_16 , 0xf1f8, 0x9148, 0x000},
		3331	{d68000_subx_mm_32 , 0xf1f8, 0x9188, 0x000},
		3332	{d68000_swap , 0xfff8, 0x4840, 0x000},
		3333	{d68000_tas , 0xffc0, 0x4ac0, 0xbf8},
		3334	{d68000_trap , 0xfff0, 0x4e40, 0x000},
		3335	{d68020_trapcc_0 , 0xf0ff, 0x50fc, 0x000},
		3336	{d68020_trapcc_16 , 0xf0ff, 0x50fa, 0x000},
		3337	{d68020_trapcc_32 , 0xf0ff, 0x50fb, 0x000},
		3338	{d68000_trapv , 0xffff, 0x4e76, 0x000},
		3339	{d68000_tst_8 , 0xffc0, 0x4a00, 0xbf8},
		3340	{d68020_tst_pcdi_8 , 0xffff, 0x4a3a, 0x000},
		3341	{d68020_tst_pcix_8 , 0xffff, 0x4a3b, 0x000},
		3342	{d68020_tst_i_8 , 0xffff, 0x4a3c, 0x000},
		3343	{d68000_tst_16 , 0xffc0, 0x4a40, 0xbf8},
		3344	{d68020_tst_a_16 , 0xfff8, 0x4a48, 0x000},
		3345	{d68020_tst_pcdi_16 , 0xffff, 0x4a7a, 0x000},
		3346	{d68020_tst_pcix_16 , 0xffff, 0x4a7b, 0x000},
		3347	{d68020_tst_i_16 , 0xffff, 0x4a7c, 0x000},
		3348	{d68000_tst_32 , 0xffc0, 0x4a80, 0xbf8},
		3349	{d68020_tst_a_32 , 0xfff8, 0x4a88, 0x000},
		3350	{d68020_tst_pcdi_32 , 0xffff, 0x4aba, 0x000},
		3351	{d68020_tst_pcix_32 , 0xffff, 0x4abb, 0x000},
		3352	{d68020_tst_i_32 , 0xffff, 0x4abc, 0x000},
		3353	{d68000_unlk , 0xfff8, 0x4e58, 0x000},
		3354	{d68020_unpk_rr , 0xf1f8, 0x8180, 0x000},
		3355	{d68020_unpk_mm , 0xf1f8, 0x8188, 0x000},
		3356	{0, 0, 0, 0}
		3357	};
		3358
		3359	/* Check if opcode is using a valid ea mode */
		3360	static int valid_ea(uint opcode, uint mask)
		3361	{
		3362	if(mask == 0)
		3363	return 1;
		3364
		3365	switch(opcode & 0x3f)
		3366	{
		3367	case 0x00: case 0x01: case 0x02: case 0x03:
		3368	case 0x04: case 0x05: case 0x06: case 0x07:
		3369	return (mask & 0x800) != 0;
		3370	case 0x08: case 0x09: case 0x0a: case 0x0b:
		3371	case 0x0c: case 0x0d: case 0x0e: case 0x0f:
		3372	return (mask & 0x400) != 0;
		3373	case 0x10: case 0x11: case 0x12: case 0x13:
		3374	case 0x14: case 0x15: case 0x16: case 0x17:
		3375	return (mask & 0x200) != 0;
		3376	case 0x18: case 0x19: case 0x1a: case 0x1b:
		3377	case 0x1c: case 0x1d: case 0x1e: case 0x1f:
		3378	return (mask & 0x100) != 0;
		3379	case 0x20: case 0x21: case 0x22: case 0x23:
		3380	case 0x24: case 0x25: case 0x26: case 0x27:
		3381	return (mask & 0x080) != 0;
		3382	case 0x28: case 0x29: case 0x2a: case 0x2b:
		3383	case 0x2c: case 0x2d: case 0x2e: case 0x2f:
		3384	return (mask & 0x040) != 0;
		3385	case 0x30: case 0x31: case 0x32: case 0x33:
		3386	case 0x34: case 0x35: case 0x36: case 0x37:
		3387	return (mask & 0x020) != 0;
		3388	case 0x38:
		3389	return (mask & 0x010) != 0;
		3390	case 0x39:
		3391	return (mask & 0x008) != 0;
		3392	case 0x3a:
		3393	return (mask & 0x002) != 0;
		3394	case 0x3b:
		3395	return (mask & 0x001) != 0;
		3396	case 0x3c:
		3397	return (mask & 0x004) != 0;
		3398	}
		3399	return 0;
		3400
		3401	}
		3402
		3403	/* Used by qsort */
		3404	static int DECL_SPEC compare_nof_true_bits(const void aptr, const void bptr)
		3405	{
		3406	uint a = ((const opcode_struct*)aptr)->mask;
		3407	uint b = ((const opcode_struct*)bptr)->mask;
		3408
		3409	a = ((a & 0xAAAA) >> 1) + (a & 0x5555);
		3410	a = ((a & 0xCCCC) >> 2) + (a & 0x3333);
		3411	a = ((a & 0xF0F0) >> 4) + (a & 0x0F0F);
		3412	a = ((a & 0xFF00) >> 8) + (a & 0x00FF);
		3413
		3414	b = ((b & 0xAAAA) >> 1) + (b & 0x5555);
		3415	b = ((b & 0xCCCC) >> 2) + (b & 0x3333);
		3416	b = ((b & 0xF0F0) >> 4) + (b & 0x0F0F);
		3417	b = ((b & 0xFF00) >> 8) + (b & 0x00FF);
		3418
		3419	return b - a; /* reversed to get greatest to least sorting */
		3420	}
		3421
		3422	/* build the opcode handler jump table */
		3423	static void build_opcode_table(void)
		3424	{
		3425	uint i;
		3426	uint opcode;
		3427	opcode_struct* ostruct;
		3428	uint opcode_info_length = 0;
		3429
		3430	for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)
		3431	opcode_info_length++;
		3432
		3433	qsort((void *)g_opcode_info, opcode_info_length, sizeof(g_opcode_info[0]), compare_nof_true_bits);
		3434
		3435	for(i=0;i<0x10000;i++)
		3436	{
		3437	g_instruction_table[i] = d68000_illegal; /* default to illegal */
		3438	opcode = i;
		3439	/* search through opcode info for a match */
		3440	for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)
		3441	{
		3442	/* match opcode mask and allowed ea modes */
		3443	if((opcode & ostruct->mask) == ostruct->match)
		3444	{
		3445	/* Handle destination ea for move instructions */
		3446	if((ostruct->opcode_handler == d68000_move_8 \|\|
		3447	ostruct->opcode_handler == d68000_move_16 \|\|
		3448	ostruct->opcode_handler == d68000_move_32) &&
		3449	!valid_ea(((opcode>>9)&7) \| ((opcode>>3)&0x38), 0xbf8))
		3450	continue;
		3451	if(valid_ea(opcode, ostruct->ea_mask))
		3452	{
		3453	g_instruction_table[i] = ostruct->opcode_handler;
		3454	break;
		3455	}
		3456	}
		3457	}
		3458	}
		3459	}
		3460
		3461
		3462
		3463	/* ======================================================================== */
		3464	/* ================================= API ================================== */
		3465	/* ======================================================================== */
		3466
		3467	/* Disasemble one instruction at pc and store in str_buff */
		3468	unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type)
		3469	{
		3470	if(!g_initialized)
		3471	{
		3472	build_opcode_table();
		3473	g_initialized = 1;
		3474	}
		3475	switch(cpu_type)
		3476	{
		3477	case M68K_CPU_TYPE_68000:
		3478	g_cpu_type = TYPE_68000;
		3479	g_address_mask = 0x00ffffff;
		3480	break;
		3481	case M68K_CPU_TYPE_68008:
		3482	g_cpu_type = TYPE_68008;
		3483	g_address_mask = 0x003fffff;
		3484	break;
		3485	case M68K_CPU_TYPE_68010:
		3486	g_cpu_type = TYPE_68010;
		3487	g_address_mask = 0x00ffffff;
		3488	break;
		3489	case M68K_CPU_TYPE_68EC020:
		3490	g_cpu_type = TYPE_68020;
		3491	g_address_mask = 0x00ffffff;
		3492	break;
		3493	case M68K_CPU_TYPE_68020:
		3494	g_cpu_type = TYPE_68020;
		3495	g_address_mask = 0xffffffff;
		3496	break;
		3497	case M68K_CPU_TYPE_68030:
		3498	g_cpu_type = TYPE_68030;
		3499	g_address_mask = 0xffffffff;
		3500	break;
		3501	case M68K_CPU_TYPE_68040:
		3502	g_cpu_type = TYPE_68040;
		3503	g_address_mask = 0xffffffff;
		3504	break;
		3505	default:
		3506	return 0;
		3507	}
		3508
		3509	g_cpu_pc = pc;
		3510	g_helper_str[0] = 0;
		3511	g_cpu_ir = read_imm_16();
		3512	g_opcode_type = 0;
		3513	g_instruction_table[g_cpu_ir]();
		3514	sprintf(str_buff, "%s%s", g_dasm_str, g_helper_str);
		3515	return COMBINE_OPCODE_FLAGS(g_cpu_pc - pc);
		3516	}
		3517
		3518	char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type)
		3519	{
		3520	static char buff[100];
		3521	buff[0] = 0;
		3522	m68k_disassemble(buff, pc, cpu_type);
		3523	return buff;
		3524	}
		3525
		3526	unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, const unsigned char* opdata, const unsigned char* argdata, unsigned int cpu_type)
		3527	{
		3528	unsigned int result;
		3529
		3530	(void)argdata;
		3531	g_rawop = opdata;
		3532	g_rawbasepc = pc;
		3533	result = m68k_disassemble(str_buff, pc, cpu_type);
		3534	g_rawop = NULL;
		3535	return result;
		3536	}
		3537
		3538	/* Check if the instruction is a valid one */
		3539	unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type)
		3540	{
		3541	if(!g_initialized)
		3542	{
		3543	build_opcode_table();
		3544	g_initialized = 1;
		3545	}
		3546
		3547	instruction &= 0xffff;
		3548	if(g_instruction_table[instruction] == d68000_illegal)
		3549	return 0;
		3550
		3551	switch(cpu_type)
		3552	{
		3553	case M68K_CPU_TYPE_68000:
		3554	case M68K_CPU_TYPE_68008:
		3555	if(g_instruction_table[instruction] == d68010_bkpt)
		3556	return 0;
		3557	if(g_instruction_table[instruction] == d68010_move_fr_ccr)
		3558	return 0;
		3559	if(g_instruction_table[instruction] == d68010_movec)
		3560	return 0;
		3561	if(g_instruction_table[instruction] == d68010_moves_8)
		3562	return 0;
		3563	if(g_instruction_table[instruction] == d68010_moves_16)
		3564	return 0;
		3565	if(g_instruction_table[instruction] == d68010_moves_32)
		3566	return 0;
		3567	if(g_instruction_table[instruction] == d68010_rtd)
		3568	return 0;
		3569	case M68K_CPU_TYPE_68010:
		3570	if(g_instruction_table[instruction] == d68020_bcc_32)
		3571	return 0;
		3572	if(g_instruction_table[instruction] == d68020_bfchg)
		3573	return 0;
		3574	if(g_instruction_table[instruction] == d68020_bfclr)
		3575	return 0;
		3576	if(g_instruction_table[instruction] == d68020_bfexts)
		3577	return 0;
		3578	if(g_instruction_table[instruction] == d68020_bfextu)
		3579	return 0;
		3580	if(g_instruction_table[instruction] == d68020_bfffo)
		3581	return 0;
		3582	if(g_instruction_table[instruction] == d68020_bfins)
		3583	return 0;
		3584	if(g_instruction_table[instruction] == d68020_bfset)
		3585	return 0;
		3586	if(g_instruction_table[instruction] == d68020_bftst)
		3587	return 0;
		3588	if(g_instruction_table[instruction] == d68020_bra_32)
		3589	return 0;
		3590	if(g_instruction_table[instruction] == d68020_bsr_32)
		3591	return 0;
		3592	if(g_instruction_table[instruction] == d68020_callm)
		3593	return 0;
		3594	if(g_instruction_table[instruction] == d68020_cas_8)
		3595	return 0;
		3596	if(g_instruction_table[instruction] == d68020_cas_16)
		3597	return 0;
		3598	if(g_instruction_table[instruction] == d68020_cas_32)
		3599	return 0;
		3600	if(g_instruction_table[instruction] == d68020_cas2_16)
		3601	return 0;
		3602	if(g_instruction_table[instruction] == d68020_cas2_32)
		3603	return 0;
		3604	if(g_instruction_table[instruction] == d68020_chk_32)
		3605	return 0;
		3606	if(g_instruction_table[instruction] == d68020_chk2_cmp2_8)
		3607	return 0;
		3608	if(g_instruction_table[instruction] == d68020_chk2_cmp2_16)
		3609	return 0;
		3610	if(g_instruction_table[instruction] == d68020_chk2_cmp2_32)
		3611	return 0;
		3612	if(g_instruction_table[instruction] == d68020_cmpi_pcdi_8)
		3613	return 0;
		3614	if(g_instruction_table[instruction] == d68020_cmpi_pcix_8)
		3615	return 0;
		3616	if(g_instruction_table[instruction] == d68020_cmpi_pcdi_16)
		3617	return 0;
		3618	if(g_instruction_table[instruction] == d68020_cmpi_pcix_16)
		3619	return 0;
		3620	if(g_instruction_table[instruction] == d68020_cmpi_pcdi_32)
		3621	return 0;
		3622	if(g_instruction_table[instruction] == d68020_cmpi_pcix_32)
		3623	return 0;
		3624	if(g_instruction_table[instruction] == d68020_cpbcc_16)
		3625	return 0;
		3626	if(g_instruction_table[instruction] == d68020_cpbcc_32)
		3627	return 0;
		3628	if(g_instruction_table[instruction] == d68020_cpdbcc)
		3629	return 0;
		3630	if(g_instruction_table[instruction] == d68020_cpgen)
		3631	return 0;
		3632	if(g_instruction_table[instruction] == d68020_cprestore)
		3633	return 0;
		3634	if(g_instruction_table[instruction] == d68020_cpsave)
		3635	return 0;
		3636	if(g_instruction_table[instruction] == d68020_cpscc)
		3637	return 0;
		3638	if(g_instruction_table[instruction] == d68020_cptrapcc_0)
		3639	return 0;
		3640	if(g_instruction_table[instruction] == d68020_cptrapcc_16)
		3641	return 0;
		3642	if(g_instruction_table[instruction] == d68020_cptrapcc_32)
		3643	return 0;
		3644	if(g_instruction_table[instruction] == d68020_divl)
		3645	return 0;
		3646	if(g_instruction_table[instruction] == d68020_extb_32)
		3647	return 0;
		3648	if(g_instruction_table[instruction] == d68020_link_32)
		3649	return 0;
		3650	if(g_instruction_table[instruction] == d68020_mull)
		3651	return 0;
		3652	if(g_instruction_table[instruction] == d68020_pack_rr)
		3653	return 0;
		3654	if(g_instruction_table[instruction] == d68020_pack_mm)
		3655	return 0;
		3656	if(g_instruction_table[instruction] == d68020_rtm)
		3657	return 0;
		3658	if(g_instruction_table[instruction] == d68020_trapcc_0)
		3659	return 0;
		3660	if(g_instruction_table[instruction] == d68020_trapcc_16)
		3661	return 0;
		3662	if(g_instruction_table[instruction] == d68020_trapcc_32)
		3663	return 0;
		3664	if(g_instruction_table[instruction] == d68020_tst_pcdi_8)
		3665	return 0;
		3666	if(g_instruction_table[instruction] == d68020_tst_pcix_8)
		3667	return 0;
		3668	if(g_instruction_table[instruction] == d68020_tst_i_8)
		3669	return 0;
		3670	if(g_instruction_table[instruction] == d68020_tst_a_16)
		3671	return 0;
		3672	if(g_instruction_table[instruction] == d68020_tst_pcdi_16)
		3673	return 0;
		3674	if(g_instruction_table[instruction] == d68020_tst_pcix_16)
		3675	return 0;
		3676	if(g_instruction_table[instruction] == d68020_tst_i_16)
		3677	return 0;
		3678	if(g_instruction_table[instruction] == d68020_tst_a_32)
		3679	return 0;
		3680	if(g_instruction_table[instruction] == d68020_tst_pcdi_32)
		3681	return 0;
		3682	if(g_instruction_table[instruction] == d68020_tst_pcix_32)
		3683	return 0;
		3684	if(g_instruction_table[instruction] == d68020_tst_i_32)
		3685	return 0;
		3686	if(g_instruction_table[instruction] == d68020_unpk_rr)
		3687	return 0;
		3688	if(g_instruction_table[instruction] == d68020_unpk_mm)
		3689	return 0;
		3690	case M68K_CPU_TYPE_68EC020:
		3691	case M68K_CPU_TYPE_68020:
		3692	case M68K_CPU_TYPE_68030:
		3693	if(g_instruction_table[instruction] == d68040_cinv)
		3694	return 0;
		3695	if(g_instruction_table[instruction] == d68040_cpush)
		3696	return 0;
		3697	if(g_instruction_table[instruction] == d68040_move16_pi_pi)
		3698	return 0;
		3699	if(g_instruction_table[instruction] == d68040_move16_pi_al)
		3700	return 0;
		3701	if(g_instruction_table[instruction] == d68040_move16_al_pi)
		3702	return 0;
		3703	if(g_instruction_table[instruction] == d68040_move16_ai_al)
		3704	return 0;
		3705	if(g_instruction_table[instruction] == d68040_move16_al_ai)
		3706	return 0;
		3707	if(g_instruction_table[instruction] == d68040_pflush)
		3708	return 0;
		3709	case M68K_CPU_TYPE_68040:
		3710	if(g_instruction_table[instruction] == d68020_cpbcc_16)
		3711	return 0;
		3712	if(g_instruction_table[instruction] == d68020_cpbcc_32)
		3713	return 0;
		3714	if(g_instruction_table[instruction] == d68020_cpdbcc)
		3715	return 0;
		3716	if(g_instruction_table[instruction] == d68020_cpgen)
		3717	return 0;
		3718	if(g_instruction_table[instruction] == d68020_cprestore)
		3719	return 0;
		3720	if(g_instruction_table[instruction] == d68020_cpsave)
		3721	return 0;
		3722	if(g_instruction_table[instruction] == d68020_cpscc)
		3723	return 0;
		3724	if(g_instruction_table[instruction] == d68020_cptrapcc_0)
		3725	return 0;
		3726	if(g_instruction_table[instruction] == d68020_cptrapcc_16)
		3727	return 0;
		3728	if(g_instruction_table[instruction] == d68020_cptrapcc_32)
		3729	return 0;
		3730	}
		3731	if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 &&
		3732	(g_instruction_table[instruction] == d68020_callm \|\|
		3733	g_instruction_table[instruction] == d68020_rtm))
		3734	return 0;
		3735
		3736	return 1;
		3737	}
		3738
		3739
		3740
		3741	/* ======================================================================== */
		3742	/* ============================== END OF FILE ============================= */
		3743	/* ======================================================================== */

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(root)/programs/emulator/dgen-sdl-1.33/musa/m68kdasm.c – Rev 9837