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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 8774 | rgimad | 1 | /* |
| 2 | * AES-NI support functions |
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| 3 | * |
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| 4 | * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved |
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| 5 | * SPDX-License-Identifier: GPL-2.0 |
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| 6 | * |
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| 7 | * This program is free software; you can redistribute it and/or modify |
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| 8 | * it under the terms of the GNU General Public License as published by |
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| 9 | * the Free Software Foundation; either version 2 of the License, or |
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| 10 | * (at your option) any later version. |
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| 11 | * |
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| 12 | * This program is distributed in the hope that it will be useful, |
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| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 15 | * GNU General Public License for more details. |
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| 16 | * |
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| 17 | * You should have received a copy of the GNU General Public License along |
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| 18 | * with this program; if not, write to the Free Software Foundation, Inc., |
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| 19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. |
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| 20 | * |
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| 21 | * This file is part of mbed TLS (https://tls.mbed.org) |
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| 22 | */ |
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| 23 | |||
| 24 | /* |
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| 25 | * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set |
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| 26 | * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/ |
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| 27 | */ |
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| 28 | |||
| 29 | #if !defined(MBEDTLS_CONFIG_FILE) |
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| 30 | #include "mbedtls/config.h" |
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| 31 | #else |
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| 32 | #include MBEDTLS_CONFIG_FILE |
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| 33 | #endif |
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| 34 | |||
| 35 | #if defined(MBEDTLS_AESNI_C) |
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| 36 | |||
| 37 | #if defined(__has_feature) |
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| 38 | #if __has_feature(memory_sanitizer) |
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| 39 | #warning "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code." |
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| 40 | #endif |
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| 41 | #endif |
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| 42 | |||
| 43 | #include "mbedtls/aesni.h" |
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| 44 | |||
| 45 | #include |
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| 46 | |||
| 47 | #ifndef asm |
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| 48 | #define asm __asm |
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| 49 | #endif |
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| 50 | |||
| 51 | #if defined(MBEDTLS_HAVE_X86_64) |
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| 52 | |||
| 53 | /* |
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| 54 | * AES-NI support detection routine |
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| 55 | */ |
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| 56 | int mbedtls_aesni_has_support( unsigned int what ) |
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| 57 | { |
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| 58 | static int done = 0; |
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| 59 | static unsigned int c = 0; |
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| 60 | |||
| 61 | if( ! done ) |
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| 62 | { |
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| 63 | asm( "movl $1, %%eax \n\t" |
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| 64 | "cpuid \n\t" |
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| 65 | : "=c" (c) |
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| 66 | : |
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| 67 | : "eax", "ebx", "edx" ); |
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| 68 | done = 1; |
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| 69 | } |
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| 70 | |||
| 71 | return( ( c & what ) != 0 ); |
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| 72 | } |
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| 73 | |||
| 74 | /* |
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| 75 | * Binutils needs to be at least 2.19 to support AES-NI instructions. |
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| 76 | * Unfortunately, a lot of users have a lower version now (2014-04). |
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| 77 | * Emit bytecode directly in order to support "old" version of gas. |
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| 78 | * |
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| 79 | * Opcodes from the Intel architecture reference manual, vol. 3. |
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| 80 | * We always use registers, so we don't need prefixes for memory operands. |
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| 81 | * Operand macros are in gas order (src, dst) as opposed to Intel order |
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| 82 | * (dst, src) in order to blend better into the surrounding assembly code. |
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| 83 | */ |
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| 84 | #define AESDEC ".byte 0x66,0x0F,0x38,0xDE," |
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| 85 | #define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF," |
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| 86 | #define AESENC ".byte 0x66,0x0F,0x38,0xDC," |
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| 87 | #define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD," |
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| 88 | #define AESIMC ".byte 0x66,0x0F,0x38,0xDB," |
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| 89 | #define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF," |
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| 90 | #define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44," |
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| 91 | |||
| 92 | #define xmm0_xmm0 "0xC0" |
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| 93 | #define xmm0_xmm1 "0xC8" |
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| 94 | #define xmm0_xmm2 "0xD0" |
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| 95 | #define xmm0_xmm3 "0xD8" |
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| 96 | #define xmm0_xmm4 "0xE0" |
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| 97 | #define xmm1_xmm0 "0xC1" |
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| 98 | #define xmm1_xmm2 "0xD1" |
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| 99 | |||
| 100 | /* |
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| 101 | * AES-NI AES-ECB block en(de)cryption |
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| 102 | */ |
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| 103 | int mbedtls_aesni_crypt_ecb( mbedtls_aes_context *ctx, |
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| 104 | int mode, |
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| 105 | const unsigned char input[16], |
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| 106 | unsigned char output[16] ) |
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| 107 | { |
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| 108 | asm( "movdqu (%3), %%xmm0 \n\t" // load input |
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| 109 | "movdqu (%1), %%xmm1 \n\t" // load round key 0 |
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| 110 | "pxor %%xmm1, %%xmm0 \n\t" // round 0 |
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| 111 | "add $16, %1 \n\t" // point to next round key |
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| 112 | "subl $1, %0 \n\t" // normal rounds = nr - 1 |
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| 113 | "test %2, %2 \n\t" // mode? |
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| 114 | "jz 2f \n\t" // 0 = decrypt |
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| 115 | |||
| 116 | "1: \n\t" // encryption loop |
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| 117 | "movdqu (%1), %%xmm1 \n\t" // load round key |
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| 118 | AESENC xmm1_xmm0 "\n\t" // do round |
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| 119 | "add $16, %1 \n\t" // point to next round key |
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| 120 | "subl $1, %0 \n\t" // loop |
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| 121 | "jnz 1b \n\t" |
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| 122 | "movdqu (%1), %%xmm1 \n\t" // load round key |
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| 123 | AESENCLAST xmm1_xmm0 "\n\t" // last round |
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| 124 | "jmp 3f \n\t" |
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| 125 | |||
| 126 | "2: \n\t" // decryption loop |
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| 127 | "movdqu (%1), %%xmm1 \n\t" |
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| 128 | AESDEC xmm1_xmm0 "\n\t" // do round |
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| 129 | "add $16, %1 \n\t" |
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| 130 | "subl $1, %0 \n\t" |
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| 131 | "jnz 2b \n\t" |
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| 132 | "movdqu (%1), %%xmm1 \n\t" // load round key |
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| 133 | AESDECLAST xmm1_xmm0 "\n\t" // last round |
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| 134 | |||
| 135 | "3: \n\t" |
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| 136 | "movdqu %%xmm0, (%4) \n\t" // export output |
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| 137 | : |
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| 138 | : "r" (ctx->nr), "r" (ctx->rk), "r" (mode), "r" (input), "r" (output) |
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| 139 | : "memory", "cc", "xmm0", "xmm1" ); |
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| 140 | |||
| 141 | |||
| 142 | return( 0 ); |
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| 143 | } |
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| 144 | |||
| 145 | /* |
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| 146 | * GCM multiplication: c = a times b in GF(2^128) |
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| 147 | * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5. |
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| 148 | */ |
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| 149 | void mbedtls_aesni_gcm_mult( unsigned char c[16], |
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| 150 | const unsigned char a[16], |
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| 151 | const unsigned char b[16] ) |
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| 152 | { |
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| 153 | unsigned char aa[16], bb[16], cc[16]; |
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| 154 | size_t i; |
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| 155 | |||
| 156 | /* The inputs are in big-endian order, so byte-reverse them */ |
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| 157 | for( i = 0; i < 16; i++ ) |
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| 158 | { |
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| 159 | aa[i] = a[15 - i]; |
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| 160 | bb[i] = b[15 - i]; |
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| 161 | } |
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| 162 | |||
| 163 | asm( "movdqu (%0), %%xmm0 \n\t" // a1:a0 |
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| 164 | "movdqu (%1), %%xmm1 \n\t" // b1:b0 |
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| 165 | |||
| 166 | /* |
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| 167 | * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1 |
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| 168 | * using [CLMUL-WP] algorithm 1 (p. 13). |
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| 169 | */ |
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| 170 | "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0 |
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| 171 | "movdqa %%xmm1, %%xmm3 \n\t" // same |
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| 172 | "movdqa %%xmm1, %%xmm4 \n\t" // same |
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| 173 | PCLMULQDQ xmm0_xmm1 ",0x00 \n\t" // a0*b0 = c1:c0 |
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| 174 | PCLMULQDQ xmm0_xmm2 ",0x11 \n\t" // a1*b1 = d1:d0 |
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| 175 | PCLMULQDQ xmm0_xmm3 ",0x10 \n\t" // a0*b1 = e1:e0 |
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| 176 | PCLMULQDQ xmm0_xmm4 ",0x01 \n\t" // a1*b0 = f1:f0 |
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| 177 | "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0 |
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| 178 | "movdqa %%xmm4, %%xmm3 \n\t" // same |
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| 179 | "psrldq $8, %%xmm4 \n\t" // 0:e1+f1 |
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| 180 | "pslldq $8, %%xmm3 \n\t" // e0+f0:0 |
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| 181 | "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1 |
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| 182 | "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0 |
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| 183 | |||
| 184 | /* |
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| 185 | * Now shift the result one bit to the left, |
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| 186 | * taking advantage of [CLMUL-WP] eq 27 (p. 20) |
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| 187 | */ |
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| 188 | "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0 |
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| 189 | "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2 |
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| 190 | "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1 |
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| 191 | "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1 |
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| 192 | "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63 |
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| 193 | "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63 |
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| 194 | "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63 |
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| 195 | "pslldq $8, %%xmm3 \n\t" // r0>>63:0 |
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| 196 | "pslldq $8, %%xmm4 \n\t" // r2>>63:0 |
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| 197 | "psrldq $8, %%xmm5 \n\t" // 0:r1>>63 |
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| 198 | "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1 |
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| 199 | "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1 |
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| 200 | "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63 |
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| 201 | |||
| 202 | /* |
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| 203 | * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1 |
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| 204 | * using [CLMUL-WP] algorithm 5 (p. 20). |
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| 205 | * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted). |
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| 206 | */ |
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| 207 | /* Step 2 (1) */ |
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| 208 | "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0 |
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| 209 | "movdqa %%xmm1, %%xmm4 \n\t" // same |
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| 210 | "movdqa %%xmm1, %%xmm5 \n\t" // same |
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| 211 | "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a |
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| 212 | "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b |
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| 213 | "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c |
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| 214 | |||
| 215 | /* Step 2 (2) */ |
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| 216 | "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b |
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| 217 | "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c |
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| 218 | "pslldq $8, %%xmm3 \n\t" // a+b+c:0 |
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| 219 | "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0 |
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| 220 | |||
| 221 | /* Steps 3 and 4 */ |
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| 222 | "movdqa %%xmm1,%%xmm0 \n\t" // d:x0 |
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| 223 | "movdqa %%xmm1,%%xmm4 \n\t" // same |
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| 224 | "movdqa %%xmm1,%%xmm5 \n\t" // same |
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| 225 | "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0' |
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| 226 | "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0' |
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| 227 | "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0' |
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| 228 | "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0' |
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| 229 | "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0' |
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| 230 | // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing |
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| 231 | // bits carried from d. Now get those\t bits back in. |
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| 232 | "movdqa %%xmm1,%%xmm3 \n\t" // d:x0 |
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| 233 | "movdqa %%xmm1,%%xmm4 \n\t" // same |
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| 234 | "movdqa %%xmm1,%%xmm5 \n\t" // same |
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| 235 | "psllq $63, %%xmm3 \n\t" // d<<63:stuff |
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| 236 | "psllq $62, %%xmm4 \n\t" // d<<62:stuff |
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| 237 | "psllq $57, %%xmm5 \n\t" // d<<57:stuff |
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| 238 | "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff |
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| 239 | "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff |
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| 240 | "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d |
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| 241 | "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0 |
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| 242 | "pxor %%xmm1, %%xmm0 \n\t" // h1:h0 |
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| 243 | "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0 |
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| 244 | |||
| 245 | "movdqu %%xmm0, (%2) \n\t" // done |
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| 246 | : |
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| 247 | : "r" (aa), "r" (bb), "r" (cc) |
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| 248 | : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" ); |
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| 249 | |||
| 250 | /* Now byte-reverse the outputs */ |
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| 251 | for( i = 0; i < 16; i++ ) |
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| 252 | c[i] = cc[15 - i]; |
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| 253 | |||
| 254 | return; |
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| 255 | } |
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| 256 | |||
| 257 | /* |
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| 258 | * Compute decryption round keys from encryption round keys |
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| 259 | */ |
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| 260 | void mbedtls_aesni_inverse_key( unsigned char *invkey, |
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| 261 | const unsigned char *fwdkey, int nr ) |
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| 262 | { |
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| 263 | unsigned char *ik = invkey; |
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| 264 | const unsigned char *fk = fwdkey + 16 * nr; |
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| 265 | |||
| 266 | memcpy( ik, fk, 16 ); |
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| 267 | |||
| 268 | for( fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16 ) |
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| 269 | asm( "movdqu (%0), %%xmm0 \n\t" |
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| 270 | AESIMC xmm0_xmm0 "\n\t" |
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| 271 | "movdqu %%xmm0, (%1) \n\t" |
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| 272 | : |
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| 273 | : "r" (fk), "r" (ik) |
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| 274 | : "memory", "xmm0" ); |
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| 275 | |||
| 276 | memcpy( ik, fk, 16 ); |
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| 277 | } |
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| 278 | |||
| 279 | /* |
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| 280 | * Key expansion, 128-bit case |
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| 281 | */ |
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| 282 | static void aesni_setkey_enc_128( unsigned char *rk, |
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| 283 | const unsigned char *key ) |
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| 284 | { |
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| 285 | asm( "movdqu (%1), %%xmm0 \n\t" // copy the original key |
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| 286 | "movdqu %%xmm0, (%0) \n\t" // as round key 0 |
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| 287 | "jmp 2f \n\t" // skip auxiliary routine |
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| 288 | |||
| 289 | /* |
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| 290 | * Finish generating the next round key. |
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| 291 | * |
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| 292 | * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff |
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| 293 | * with X = rot( sub( r3 ) ) ^ RCON. |
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| 294 | * |
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| 295 | * On exit, xmm0 is r7:r6:r5:r4 |
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| 296 | * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3 |
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| 297 | * and those are written to the round key buffer. |
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| 298 | */ |
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| 299 | "1: \n\t" |
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| 300 | "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X |
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| 301 | "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4 |
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| 302 | "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0 |
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| 303 | "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4 |
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| 304 | "pslldq $4, %%xmm0 \n\t" // etc |
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| 305 | "pxor %%xmm0, %%xmm1 \n\t" |
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| 306 | "pslldq $4, %%xmm0 \n\t" |
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| 307 | "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time! |
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| 308 | "add $16, %0 \n\t" // point to next round key |
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| 309 | "movdqu %%xmm0, (%0) \n\t" // write it |
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| 310 | "ret \n\t" |
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| 311 | |||
| 312 | /* Main "loop" */ |
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| 313 | "2: \n\t" |
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| 314 | AESKEYGENA xmm0_xmm1 ",0x01 \n\tcall 1b \n\t" |
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| 315 | AESKEYGENA xmm0_xmm1 ",0x02 \n\tcall 1b \n\t" |
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| 316 | AESKEYGENA xmm0_xmm1 ",0x04 \n\tcall 1b \n\t" |
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| 317 | AESKEYGENA xmm0_xmm1 ",0x08 \n\tcall 1b \n\t" |
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| 318 | AESKEYGENA xmm0_xmm1 ",0x10 \n\tcall 1b \n\t" |
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| 319 | AESKEYGENA xmm0_xmm1 ",0x20 \n\tcall 1b \n\t" |
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| 320 | AESKEYGENA xmm0_xmm1 ",0x40 \n\tcall 1b \n\t" |
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| 321 | AESKEYGENA xmm0_xmm1 ",0x80 \n\tcall 1b \n\t" |
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| 322 | AESKEYGENA xmm0_xmm1 ",0x1B \n\tcall 1b \n\t" |
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| 323 | AESKEYGENA xmm0_xmm1 ",0x36 \n\tcall 1b \n\t" |
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| 324 | : |
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| 325 | : "r" (rk), "r" (key) |
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| 326 | : "memory", "cc", "0" ); |
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| 327 | } |
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| 328 | |||
| 329 | /* |
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| 330 | * Key expansion, 192-bit case |
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| 331 | */ |
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| 332 | static void aesni_setkey_enc_192( unsigned char *rk, |
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| 333 | const unsigned char *key ) |
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| 334 | { |
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| 335 | asm( "movdqu (%1), %%xmm0 \n\t" // copy original round key |
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| 336 | "movdqu %%xmm0, (%0) \n\t" |
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| 337 | "add $16, %0 \n\t" |
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| 338 | "movq 16(%1), %%xmm1 \n\t" |
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| 339 | "movq %%xmm1, (%0) \n\t" |
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| 340 | "add $8, %0 \n\t" |
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| 341 | "jmp 2f \n\t" // skip auxiliary routine |
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| 342 | |||
| 343 | /* |
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| 344 | * Finish generating the next 6 quarter-keys. |
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| 345 | * |
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| 346 | * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4 |
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| 347 | * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON. |
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| 348 | * |
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| 349 | * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10 |
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| 350 | * and those are written to the round key buffer. |
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| 351 | */ |
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| 352 | "1: \n\t" |
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| 353 | "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X |
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| 354 | "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4 |
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| 355 | "pslldq $4, %%xmm0 \n\t" // etc |
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| 356 | "pxor %%xmm0, %%xmm2 \n\t" |
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| 357 | "pslldq $4, %%xmm0 \n\t" |
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| 358 | "pxor %%xmm0, %%xmm2 \n\t" |
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| 359 | "pslldq $4, %%xmm0 \n\t" |
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| 360 | "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6 |
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| 361 | "movdqu %%xmm0, (%0) \n\t" |
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| 362 | "add $16, %0 \n\t" |
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| 363 | "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9 |
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| 364 | "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10 |
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| 365 | "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0 |
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| 366 | "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10 |
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| 367 | "movq %%xmm1, (%0) \n\t" |
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| 368 | "add $8, %0 \n\t" |
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| 369 | "ret \n\t" |
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| 370 | |||
| 371 | "2: \n\t" |
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| 372 | AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t" |
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| 373 | AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t" |
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| 374 | AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t" |
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| 375 | AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t" |
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| 376 | AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t" |
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| 377 | AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t" |
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| 378 | AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t" |
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| 379 | AESKEYGENA xmm1_xmm2 ",0x80 \n\tcall 1b \n\t" |
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| 380 | |||
| 381 | : |
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| 382 | : "r" (rk), "r" (key) |
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| 383 | : "memory", "cc", "0" ); |
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| 384 | } |
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| 385 | |||
| 386 | /* |
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| 387 | * Key expansion, 256-bit case |
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| 388 | */ |
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| 389 | static void aesni_setkey_enc_256( unsigned char *rk, |
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| 390 | const unsigned char *key ) |
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| 391 | { |
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| 392 | asm( "movdqu (%1), %%xmm0 \n\t" |
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| 393 | "movdqu %%xmm0, (%0) \n\t" |
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| 394 | "add $16, %0 \n\t" |
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| 395 | "movdqu 16(%1), %%xmm1 \n\t" |
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| 396 | "movdqu %%xmm1, (%0) \n\t" |
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| 397 | "jmp 2f \n\t" // skip auxiliary routine |
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| 398 | |||
| 399 | /* |
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| 400 | * Finish generating the next two round keys. |
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| 401 | * |
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| 402 | * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and |
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| 403 | * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON |
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| 404 | * |
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| 405 | * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12 |
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| 406 | * and those have been written to the output buffer. |
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| 407 | */ |
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| 408 | "1: \n\t" |
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| 409 | "pshufd $0xff, %%xmm2, %%xmm2 \n\t" |
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| 410 | "pxor %%xmm0, %%xmm2 \n\t" |
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| 411 | "pslldq $4, %%xmm0 \n\t" |
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| 412 | "pxor %%xmm0, %%xmm2 \n\t" |
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| 413 | "pslldq $4, %%xmm0 \n\t" |
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| 414 | "pxor %%xmm0, %%xmm2 \n\t" |
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| 415 | "pslldq $4, %%xmm0 \n\t" |
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| 416 | "pxor %%xmm2, %%xmm0 \n\t" |
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| 417 | "add $16, %0 \n\t" |
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| 418 | "movdqu %%xmm0, (%0) \n\t" |
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| 419 | |||
| 420 | /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 ) |
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| 421 | * and proceed to generate next round key from there */ |
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| 422 | AESKEYGENA xmm0_xmm2 ",0x00 \n\t" |
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| 423 | "pshufd $0xaa, %%xmm2, %%xmm2 \n\t" |
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| 424 | "pxor %%xmm1, %%xmm2 \n\t" |
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| 425 | "pslldq $4, %%xmm1 \n\t" |
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| 426 | "pxor %%xmm1, %%xmm2 \n\t" |
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| 427 | "pslldq $4, %%xmm1 \n\t" |
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| 428 | "pxor %%xmm1, %%xmm2 \n\t" |
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| 429 | "pslldq $4, %%xmm1 \n\t" |
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| 430 | "pxor %%xmm2, %%xmm1 \n\t" |
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| 431 | "add $16, %0 \n\t" |
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| 432 | "movdqu %%xmm1, (%0) \n\t" |
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| 433 | "ret \n\t" |
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| 434 | |||
| 435 | /* |
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| 436 | * Main "loop" - Generating one more key than necessary, |
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| 437 | * see definition of mbedtls_aes_context.buf |
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| 438 | */ |
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| 439 | "2: \n\t" |
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| 440 | AESKEYGENA xmm1_xmm2 ",0x01 \n\tcall 1b \n\t" |
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| 441 | AESKEYGENA xmm1_xmm2 ",0x02 \n\tcall 1b \n\t" |
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| 442 | AESKEYGENA xmm1_xmm2 ",0x04 \n\tcall 1b \n\t" |
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| 443 | AESKEYGENA xmm1_xmm2 ",0x08 \n\tcall 1b \n\t" |
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| 444 | AESKEYGENA xmm1_xmm2 ",0x10 \n\tcall 1b \n\t" |
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| 445 | AESKEYGENA xmm1_xmm2 ",0x20 \n\tcall 1b \n\t" |
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| 446 | AESKEYGENA xmm1_xmm2 ",0x40 \n\tcall 1b \n\t" |
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| 447 | : |
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| 448 | : "r" (rk), "r" (key) |
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| 449 | : "memory", "cc", "0" ); |
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| 450 | } |
||
| 451 | |||
| 452 | /* |
||
| 453 | * Key expansion, wrapper |
||
| 454 | */ |
||
| 455 | int mbedtls_aesni_setkey_enc( unsigned char *rk, |
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| 456 | const unsigned char *key, |
||
| 457 | size_t bits ) |
||
| 458 | { |
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| 459 | switch( bits ) |
||
| 460 | { |
||
| 461 | case 128: aesni_setkey_enc_128( rk, key ); break; |
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| 462 | case 192: aesni_setkey_enc_192( rk, key ); break; |
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| 463 | case 256: aesni_setkey_enc_256( rk, key ); break; |
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| 464 | default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH ); |
||
| 465 | } |
||
| 466 | |||
| 467 | return( 0 ); |
||
| 468 | } |
||
| 469 | |||
| 470 | #endif /* MBEDTLS_HAVE_X86_64 */ |
||
| 471 | |||
| 472 | #endif /* MBEDTLS_AESNI_C */ |