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4624 mario79 1
;-----------------------------------------------------------------------------
2
; find the IDE controller in the device list
3
;-----------------------------------------------------------------------------
4
        mov     esi, pcidev_list
5
.loop:
6
        mov     esi, [esi+PCIDEV.fd]
7
        cmp     esi, pcidev_list
8
        jz      .done
9
        mov     eax, [esi+PCIDEV.class]
10
        shr     eax, 4
11
        cmp     eax, 0x01018
12
        jnz     .loop
13
.found:
14
        mov     eax, [esi+PCIDEV.class]
15
        DEBUGF  1, 'K : IDE controller programming interface %x\n', eax
16
        mov     [IDEContrProgrammingInterface], eax
17
 
18
        mov     ah, [esi+PCIDEV.bus]
19
        mov     al, 2
20
        mov     bh, [esi+PCIDEV.devfn]
21
;-----------------------------------------------------------------------------
22
        mov     bl, 0x10
23
        push    eax
24
        call    pci_read_reg
25
        and     eax, 0xFFFC
26
        cmp     ax, 0
27
        je      @f
28
        cmp     ax, 1
29
        jne     .show_BAR0
30
@@:
31
        mov     ax, 0x1F0
32
.show_BAR0:
33
        DEBUGF  1, 'K : BAR0 IDE base addr %x\n', ax
34
        mov     [StandardATABases], ax
35
        mov     [hd_address_table], eax
36
        mov     [hd_address_table+8], eax
37
        mov     [IDE_BAR0_val], ax
38
        pop     eax
39
;-----------------------------------------------------------------------------
40
        mov     bl, 0x14
41
        push    eax
42
        call    pci_read_reg
43
        and     eax, 0xFFFC
44
        cmp     ax, 0
45
        je      @f
46
        cmp     ax, 1
47
        jne     .show_BAR1
48
@@:
49
        mov     ax, 0x3F4
50
.show_BAR1:
51
        DEBUGF  1, 'K : BAR1 IDE base addr %x\n', ax
52
        mov     [IDE_BAR1_val], ax
53
        pop     eax
54
;-----------------------------------------------------------------------------
55
        mov     bl, 0x18
56
        push    eax
57
        call    pci_read_reg
58
        and     eax, 0xFFFC
59
        cmp     ax, 0
60
        je      @f
61
        cmp     ax, 1
62
        jne     .show_BAR2
63
@@:
64
        mov     ax, 0x170
65
.show_BAR2:
66
        DEBUGF  1, 'K : BAR2 IDE base addr %x\n', ax
67
        mov     [StandardATABases+2], ax
68
        mov     [hd_address_table+16], eax
69
        mov     [hd_address_table+24], eax
70
        mov     [IDE_BAR2_val], ax
71
        pop     eax
72
;-----------------------------------------------------------------------------
73
        mov     bl, 0x1C
74
        push    eax
75
        call    pci_read_reg
76
        and     eax, 0xFFFC
77
        cmp     ax, 0
78
        je      @f
79
        cmp     ax, 1
80
        jne     .show_BAR3
81
@@:
82
        mov     ax, 0x374
83
.show_BAR3:
84
        DEBUGF  1, 'K : BAR3 IDE base addr %x\n', ax
85
        mov     [IDE_BAR3_val], ax
86
        pop     eax
87
;-----------------------------------------------------------------------------
88
        mov     bl, 0x20
89
        push    eax
90
        call    pci_read_reg
91
        and     eax, 0xFFFC
92
        DEBUGF  1, 'K : BAR4 IDE controller register base addr %x\n', ax
93
        mov     [IDEContrRegsBaseAddr], ax
94
        pop     eax
95
;-----------------------------------------------------------------------------
96
        mov     bl, 0x3C
97
        push    eax
98
        call    pci_read_reg
99
        and     eax, 0xFF
100
        DEBUGF  1, 'K : IDE Interrupt %x\n', al
101
        mov     [IDE_Interrupt], ax
102
        pop     eax
103
;-----------------------------------------------------------------------------
104
.done:
105
;-----------------------------------------------------------------------------
106
; START of initialisation IDE ATA code
107
;-----------------------------------------------------------------------------
108
        cmp     [IDEContrProgrammingInterface], 0
109
        je      set_interrupts_for_IDE_controllers.continue
110
 
111
        mov     esi, boot_disabling_ide
112
        call    boot_log
113
;--------------------------------------
114
; Disable IDE interrupts, because the search
115
; for IDE partitions is in the PIO mode.
116
;--------------------------------------
117
.disable_IDE_interrupt:
118
; Disable interrupts in IDE controller for PIO
119
        mov     al, 2
120
        mov     dx, [IDE_BAR1_val] ;0x3F4
121
        add     dx, 2 ;0x3F6
122
        out     dx, al
123
        mov     dx, [IDE_BAR3_val] ;0x374
124
        add     dx, 2 ;0x376
125
        out     dx, al
126
@@:
127
; show base variables of IDE controller
128
;        DEBUGF  1, "K : BAR0 %x \n", [IDE_BAR0_val]:4
129
;        DEBUGF  1, "K : BAR1 %x \n", [IDE_BAR1_val]:4
130
;        DEBUGF  1, "K : BAR2 %x \n", [IDE_BAR2_val]:4
131
;        DEBUGF  1, "K : BAR3 %x \n", [IDE_BAR3_val]:4
132
;        DEBUGF  1, "K : BAR4 %x \n", [IDEContrRegsBaseAddr]:4
133
;        DEBUGF  1, "K : IDEContrProgrammingInterface %x \n", [IDEContrProgrammingInterface]:4
134
;        DEBUGF  1, "K : IDE_Interrupt %x \n", [IDE_Interrupt]:4
135
;-----------------------------------------------------------------------------
136
        mov     esi, boot_detecthdcd
137
        call    boot_log
4625 mario79 138
include 'dev_hdcd.inc'
4624 mario79 139
        mov     esi, boot_getcache
140
        call    boot_log
4625 mario79 141
include 'getcache.inc'
4624 mario79 142
        mov     esi, boot_detectpart
143
        call    boot_log
4625 mario79 144
include 'sear_par.inc'
4624 mario79 145
;-----------------------------------------------------------------------------
146
        mov     dx, [IDEContrRegsBaseAddr]
147
; test whether it is our interrupt?
148
        add     dx, 2
149
        in      al, dx
150
        test    al, 100b
151
        jz      @f
152
; clear Bus Master IDE Status register
153
; clear Interrupt bit
154
        out     dx, al
155
@@:
156
        add     dx, 8
157
; test whether it is our interrupt?
158
        in      al, dx
159
        test    al, 100b
160
        jz      @f
161
; clear Bus Master IDE Status register
162
; clear Interrupt bit
163
        out     dx, al
164
@@:
165
; read status register and remove the interrupt request
166
        mov     dx, [IDE_BAR0_val] ;0x1F0
167
        add     dx, 0x7 ;0x1F7
168
        in      al, dx
169
        mov     dx, [IDE_BAR2_val] ;0x170
170
        add     dx, 0x7 ;0x177
171
        in      al, dx
172
;-----------------------------------------------------------------------------
173
        push    eax edx
174
        mov     dx, [IDEContrRegsBaseAddr]
175
        xor     eax, eax
176
        add     dx, 2
177
        in      al, dx
178
        DEBUGF  1, "K : Primary Bus Master IDE Status Register %x\n", eax
179
 
180
        add     dx, 8
181
        in      al, dx
182
        DEBUGF  1, "K : Secondary Bus Master IDE Status Register %x\n", eax
183
        pop     edx eax
184
 
185
        cmp     [IDEContrRegsBaseAddr], 0
186
        setnz   [dma_hdd]
187
;-----------------------------------------------------------------------------
188
; set interrupts for IDE Controller
189
;-----------------------------------------------------------------------------
190
        mov     esi, boot_set_int_IDE
191
        call    boot_log
192
set_interrupts_for_IDE_controllers:
193
        mov     eax, [IDEContrProgrammingInterface]
194
        cmp     ax, 0x0180
195
        je      .pata_ide
196
 
197
        cmp     ax, 0x018a
198
        jne     .sata_ide
199
;--------------------------------------
200
.pata_ide:
201
        cmp     [IDEContrRegsBaseAddr], 0
202
        je      .end_set_interrupts
203
 
204
        stdcall attach_int_handler, 14, IDE_irq_14_handler, 0
205
        DEBUGF  1, "K : Set IDE IRQ14 return code %x\n", eax
206
        stdcall attach_int_handler, 15, IDE_irq_15_handler, 0
207
        DEBUGF  1, "K : Set IDE IRQ15 return code %x\n", eax
208
        jmp     .enable_IDE_interrupt
209
;--------------------------------------
210
.sata_ide:
211
        cmp     ax, 0x0185
212
        je      .sata_ide_1
213
 
214
        cmp     ax, 0x018f
215
        jne     .end_set_interrupts
216
;--------------------------------------
217
.sata_ide_1:
218
        cmp     [IDEContrRegsBaseAddr], 0
219
        je      .end_set_interrupts
220
 
221
        mov     ax, [IDE_Interrupt]
222
        movzx   eax, al
223
        stdcall attach_int_handler, eax, IDE_common_irq_handler, 0
224
        DEBUGF  1, "K : Set IDE IRQ%d return code %x\n", [IDE_Interrupt]:1, eax
225
;--------------------------------------
226
.enable_IDE_interrupt:
227
        mov     esi, boot_enabling_ide
228
        call    boot_log
229
; Enable interrupts in IDE controller for DMA
230
        mov     al, 0
231
        mov     ah, [DRIVE_DATA+1]
232
        test    ah, 10100000b
233
        jz      @f
234
 
235
        DEBUGF  1, "K : IDE CH1 PIO, because ATAPI drive present\n"
236
        jmp     .ch2_check
237
@@:
238
        mov     dx, [IDE_BAR1_val] ;0x3F4
239
        add     dx, 2 ;0x3F6
240
        out     dx, al
241
        DEBUGF  1, "K : IDE CH1 DMA enabled\n"
242
.ch2_check:
243
        test    ah, 1010b
244
        jz      @f
245
 
246
        DEBUGF  1, "K : IDE CH2 PIO, because ATAPI drive present\n"
247
        jmp     .end_set_interrupts
248
@@:
249
        mov     dx, [IDE_BAR3_val] ;0x374
250
        add     dx, 2 ;0x376
251
        out     dx, al
252
        DEBUGF  1, "K : IDE CH2 DMA enabled\n"
253
;--------------------------------------
254
.end_set_interrupts:
255
;-----------------------------------------------------------------------------
256
        cmp     [dma_hdd], 0
257
        je      .print_pio
258
.print_dma:
259
        DEBUGF  1, "K : IDE DMA mode\n"
260
        jmp     .continue
261
 
262
.print_pio:
263
        DEBUGF  1, "K : IDE PIO mode\n"
264
.continue:
265
;-----------------------------------------------------------------------------
266
; END of initialisation IDE ATA code
267
;-----------------------------------------------------------------------------