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Rev | Author | Line No. | Line |
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1 | ha | 1 | iglobal |
2 | prev_user_of_fpu dd 0x1 ; set to OS |
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3 | endg |
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4 | |||
5 | label fpu_tss at 0xB080 |
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6 | label fpu_stack dword at 0xB060 |
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7 | |||
8 | |||
9 | align 4 |
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10 | fpu_handler: |
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11 | |||
12 | ; clear TS flag in CR0 -> for task switching |
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13 | clts |
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14 | |||
15 | ; save FPU context of the previous task |
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16 | mov eax,[prev_user_of_fpu] |
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17 | shl eax,8 |
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18 | add eax,0x80000+0x10 |
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19 | fsave [eax] |
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20 | |||
21 | ; next task switch save our FPU context |
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22 | ; now restore context of current task (if exists) |
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23 | mov eax,[0x3000] |
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24 | mov [prev_user_of_fpu],eax |
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25 | shl eax,8 |
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26 | add eax,0x80000 |
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27 | cmp [eax+0x7f],byte 0 |
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28 | je bs7_first_fpu |
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29 | frstor [eax+0x10] |
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30 | bs7_first_fpu: |
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31 | mov [eax+0x7f],byte 1 |
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32 | |||
33 | ; prepare structure in stack for proper IRET |
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34 | movzx eax,word [fpu_tss+l.ss-tss_sceleton] ; push ss |
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35 | push eax |
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36 | mov eax,[fpu_tss+l.esp-tss_sceleton] ; push esp |
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37 | push eax |
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38 | mov eax,[fpu_tss+l.eflags-tss_sceleton] ; push eflags |
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39 | push eax |
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40 | |||
41 | movzx eax,word [fpu_tss+l.cs-tss_sceleton] ; push cs |
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42 | push eax |
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43 | mov eax,[fpu_tss+l.eip-tss_sceleton] ; push eip |
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44 | push eax |
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45 | |||
46 | ; save eax |
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47 | push dword [fpu_tss+l.eax-tss_sceleton] |
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48 | |||
49 | ; restore all segment registers |
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50 | mov ax,[fpu_tss+l.es-tss_sceleton] |
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51 | mov es,ax |
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52 | mov ax,[fpu_tss+l.fs-tss_sceleton] |
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53 | mov fs,ax |
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54 | mov ax,[fpu_tss+l.gs-tss_sceleton] |
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55 | mov gs,ax |
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56 | mov ax,[fpu_tss+l.ds-tss_sceleton] |
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57 | mov ds,ax |
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58 | |||
59 | ; restore eax |
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60 | pop eax |
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61 | |||
62 | iret |