Rev 2 | Rev 431 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
425 | victor | 1 | $Revision: 425 $ |
1 | ha | 2 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
3 | ;; ;; |
||
4 | ;; PCI32.INC ;; |
||
5 | ;; ;; |
||
6 | ;; 32 bit PCI driver code ;; |
||
7 | ;; ;; |
||
8 | ;; Version 0.2 December 21st, 2002 ;; |
||
9 | ;; ;; |
||
10 | ;; Author: Victor Prodan, victorprodan@yahoo.com ;; |
||
11 | ;; Credits: ;; |
||
12 | ;; Ralf Brown ;; |
||
13 | ;; Mike Hibbett, mikeh@oceanfree.net ;; |
||
14 | ;; ;; |
||
15 | ;; See file COPYING for details ;; |
||
16 | ;; ;; |
||
17 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
||
18 | |||
19 | |||
20 | ;*************************************************************************** |
||
21 | ; Function |
||
22 | ; pci_api: |
||
23 | ; |
||
24 | ; Description |
||
25 | ; entry point for system PCI calls |
||
26 | ;*************************************************************************** |
||
27 | |||
28 | align 4 |
||
29 | |||
30 | pci_api: |
||
31 | |||
32 | cmp [pci_access_enabled],1 |
||
33 | jne no_pci_access_for_applications |
||
34 | |||
35 | or al,al |
||
36 | jnz pci_fn_1 |
||
37 | ; PCI function 0: get pci version (AH.AL) |
||
38 | movzx eax,word [0x2F0000+0x9022] |
||
39 | ret |
||
40 | |||
41 | pci_fn_1: |
||
42 | cmp al,1 |
||
43 | jnz pci_fn_2 |
||
44 | |||
45 | ; PCI function 1: get last bus in AL |
||
46 | mov al,[0x2F0000+0x9021] |
||
47 | ret |
||
48 | |||
49 | pci_fn_2: |
||
50 | cmp al,2 |
||
51 | jne pci_fn_3 |
||
52 | ; PCI function 2: get pci access mechanism |
||
53 | mov al,[0x2F0000+0x9020] |
||
54 | ret |
||
55 | pci_fn_3: |
||
56 | |||
57 | cmp al,4 |
||
58 | jz pci_read_reg ;byte |
||
59 | cmp al,5 |
||
60 | jz pci_read_reg ;word |
||
61 | cmp al,6 |
||
62 | jz pci_read_reg ;dword |
||
63 | |||
64 | cmp al,8 |
||
65 | jz pci_write_reg ;byte |
||
66 | cmp al,9 |
||
67 | jz pci_write_reg ;word |
||
68 | cmp al,10 |
||
69 | jz pci_write_reg ;dword |
||
70 | |||
71 | no_pci_access_for_applications: |
||
72 | |||
73 | mov eax,-1 |
||
74 | |||
75 | ret |
||
76 | |||
77 | ;*************************************************************************** |
||
78 | ; Function |
||
79 | ; pci_make_config_cmd |
||
80 | ; |
||
81 | ; Description |
||
82 | ; creates a command dword for use with the PCI bus |
||
83 | ; bus # in ah |
||
84 | ; device+func in bh (dddddfff) |
||
85 | ; register in bl |
||
86 | ; |
||
87 | ; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 ) |
||
88 | ;*************************************************************************** |
||
89 | |||
90 | align 4 |
||
91 | |||
92 | pci_make_config_cmd: |
||
93 | shl eax,8 ; move bus to bits 16-23 |
||
94 | mov ax,bx ; combine all |
||
95 | and eax,0xffffff |
||
96 | or eax,0x80000000 |
||
97 | ret |
||
98 | |||
99 | ;*************************************************************************** |
||
100 | ; Function |
||
101 | ; pci_read_reg: |
||
102 | ; |
||
103 | ; Description |
||
104 | ; read a register from the PCI config space into EAX/AX/AL |
||
105 | ; IN: ah=bus,device+func=bh,register address=bl |
||
106 | ; number of bytes to read (1,2,4) coded into AL, bits 0-1 |
||
107 | ;*************************************************************************** |
||
108 | |||
109 | align 4 |
||
110 | |||
111 | pci_read_reg: |
||
112 | cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use? |
||
113 | je pci_read_reg_2 |
||
114 | |||
115 | ; mechanism 1 |
||
116 | push esi ; save register size into ESI |
||
117 | mov esi,eax |
||
118 | and esi,3 |
||
119 | |||
120 | call pci_make_config_cmd |
||
121 | mov ebx,eax |
||
122 | ; get current state |
||
123 | mov dx,0xcf8 |
||
124 | in eax, dx |
||
125 | push eax |
||
126 | ; set up addressing to config data |
||
127 | mov eax,ebx |
||
128 | and al,0xfc ; make address dword-aligned |
||
129 | out dx,eax |
||
130 | ; get requested DWORD of config data |
||
131 | mov dl,0xfc |
||
132 | and bl,3 |
||
133 | or dl,bl ; add to port address first 2 bits of register address |
||
134 | |||
135 | or esi,esi |
||
136 | jz pci_read_byte1 |
||
137 | cmp esi,1 |
||
138 | jz pci_read_word1 |
||
139 | cmp esi,2 |
||
140 | jz pci_read_dword1 |
||
141 | jmp pci_fin_read1 |
||
142 | |||
143 | pci_read_byte1: |
||
144 | in al,dx |
||
145 | jmp pci_fin_read1 |
||
146 | pci_read_word1: |
||
147 | in ax,dx |
||
148 | jmp pci_fin_read1 |
||
149 | pci_read_dword1: |
||
150 | in eax,dx |
||
151 | jmp pci_fin_read1 |
||
152 | pci_fin_read1: |
||
153 | ; restore configuration control |
||
154 | xchg eax,[esp] |
||
155 | mov dx,0xcf8 |
||
156 | out dx,eax |
||
157 | |||
158 | pop eax |
||
159 | pop esi |
||
160 | ret |
||
161 | pci_read_reg_2: |
||
162 | |||
163 | test bh,128 ;mech#2 only supports 16 devices per bus |
||
164 | jnz pci_read_reg_err |
||
165 | |||
166 | push esi ; save register size into ESI |
||
167 | mov esi,eax |
||
168 | and esi,3 |
||
169 | |||
170 | push eax |
||
171 | ;store current state of config space |
||
172 | mov dx,0xcf8 |
||
173 | in al,dx |
||
174 | mov ah,al |
||
175 | mov dl,0xfa |
||
176 | in al,dx |
||
177 | |||
178 | xchg eax,[esp] |
||
179 | ; out 0xcfa,bus |
||
180 | mov al,ah |
||
181 | out dx,al |
||
182 | ; out 0xcf8,0x80 |
||
183 | mov dl,0xf8 |
||
184 | mov al,0x80 |
||
185 | out dx,al |
||
186 | ; compute addr |
||
187 | shr bh,3 ; func is ignored in mechanism 2 |
||
188 | or bh,0xc0 |
||
189 | mov dx,bx |
||
190 | |||
191 | or esi,esi |
||
192 | jz pci_read_byte2 |
||
193 | cmp esi,1 |
||
194 | jz pci_read_word2 |
||
195 | cmp esi,2 |
||
196 | jz pci_read_dword2 |
||
197 | jmp pci_fin_read2 |
||
198 | |||
199 | pci_read_byte2: |
||
200 | in al,dx |
||
201 | jmp pci_fin_read2 |
||
202 | pci_read_word2: |
||
203 | in ax,dx |
||
204 | jmp pci_fin_read2 |
||
205 | pci_read_dword2: |
||
206 | in eax,dx |
||
207 | ; jmp pci_fin_read2 |
||
208 | pci_fin_read2: |
||
209 | |||
210 | ; restore configuration space |
||
211 | xchg eax,[esp] |
||
212 | mov dx,0xcfa |
||
213 | out dx,al |
||
214 | mov dl,0xf8 |
||
215 | mov al,ah |
||
216 | out dx,al |
||
217 | |||
218 | pop eax |
||
219 | pop esi |
||
220 | ret |
||
221 | |||
222 | pci_read_reg_err: |
||
223 | xor eax,eax |
||
224 | dec eax |
||
225 | ret |
||
226 | |||
227 | |||
228 | ;*************************************************************************** |
||
229 | ; Function |
||
230 | ; pci_write_reg: |
||
231 | ; |
||
232 | ; Description |
||
233 | ; write a register from ECX/CX/CL into the PCI config space |
||
234 | ; IN: ah=bus,device+func=bh,register address (dword aligned)=bl, |
||
235 | ; value to write in ecx |
||
236 | ; number of bytes to write (1,2,4) coded into AL, bits 0-1 |
||
237 | ;*************************************************************************** |
||
238 | |||
239 | align 4 |
||
240 | |||
241 | pci_write_reg: |
||
242 | cmp byte [0x2F0000+0x9020],2 ;what mechanism will we use? |
||
243 | je pci_write_reg_2 |
||
244 | |||
245 | ; mechanism 1 |
||
246 | push esi ; save register size into ESI |
||
247 | mov esi,eax |
||
248 | and esi,3 |
||
249 | |||
250 | call pci_make_config_cmd |
||
251 | mov ebx,eax |
||
252 | ; get current state into ecx |
||
253 | mov dx,0xcf8 |
||
254 | in eax, dx |
||
255 | push eax |
||
256 | ; set up addressing to config data |
||
257 | mov eax,ebx |
||
258 | and al,0xfc ; make address dword-aligned |
||
259 | out dx,eax |
||
260 | ; write DWORD of config data |
||
261 | mov dl,0xfc |
||
262 | and bl,3 |
||
263 | or dl,bl |
||
264 | mov eax,ecx |
||
265 | |||
266 | or esi,esi |
||
267 | jz pci_write_byte1 |
||
268 | cmp esi,1 |
||
269 | jz pci_write_word1 |
||
270 | cmp esi,2 |
||
271 | jz pci_write_dword1 |
||
272 | jmp pci_fin_write1 |
||
273 | |||
274 | pci_write_byte1: |
||
275 | out dx,al |
||
276 | jmp pci_fin_write1 |
||
277 | pci_write_word1: |
||
278 | out dx,ax |
||
279 | jmp pci_fin_write1 |
||
280 | pci_write_dword1: |
||
281 | out dx,eax |
||
282 | jmp pci_fin_write1 |
||
283 | pci_fin_write1: |
||
284 | |||
285 | ; restore configuration control |
||
286 | pop eax |
||
287 | mov dl,0xf8 |
||
288 | out dx,eax |
||
289 | |||
290 | xor eax,eax |
||
291 | pop esi |
||
292 | |||
293 | ret |
||
294 | pci_write_reg_2: |
||
295 | |||
296 | test bh,128 ;mech#2 only supports 16 devices per bus |
||
297 | jnz pci_write_reg_err |
||
298 | |||
299 | |||
300 | push esi ; save register size into ESI |
||
301 | mov esi,eax |
||
302 | and esi,3 |
||
303 | |||
304 | push eax |
||
305 | ;store current state of config space |
||
306 | mov dx,0xcf8 |
||
307 | in al,dx |
||
308 | mov ah,al |
||
309 | mov dl,0xfa |
||
310 | in al,dx |
||
311 | xchg eax,[esp] |
||
312 | ; out 0xcfa,bus |
||
313 | mov al,ah |
||
314 | out dx,al |
||
315 | ; out 0xcf8,0x80 |
||
316 | mov dl,0xf8 |
||
317 | mov al,0x80 |
||
318 | out dx,al |
||
319 | ; compute addr |
||
320 | shr bh,3 ; func is ignored in mechanism 2 |
||
321 | or bh,0xc0 |
||
322 | mov dx,bx |
||
323 | ; write register |
||
324 | mov eax,ecx |
||
325 | |||
326 | or esi,esi |
||
327 | jz pci_write_byte2 |
||
328 | cmp esi,1 |
||
329 | jz pci_write_word2 |
||
330 | cmp esi,2 |
||
331 | jz pci_write_dword2 |
||
332 | jmp pci_fin_write2 |
||
333 | |||
334 | pci_write_byte2: |
||
335 | out dx,al |
||
336 | jmp pci_fin_write2 |
||
337 | pci_write_word2: |
||
338 | out dx,ax |
||
339 | jmp pci_fin_write2 |
||
340 | pci_write_dword2: |
||
341 | out dx,eax |
||
342 | jmp pci_fin_write2 |
||
343 | pci_fin_write2: |
||
344 | ; restore configuration space |
||
345 | pop eax |
||
346 | mov dx,0xcfa |
||
347 | out dx,al |
||
348 | mov dl,0xf8 |
||
349 | mov al,ah |
||
350 | out dx,al |
||
351 | |||
352 | xor eax,eax |
||
353 | pop esi |
||
354 | ret |
||
355 | |||
356 | pci_write_reg_err: |
||
357 | xor eax,eax |
||
358 | dec eax |
||
359 | ret |