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2288 | clevermous | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
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4 | ;; Distributed under terms of the GNU General Public License ;; |
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5 | ;; ;; |
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6 | ;; ;; |
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7 | ;; PCI32.INC ;; |
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8 | ;; ;; |
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9 | ;; 32 bit PCI driver code ;; |
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10 | ;; ;; |
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11 | ;; Version 0.3 April 9, 2007 ;; |
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12 | ;; Version 0.2 December 21st, 2002 ;; |
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13 | ;; ;; |
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14 | ;; Author: Victor Prodan, victorprodan@yahoo.com ;; |
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15 | ;; Mihailov Ilia, ghost.nsk@gmail.com ;; |
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16 | ;; Credits: ;; |
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17 | ;; Ralf Brown ;; |
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18 | ;; Mike Hibbett, mikeh@oceanfree.net ;; |
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19 | ;; ;; |
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20 | ;; See file COPYING for details ;; |
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21 | ;; ;; |
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22 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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23 | |||
24 | $Revision: 2288 $ |
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25 | |||
26 | ;*************************************************************************** |
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27 | ; Function |
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28 | ; pci_api: |
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29 | ; |
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30 | ; Description |
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31 | ; entry point for system PCI calls |
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32 | ;*************************************************************************** |
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33 | ;mmio_pci_addr equ 0x400 ; set actual PCI address here to activate user-MMIO |
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34 | |||
35 | iglobal |
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36 | align 4 |
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37 | f62call: |
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38 | dd pci_fn_0 |
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39 | dd pci_fn_1 |
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40 | dd pci_fn_2 |
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41 | dd pci_service_not_supported ;3 |
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42 | dd pci_read_reg ;4 byte |
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43 | dd pci_read_reg ;5 word |
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44 | dd pci_read_reg ;6 dword |
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45 | dd pci_service_not_supported ;7 |
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46 | dd pci_write_reg ;8 byte |
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47 | dd pci_write_reg ;9 word |
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48 | dd pci_write_reg ;10 dword |
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49 | if defined mmio_pci_addr |
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50 | dd pci_mmio_init ;11 |
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51 | dd pci_mmio_map ;12 |
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52 | dd pci_mmio_unmap ;13 |
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53 | end if |
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54 | |||
55 | endg |
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56 | |||
57 | align 4 |
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58 | |||
59 | pci_api: |
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60 | |||
61 | ;cross |
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62 | mov eax, ebx |
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63 | mov ebx, ecx |
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64 | mov ecx, edx |
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65 | |||
66 | cmp [pci_access_enabled], 1 |
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67 | jne pci_service_not_supported |
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68 | |||
69 | movzx edx, al |
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70 | |||
71 | if defined mmio_pci_addr |
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72 | cmp al, 13 |
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73 | ja pci_service_not_supported |
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74 | else |
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75 | cmp al, 10 |
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76 | ja pci_service_not_supported |
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77 | end if |
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78 | |||
79 | call dword [f62call+edx*4] |
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80 | mov dword [esp+32], eax |
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81 | ret |
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82 | |||
83 | |||
84 | align 4 |
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85 | pci_api_drv: |
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86 | |||
87 | cmp [pci_access_enabled], 1 |
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88 | jne .fail |
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89 | |||
90 | cmp eax, 2 |
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91 | ja .fail |
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92 | |||
93 | jmp dword [f62call+eax*4] |
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94 | |||
95 | .fail: |
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96 | or eax, -1 |
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97 | ret |
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98 | |||
99 | |||
100 | ;; ============================================ |
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101 | |||
102 | pci_fn_0: |
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103 | ; PCI function 0: get pci version (AH.AL) |
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104 | movzx eax, word [BOOT_VAR+0x9022] |
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105 | ret |
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106 | |||
107 | pci_fn_1: |
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108 | ; PCI function 1: get last bus in AL |
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109 | mov al, [BOOT_VAR+0x9021] |
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110 | ret |
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111 | |||
112 | pci_fn_2: |
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113 | ; PCI function 2: get pci access mechanism |
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114 | mov al, [BOOT_VAR+0x9020] |
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115 | ret |
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116 | |||
117 | pci_service_not_supported: |
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118 | or eax, -1 |
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119 | mov dword [esp+32], eax |
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120 | ret |
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121 | |||
122 | ;*************************************************************************** |
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123 | ; Function |
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124 | ; pci_make_config_cmd |
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125 | ; |
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126 | ; Description |
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127 | ; creates a command dword for use with the PCI bus |
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128 | ; bus # in ah |
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129 | ; device+func in bh (dddddfff) |
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130 | ; register in bl |
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131 | ; |
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132 | ; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 ) |
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133 | ;*************************************************************************** |
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134 | |||
135 | align 4 |
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136 | |||
137 | pci_make_config_cmd: |
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138 | shl eax, 8 ; move bus to bits 16-23 |
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139 | mov ax, bx ; combine all |
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140 | and eax, 0xffffff |
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141 | or eax, 0x80000000 |
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142 | ret |
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143 | |||
144 | ;*************************************************************************** |
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145 | ; Function |
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146 | ; pci_read_reg: |
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147 | ; |
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148 | ; Description |
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149 | ; read a register from the PCI config space into EAX/AX/AL |
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150 | ; IN: ah=bus,device+func=bh,register address=bl |
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151 | ; number of bytes to read (1,2,4) coded into AL, bits 0-1 |
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152 | ; (0 - byte, 1 - word, 2 - dword) |
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153 | ;*************************************************************************** |
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154 | |||
155 | align 4 |
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156 | |||
157 | pci_read_reg: |
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158 | cmp byte [BOOT_VAR+0x9020], 2;what mechanism will we use? |
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159 | je pci_read_reg_2 |
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160 | |||
161 | ; mechanism 1 |
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162 | push esi ; save register size into ESI |
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163 | mov esi, eax |
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164 | and esi, 3 |
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165 | |||
166 | call pci_make_config_cmd |
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167 | mov ebx, eax |
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168 | ; get current state |
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169 | mov dx, 0xcf8 |
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170 | in eax, dx |
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171 | push eax |
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172 | ; set up addressing to config data |
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173 | mov eax, ebx |
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174 | and al, 0xfc; make address dword-aligned |
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175 | out dx, eax |
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176 | ; get requested DWORD of config data |
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177 | mov dl, 0xfc |
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178 | and bl, 3 |
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179 | or dl, bl ; add to port address first 2 bits of register address |
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180 | |||
181 | or esi, esi |
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182 | jz pci_read_byte1 |
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183 | cmp esi, 1 |
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184 | jz pci_read_word1 |
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185 | cmp esi, 2 |
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186 | jz pci_read_dword1 |
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187 | jmp pci_fin_read1 |
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188 | |||
189 | pci_read_byte1: |
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190 | in al, dx |
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191 | jmp pci_fin_read1 |
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192 | pci_read_word1: |
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193 | in ax, dx |
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194 | jmp pci_fin_read1 |
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195 | pci_read_dword1: |
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196 | in eax, dx |
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197 | jmp pci_fin_read1 |
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198 | pci_fin_read1: |
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199 | ; restore configuration control |
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200 | xchg eax, [esp] |
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201 | mov dx, 0xcf8 |
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202 | out dx, eax |
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203 | |||
204 | pop eax |
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205 | pop esi |
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206 | ret |
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207 | pci_read_reg_2: |
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208 | |||
209 | test bh, 128 ;mech#2 only supports 16 devices per bus |
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210 | jnz pci_read_reg_err |
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211 | |||
212 | push esi; save register size into ESI |
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213 | mov esi, eax |
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214 | and esi, 3 |
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215 | |||
216 | push eax |
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217 | ;store current state of config space |
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218 | mov dx, 0xcf8 |
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219 | in al, dx |
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220 | mov ah, al |
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221 | mov dl, 0xfa |
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222 | in al, dx |
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223 | |||
224 | xchg eax, [esp] |
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225 | ; out 0xcfa,bus |
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226 | mov al, ah |
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227 | out dx, al |
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228 | ; out 0xcf8,0x80 |
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229 | mov dl, 0xf8 |
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230 | mov al, 0x80 |
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231 | out dx, al |
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232 | ; compute addr |
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233 | shr bh, 3; func is ignored in mechanism 2 |
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234 | or bh, 0xc0 |
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235 | mov dx, bx |
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236 | |||
237 | or esi, esi |
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238 | jz pci_read_byte2 |
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239 | cmp esi, 1 |
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240 | jz pci_read_word2 |
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241 | cmp esi, 2 |
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242 | jz pci_read_dword2 |
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243 | jmp pci_fin_read2 |
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244 | |||
245 | pci_read_byte2: |
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246 | in al, dx |
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247 | jmp pci_fin_read2 |
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248 | pci_read_word2: |
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249 | in ax, dx |
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250 | jmp pci_fin_read2 |
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251 | pci_read_dword2: |
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252 | in eax, dx |
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253 | ; jmp pci_fin_read2 |
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254 | pci_fin_read2: |
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255 | |||
256 | ; restore configuration space |
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257 | xchg eax, [esp] |
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258 | mov dx, 0xcfa |
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259 | out dx, al |
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260 | mov dl, 0xf8 |
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261 | mov al, ah |
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262 | out dx, al |
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263 | |||
264 | pop eax |
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265 | pop esi |
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266 | ret |
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267 | |||
268 | pci_read_reg_err: |
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269 | xor eax, eax |
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270 | dec eax |
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271 | ret |
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272 | |||
273 | |||
274 | ;*************************************************************************** |
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275 | ; Function |
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276 | ; pci_write_reg: |
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277 | ; |
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278 | ; Description |
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279 | ; write a register from ECX/CX/CL into the PCI config space |
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280 | ; IN: ah=bus,device+func=bh,register address (dword aligned)=bl, |
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281 | ; value to write in ecx |
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282 | ; number of bytes to write (1,2,4) coded into AL, bits 0-1 |
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283 | ; (0 - byte, 1 - word, 2 - dword) |
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284 | ;*************************************************************************** |
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285 | |||
286 | align 4 |
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287 | |||
288 | pci_write_reg: |
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289 | cmp byte [BOOT_VAR+0x9020], 2;what mechanism will we use? |
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290 | je pci_write_reg_2 |
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291 | |||
292 | ; mechanism 1 |
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293 | push esi ; save register size into ESI |
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294 | mov esi, eax |
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295 | and esi, 3 |
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296 | |||
297 | call pci_make_config_cmd |
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298 | mov ebx, eax |
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299 | ; get current state into ecx |
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300 | mov dx, 0xcf8 |
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301 | in eax, dx |
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302 | push eax |
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303 | ; set up addressing to config data |
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304 | mov eax, ebx |
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305 | and al, 0xfc; make address dword-aligned |
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306 | out dx, eax |
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307 | ; write DWORD of config data |
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308 | mov dl, 0xfc |
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309 | and bl, 3 |
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310 | or dl, bl |
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311 | mov eax, ecx |
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312 | |||
313 | or esi, esi |
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314 | jz pci_write_byte1 |
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315 | cmp esi, 1 |
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316 | jz pci_write_word1 |
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317 | cmp esi, 2 |
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318 | jz pci_write_dword1 |
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319 | jmp pci_fin_write1 |
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320 | |||
321 | pci_write_byte1: |
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322 | out dx, al |
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323 | jmp pci_fin_write1 |
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324 | pci_write_word1: |
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325 | out dx, ax |
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326 | jmp pci_fin_write1 |
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327 | pci_write_dword1: |
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328 | out dx, eax |
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329 | jmp pci_fin_write1 |
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330 | pci_fin_write1: |
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331 | |||
332 | ; restore configuration control |
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333 | pop eax |
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334 | mov dl, 0xf8 |
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335 | out dx, eax |
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336 | |||
337 | xor eax, eax |
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338 | pop esi |
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339 | |||
340 | ret |
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341 | pci_write_reg_2: |
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342 | |||
343 | test bh, 128 ;mech#2 only supports 16 devices per bus |
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344 | jnz pci_write_reg_err |
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345 | |||
346 | |||
347 | push esi; save register size into ESI |
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348 | mov esi, eax |
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349 | and esi, 3 |
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350 | |||
351 | push eax |
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352 | ;store current state of config space |
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353 | mov dx, 0xcf8 |
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354 | in al, dx |
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355 | mov ah, al |
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356 | mov dl, 0xfa |
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357 | in al, dx |
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358 | xchg eax, [esp] |
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359 | ; out 0xcfa,bus |
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360 | mov al, ah |
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361 | out dx, al |
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362 | ; out 0xcf8,0x80 |
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363 | mov dl, 0xf8 |
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364 | mov al, 0x80 |
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365 | out dx, al |
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366 | ; compute addr |
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367 | shr bh, 3; func is ignored in mechanism 2 |
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368 | or bh, 0xc0 |
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369 | mov dx, bx |
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370 | ; write register |
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371 | mov eax, ecx |
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372 | |||
373 | or esi, esi |
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374 | jz pci_write_byte2 |
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375 | cmp esi, 1 |
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376 | jz pci_write_word2 |
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377 | cmp esi, 2 |
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378 | jz pci_write_dword2 |
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379 | jmp pci_fin_write2 |
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380 | |||
381 | pci_write_byte2: |
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382 | out dx, al |
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383 | jmp pci_fin_write2 |
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384 | pci_write_word2: |
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385 | out dx, ax |
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386 | jmp pci_fin_write2 |
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387 | pci_write_dword2: |
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388 | out dx, eax |
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389 | jmp pci_fin_write2 |
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390 | pci_fin_write2: |
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391 | ; restore configuration space |
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392 | pop eax |
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393 | mov dx, 0xcfa |
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394 | out dx, al |
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395 | mov dl, 0xf8 |
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396 | mov al, ah |
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397 | out dx, al |
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398 | |||
399 | xor eax, eax |
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400 | pop esi |
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401 | ret |
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402 | |||
403 | pci_write_reg_err: |
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404 | xor eax, eax |
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405 | dec eax |
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406 | ret |
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407 | |||
408 | if defined mmio_pci_addr ; must be set above |
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409 | ;*************************************************************************** |
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410 | ; Function |
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411 | ; pci_mmio_init |
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412 | ; |
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413 | ; Description |
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414 | ; IN: bx = device's PCI bus address (bbbbbbbbdddddfff) |
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415 | ; Returns eax = user heap space available (bytes) |
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416 | ; Error codes |
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417 | ; eax = -1 : PCI user access blocked, |
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418 | ; eax = -2 : device not registered for uMMIO service |
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419 | ; eax = -3 : user heap initialization failure |
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420 | ;*************************************************************************** |
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421 | pci_mmio_init: |
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422 | cmp bx, mmio_pci_addr |
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423 | jz @f |
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424 | mov eax, -2 |
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425 | ret |
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426 | @@: |
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427 | call init_heap ; (if not initialized yet) |
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428 | or eax, eax |
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429 | jz @f |
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430 | ret |
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431 | @@: |
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432 | mov eax, -3 |
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433 | ret |
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434 | |||
435 | |||
436 | ;*************************************************************************** |
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437 | ; Function |
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438 | ; pci_mmio_map |
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439 | ; |
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440 | ; Description |
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441 | ; maps a block of PCI memory to user-accessible linear address |
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442 | ; |
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443 | ; WARNING! This VERY EXPERIMENTAL service is for one chosen PCI device only! |
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444 | ; The target device address should be set in kernel var mmio_pci_addr |
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445 | ; |
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446 | ; IN: ah = BAR#; |
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447 | ; IN: ebx = block size (bytes); |
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448 | ; IN: ecx = offset in MMIO block (in 4K-pages, to avoid misaligned pages); |
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449 | ; |
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450 | ; Returns eax = MMIO block's linear address in the userspace (if no error) |
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451 | ; |
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452 | ; |
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453 | ; Error codes |
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454 | ; eax = -1 : user access to PCI blocked, |
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455 | ; eax = -2 : an invalid BAR register referred |
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456 | ; eax = -3 : no i/o space on that BAR |
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457 | ; eax = -4 : a port i/o BAR register referred |
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458 | ; eax = -5 : dynamic userspace allocation problem |
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459 | ;*************************************************************************** |
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460 | |||
461 | pci_mmio_map: |
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462 | and edx, 0x0ffff |
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463 | cmp ah, 6 |
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464 | jc .bar_0_5 |
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465 | jz .bar_rom |
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466 | mov eax, -2 |
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467 | ret |
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468 | .bar_rom: |
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469 | mov ah, 8 ; bar6 = Expansion ROM base address |
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470 | .bar_0_5: |
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471 | push ecx |
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472 | add ebx, 4095 |
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473 | and ebx, -4096 |
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474 | push ebx |
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475 | mov bl, ah ; bl = BAR# (0..5), however bl=8 for BAR6 |
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476 | shl bl, 1 |
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477 | shl bl, 1 |
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478 | add bl, 0x10; now bl = BAR offset in PCI config. space |
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479 | mov ax, mmio_pci_addr |
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480 | mov bh, al ; bh = dddddfff |
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481 | mov al, 2 ; al : DW to read |
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482 | call pci_read_reg |
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483 | or eax, eax |
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484 | jnz @f |
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485 | mov eax, -3 ; empty I/O space |
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486 | jmp mmio_ret_fail |
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487 | @@: |
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488 | test eax, 1 |
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489 | jz @f |
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490 | mov eax, -4 ; damned ports (not MMIO space) |
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491 | jmp mmio_ret_fail |
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492 | @@: |
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493 | pop ecx ; ecx = block size, bytes (expanded to whole page) |
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494 | mov ebx, ecx; user_alloc destroys eax, ecx, edx, but saves ebx |
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495 | and eax, 0xFFFFFFF0 |
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496 | push eax ; store MMIO physical address + keep 2DWords in the stack |
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497 | stdcall user_alloc, ecx |
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498 | or eax, eax |
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499 | jnz mmio_map_over |
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500 | mov eax, -5 ; problem with page allocation |
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501 | |||
502 | mmio_ret_fail: |
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503 | pop ecx |
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504 | pop edx |
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505 | ret |
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506 | |||
507 | mmio_map_over: |
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508 | mov ecx, ebx; ecx = size (bytes, expanded to whole page) |
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509 | shr ecx, 12 ; ecx = number of pages |
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510 | mov ebx, eax; ebx = linear address |
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511 | pop eax ; eax = MMIO start |
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512 | pop edx ; edx = MMIO shift (pages) |
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513 | shl edx, 12 ; edx = MMIO shift (bytes) |
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514 | add eax, edx; eax = uMMIO physical address |
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515 | or eax, PG_SHARED |
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516 | or eax, PG_UW |
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517 | or eax, PG_NOCACHE |
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518 | mov edi, ebx |
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519 | call commit_pages |
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520 | mov eax, edi |
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521 | ret |
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522 | |||
523 | ;*************************************************************************** |
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524 | ; Function |
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525 | ; pci_mmio_unmap_page |
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526 | ; |
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527 | ; Description |
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528 | ; unmaps the linear space previously tied to a PCI memory block |
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529 | ; |
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530 | ; IN: ebx = linear address of space previously allocated by pci_mmio_map |
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531 | ; returns eax = 1 if successfully unmapped |
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532 | ; |
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533 | ; Error codes |
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534 | ; eax = -1 if no user PCI access allowed, |
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535 | ; eax = 0 if unmapping failed |
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536 | ;*************************************************************************** |
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537 | |||
538 | pci_mmio_unmap: |
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539 | stdcall user_free, ebx |
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540 | ret |
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541 | |||
542 | end if |
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543 | |||
544 | ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= |
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545 | uglobal |
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546 | align 4 |
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547 | ; VendID (2), DevID (2), Revision = 0 (1), Class Code (3), FNum (1), Bus (1) |
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548 | pci_emu_dat: |
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549 | times 30*10 db 0 |
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550 | endg |
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551 | ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= |
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552 | align 4 |
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553 | sys_pcibios: |
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554 | cmp [pci_access_enabled], 1 |
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555 | jne .unsupported_func |
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556 | cmp [pci_bios_entry], 0 |
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557 | jz .emulate_bios |
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558 | |||
559 | push ds |
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560 | mov ax, pci_data_sel |
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561 | mov ds, ax |
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562 | mov eax, ebp |
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563 | mov ah, 0B1h |
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564 | call pword [cs:pci_bios_entry] |
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565 | pop ds |
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566 | |||
567 | jmp .return |
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568 | ;-=-=-=-=-=-=-=-= |
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569 | .emulate_bios: |
||
570 | cmp ebp, 1 ; PCI_FUNCTION_ID |
||
571 | jnz .not_PCI_BIOS_PRESENT |
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572 | mov edx, 'PCI ' |
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573 | mov al, [BOOT_VAR + 0x9020] |
||
574 | mov bx, [BOOT_VAR + 0x9022] |
||
575 | mov cl, [BOOT_VAR + 0x9021] |
||
576 | xor ah, ah |
||
577 | jmp .return_abcd |
||
578 | |||
579 | .not_PCI_BIOS_PRESENT: |
||
580 | cmp ebp, 2 ; FIND_PCI_DEVICE |
||
581 | jne .not_FIND_PCI_DEVICE |
||
582 | mov ebx, pci_emu_dat |
||
583 | ..nxt: |
||
584 | cmp [ebx], dx |
||
585 | jne ..no |
||
586 | cmp [ebx + 2], cx |
||
587 | jne ..no |
||
588 | dec si |
||
589 | jns ..no |
||
590 | mov bx, [ebx + 4] |
||
591 | xor ah, ah |
||
592 | jmp .return_ab |
||
593 | ..no: |
||
594 | cmp word[ebx], 0 |
||
595 | je ..dev_not_found |
||
596 | add ebx, 10 |
||
597 | jmp ..nxt |
||
598 | ..dev_not_found: |
||
599 | mov ah, 0x86 ; DEVICE_NOT_FOUND |
||
600 | jmp .return_a |
||
601 | |||
602 | .not_FIND_PCI_DEVICE: |
||
603 | cmp ebp, 3 ; FIND_PCI_CLASS_CODE |
||
604 | jne .not_FIND_PCI_CLASS_CODE |
||
605 | mov esi, pci_emu_dat |
||
606 | shl ecx, 8 |
||
607 | ..nxt2: |
||
608 | cmp [esi], ecx |
||
609 | jne ..no2 |
||
610 | mov bx, [esi] |
||
611 | xor ah, ah |
||
612 | jmp .return_ab |
||
613 | ..no2: |
||
614 | cmp dword[esi], 0 |
||
615 | je ..dev_not_found |
||
616 | add esi, 10 |
||
617 | jmp ..nxt2 |
||
618 | |||
619 | .not_FIND_PCI_CLASS_CODE: |
||
620 | cmp ebp, 8 ; READ_CONFIG_* |
||
621 | jb .not_READ_CONFIG |
||
622 | cmp ebp, 0x0A |
||
623 | ja .not_READ_CONFIG |
||
624 | mov eax, ebp |
||
625 | mov ah, bh |
||
626 | mov edx, edi |
||
627 | mov bh, bl |
||
628 | mov bl, dl |
||
629 | call pci_read_reg |
||
630 | mov ecx, eax |
||
631 | xor ah, ah ; SUCCESSFUL |
||
632 | jmp .return_abc |
||
633 | .not_READ_CONFIG: |
||
634 | cmp ebp, 0x0B ; WRITE_CONFIG_* |
||
635 | jb .not_WRITE_CONFIG |
||
636 | cmp ebp, 0x0D |
||
637 | ja .not_WRITE_CONFIG |
||
638 | lea eax, [ebp+1] |
||
639 | mov ah, bh |
||
640 | mov edx, edi |
||
641 | mov bh, bl |
||
642 | mov bl, dl |
||
643 | call pci_write_reg |
||
644 | xor ah, ah ; SUCCESSFUL |
||
645 | jmp .return_abc |
||
646 | .not_WRITE_CONFIG: |
||
647 | .unsupported_func: |
||
648 | mov ah, 0x81 ; FUNC_NOT_SUPPORTED |
||
649 | .return: |
||
650 | mov dword[esp + 4 ], edi |
||
651 | mov dword[esp + 8], esi |
||
652 | .return_abcd: |
||
653 | mov dword[esp + 24], edx |
||
654 | .return_abc: |
||
655 | mov dword[esp + 28], ecx |
||
656 | .return_ab: |
||
657 | mov dword[esp + 20], ebx |
||
658 | .return_a: |
||
659 | mov dword[esp + 32], eax |
||
660 | ret |