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Rev | Author | Line No. | Line |
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431 | serge | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
586 | serge | 2 | ;; ;; |
431 | serge | 3 | ;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;; |
4 | ;; Distributed under terms of the GNU General Public License ;; |
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5 | ;; ;; |
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6 | ;; ;; |
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586 | serge | 7 | ;; PCI32.INC ;; |
8 | ;; ;; |
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9 | ;; 32 bit PCI driver code ;; |
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10 | ;; ;; |
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11 | ;; Version 0.3 April 9, 2007 ;; |
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12 | ;; Version 0.2 December 21st, 2002 ;; |
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13 | ;; ;; |
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14 | ;; Author: Victor Prodan, victorprodan@yahoo.com ;; |
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15 | ;; Mihailov Ilia, ghost.nsk@gmail.com ;; |
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16 | ;; Credits: ;; |
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17 | ;; Ralf Brown ;; |
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18 | ;; Mike Hibbett, mikeh@oceanfree.net ;; |
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19 | ;; ;; |
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20 | ;; See file COPYING for details ;; |
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21 | ;; ;; |
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431 | serge | 22 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
1 | ha | 23 | |
750 | victor | 24 | $Revision: 1353 $ |
1 | ha | 25 | |
26 | ;*************************************************************************** |
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27 | ; Function |
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28 | ; pci_api: |
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29 | ; |
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30 | ; Description |
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31 | ; entry point for system PCI calls |
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32 | ;*************************************************************************** |
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33 | |||
34 | align 4 |
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35 | |||
36 | pci_api: |
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37 | |||
1348 | art_zh | 38 | cmp [pci_access_enabled],1 |
39 | jne no_pci_access_for_applications |
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1 | ha | 40 | |
1348 | art_zh | 41 | or al,al |
42 | jnz pci_fn_1 |
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43 | ; PCI function 0: get pci version (AH.AL) |
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44 | movzx eax,word [BOOT_VAR+0x9022] |
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45 | ret |
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1 | ha | 46 | |
47 | pci_fn_1: |
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1348 | art_zh | 48 | cmp al,1 |
49 | jnz pci_fn_2 |
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1 | ha | 50 | |
1348 | art_zh | 51 | ; PCI function 1: get last bus in AL |
52 | mov al,[BOOT_VAR+0x9021] |
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53 | ret |
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1 | ha | 54 | |
55 | pci_fn_2: |
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1348 | art_zh | 56 | cmp al,2 |
57 | jne pci_fn_3 |
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58 | ; PCI function 2: get pci access mechanism |
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59 | mov al,[BOOT_VAR+0x9020] |
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60 | ret |
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1 | ha | 61 | pci_fn_3: |
62 | |||
1348 | art_zh | 63 | cmp al,4 |
64 | jz pci_read_reg ;byte |
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65 | cmp al,5 |
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66 | jz pci_read_reg ;word |
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67 | cmp al,6 |
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68 | jz pci_read_reg ;dword |
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1 | ha | 69 | |
1348 | art_zh | 70 | cmp al,8 |
71 | jz pci_write_reg ;byte |
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72 | cmp al,9 |
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73 | jz pci_write_reg ;word |
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74 | cmp al,10 |
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75 | jz pci_write_reg ;dword |
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1 | ha | 76 | |
1348 | art_zh | 77 | cmp al,11 ; <<< user-level MMIO functions <<< NEW! |
78 | jz pci_mmio_init |
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79 | cmp al,12 |
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80 | jz pci_mmio_map |
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81 | cmp al,13 |
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82 | jz pci_mmio_unmap |
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83 | |||
84 | |||
1 | ha | 85 | no_pci_access_for_applications: |
86 | |||
1348 | art_zh | 87 | mov eax,-1 |
1 | ha | 88 | |
1348 | art_zh | 89 | ret |
1 | ha | 90 | |
91 | ;*************************************************************************** |
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92 | ; Function |
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93 | ; pci_make_config_cmd |
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94 | ; |
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95 | ; Description |
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96 | ; creates a command dword for use with the PCI bus |
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97 | ; bus # in ah |
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98 | ; device+func in bh (dddddfff) |
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99 | ; register in bl |
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100 | ; |
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101 | ; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 ) |
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102 | ;*************************************************************************** |
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103 | |||
104 | align 4 |
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105 | |||
106 | pci_make_config_cmd: |
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1348 | art_zh | 107 | shl eax,8 ; move bus to bits 16-23 |
108 | mov ax,bx ; combine all |
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1 | ha | 109 | and eax,0xffffff |
1348 | art_zh | 110 | or eax,0x80000000 |
1 | ha | 111 | ret |
112 | |||
113 | ;*************************************************************************** |
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114 | ; Function |
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115 | ; pci_read_reg: |
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116 | ; |
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117 | ; Description |
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118 | ; read a register from the PCI config space into EAX/AX/AL |
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119 | ; IN: ah=bus,device+func=bh,register address=bl |
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120 | ; number of bytes to read (1,2,4) coded into AL, bits 0-1 |
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586 | serge | 121 | ; (0 - byte, 1 - word, 2 - dword) |
1 | ha | 122 | ;*************************************************************************** |
123 | |||
124 | align 4 |
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125 | |||
126 | pci_read_reg: |
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1348 | art_zh | 127 | cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use? |
128 | je pci_read_reg_2 |
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1 | ha | 129 | |
1348 | art_zh | 130 | ; mechanism 1 |
131 | push esi ; save register size into ESI |
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132 | mov esi,eax |
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133 | and esi,3 |
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1 | ha | 134 | |
1348 | art_zh | 135 | call pci_make_config_cmd |
136 | mov ebx,eax |
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137 | ; get current state |
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138 | mov dx,0xcf8 |
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139 | in eax, dx |
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140 | push eax |
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141 | ; set up addressing to config data |
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142 | mov eax,ebx |
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143 | and al,0xfc ; make address dword-aligned |
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144 | out dx,eax |
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145 | ; get requested DWORD of config data |
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146 | mov dl,0xfc |
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147 | and bl,3 |
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148 | or dl,bl ; add to port address first 2 bits of register address |
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1 | ha | 149 | |
1348 | art_zh | 150 | or esi,esi |
151 | jz pci_read_byte1 |
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152 | cmp esi,1 |
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153 | jz pci_read_word1 |
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154 | cmp esi,2 |
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155 | jz pci_read_dword1 |
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156 | jmp pci_fin_read1 |
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1 | ha | 157 | |
158 | pci_read_byte1: |
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1348 | art_zh | 159 | in al,dx |
160 | jmp pci_fin_read1 |
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1 | ha | 161 | pci_read_word1: |
1348 | art_zh | 162 | in ax,dx |
163 | jmp pci_fin_read1 |
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1 | ha | 164 | pci_read_dword1: |
1348 | art_zh | 165 | in eax,dx |
166 | jmp pci_fin_read1 |
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1 | ha | 167 | pci_fin_read1: |
1348 | art_zh | 168 | ; restore configuration control |
169 | xchg eax,[esp] |
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170 | mov dx,0xcf8 |
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171 | out dx,eax |
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1 | ha | 172 | |
1348 | art_zh | 173 | pop eax |
174 | pop esi |
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175 | ret |
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1 | ha | 176 | pci_read_reg_2: |
177 | |||
1348 | art_zh | 178 | test bh,128 ;mech#2 only supports 16 devices per bus |
179 | jnz pci_read_reg_err |
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1 | ha | 180 | |
1348 | art_zh | 181 | push esi ; save register size into ESI |
182 | mov esi,eax |
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183 | and esi,3 |
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1 | ha | 184 | |
1348 | art_zh | 185 | push eax |
186 | ;store current state of config space |
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187 | mov dx,0xcf8 |
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188 | in al,dx |
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189 | mov ah,al |
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190 | mov dl,0xfa |
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191 | in al,dx |
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1 | ha | 192 | |
1348 | art_zh | 193 | xchg eax,[esp] |
194 | ; out 0xcfa,bus |
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195 | mov al,ah |
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196 | out dx,al |
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197 | ; out 0xcf8,0x80 |
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198 | mov dl,0xf8 |
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199 | mov al,0x80 |
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200 | out dx,al |
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201 | ; compute addr |
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202 | shr bh,3 ; func is ignored in mechanism 2 |
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203 | or bh,0xc0 |
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204 | mov dx,bx |
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1 | ha | 205 | |
1348 | art_zh | 206 | or esi,esi |
207 | jz pci_read_byte2 |
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208 | cmp esi,1 |
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209 | jz pci_read_word2 |
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210 | cmp esi,2 |
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211 | jz pci_read_dword2 |
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212 | jmp pci_fin_read2 |
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1 | ha | 213 | |
214 | pci_read_byte2: |
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1348 | art_zh | 215 | in al,dx |
216 | jmp pci_fin_read2 |
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1 | ha | 217 | pci_read_word2: |
1348 | art_zh | 218 | in ax,dx |
219 | jmp pci_fin_read2 |
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1 | ha | 220 | pci_read_dword2: |
1348 | art_zh | 221 | in eax,dx |
1 | ha | 222 | ; jmp pci_fin_read2 |
223 | pci_fin_read2: |
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224 | |||
1348 | art_zh | 225 | ; restore configuration space |
226 | xchg eax,[esp] |
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227 | mov dx,0xcfa |
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228 | out dx,al |
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229 | mov dl,0xf8 |
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230 | mov al,ah |
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231 | out dx,al |
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1 | ha | 232 | |
1348 | art_zh | 233 | pop eax |
234 | pop esi |
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235 | ret |
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1 | ha | 236 | |
237 | pci_read_reg_err: |
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1348 | art_zh | 238 | xor eax,eax |
239 | dec eax |
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240 | ret |
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1 | ha | 241 | |
242 | |||
243 | ;*************************************************************************** |
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244 | ; Function |
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245 | ; pci_write_reg: |
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246 | ; |
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247 | ; Description |
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248 | ; write a register from ECX/CX/CL into the PCI config space |
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249 | ; IN: ah=bus,device+func=bh,register address (dword aligned)=bl, |
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250 | ; value to write in ecx |
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251 | ; number of bytes to write (1,2,4) coded into AL, bits 0-1 |
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586 | serge | 252 | ; (0 - byte, 1 - word, 2 - dword) |
1 | ha | 253 | ;*************************************************************************** |
254 | |||
255 | align 4 |
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256 | |||
257 | pci_write_reg: |
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1348 | art_zh | 258 | cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use? |
259 | je pci_write_reg_2 |
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1 | ha | 260 | |
1348 | art_zh | 261 | ; mechanism 1 |
262 | push esi ; save register size into ESI |
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263 | mov esi,eax |
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264 | and esi,3 |
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1 | ha | 265 | |
1348 | art_zh | 266 | call pci_make_config_cmd |
267 | mov ebx,eax |
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268 | ; get current state into ecx |
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269 | mov dx,0xcf8 |
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270 | in eax, dx |
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271 | push eax |
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272 | ; set up addressing to config data |
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273 | mov eax,ebx |
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274 | and al,0xfc ; make address dword-aligned |
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275 | out dx,eax |
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276 | ; write DWORD of config data |
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277 | mov dl,0xfc |
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278 | and bl,3 |
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279 | or dl,bl |
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280 | mov eax,ecx |
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1 | ha | 281 | |
1348 | art_zh | 282 | or esi,esi |
283 | jz pci_write_byte1 |
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284 | cmp esi,1 |
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285 | jz pci_write_word1 |
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286 | cmp esi,2 |
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287 | jz pci_write_dword1 |
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288 | jmp pci_fin_write1 |
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1 | ha | 289 | |
290 | pci_write_byte1: |
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1348 | art_zh | 291 | out dx,al |
292 | jmp pci_fin_write1 |
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1 | ha | 293 | pci_write_word1: |
1348 | art_zh | 294 | out dx,ax |
295 | jmp pci_fin_write1 |
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1 | ha | 296 | pci_write_dword1: |
1348 | art_zh | 297 | out dx,eax |
298 | jmp pci_fin_write1 |
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1 | ha | 299 | pci_fin_write1: |
300 | |||
1348 | art_zh | 301 | ; restore configuration control |
302 | pop eax |
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303 | mov dl,0xf8 |
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304 | out dx,eax |
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1 | ha | 305 | |
1348 | art_zh | 306 | xor eax,eax |
307 | pop esi |
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1 | ha | 308 | |
1348 | art_zh | 309 | ret |
1 | ha | 310 | pci_write_reg_2: |
311 | |||
1348 | art_zh | 312 | test bh,128 ;mech#2 only supports 16 devices per bus |
313 | jnz pci_write_reg_err |
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1 | ha | 314 | |
315 | |||
1348 | art_zh | 316 | push esi ; save register size into ESI |
317 | mov esi,eax |
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318 | and esi,3 |
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1 | ha | 319 | |
1348 | art_zh | 320 | push eax |
321 | ;store current state of config space |
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322 | mov dx,0xcf8 |
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323 | in al,dx |
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324 | mov ah,al |
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325 | mov dl,0xfa |
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326 | in al,dx |
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327 | xchg eax,[esp] |
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328 | ; out 0xcfa,bus |
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329 | mov al,ah |
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330 | out dx,al |
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331 | ; out 0xcf8,0x80 |
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332 | mov dl,0xf8 |
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333 | mov al,0x80 |
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334 | out dx,al |
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335 | ; compute addr |
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336 | shr bh,3 ; func is ignored in mechanism 2 |
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337 | or bh,0xc0 |
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338 | mov dx,bx |
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339 | ; write register |
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340 | mov eax,ecx |
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1 | ha | 341 | |
1348 | art_zh | 342 | or esi,esi |
343 | jz pci_write_byte2 |
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344 | cmp esi,1 |
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345 | jz pci_write_word2 |
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346 | cmp esi,2 |
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347 | jz pci_write_dword2 |
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348 | jmp pci_fin_write2 |
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1 | ha | 349 | |
350 | pci_write_byte2: |
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1348 | art_zh | 351 | out dx,al |
352 | jmp pci_fin_write2 |
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1 | ha | 353 | pci_write_word2: |
1348 | art_zh | 354 | out dx,ax |
355 | jmp pci_fin_write2 |
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1 | ha | 356 | pci_write_dword2: |
1348 | art_zh | 357 | out dx,eax |
358 | jmp pci_fin_write2 |
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1 | ha | 359 | pci_fin_write2: |
1348 | art_zh | 360 | ; restore configuration space |
361 | pop eax |
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362 | mov dx,0xcfa |
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363 | out dx,al |
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364 | mov dl,0xf8 |
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365 | mov al,ah |
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366 | out dx,al |
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1 | ha | 367 | |
1348 | art_zh | 368 | xor eax,eax |
369 | pop esi |
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370 | ret |
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1 | ha | 371 | |
372 | pci_write_reg_err: |
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1348 | art_zh | 373 | xor eax,eax |
374 | dec eax |
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375 | ret |
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586 | serge | 376 | |
1348 | art_zh | 377 | ;*************************************************************************** |
378 | ; Function |
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379 | ; pci_mmio_init ; NEW! |
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380 | ; |
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381 | ; Description |
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382 | ; IN: bx = device's PCI bus address (bbbbbbbbdddddfff) |
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383 | ; returns ax = user heap space available (bytes) |
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384 | ; Error codes |
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385 | ; eax = -1 : PCI user access blocked, |
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386 | ; eax = -2 : device not registered for uMMIO service |
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387 | ; eax = -3 : user heap initialization failure |
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388 | ;*************************************************************************** |
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389 | align 4 |
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390 | pci_mmio_init: |
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391 | cmp bx, word [mmio_pci_addr] ; must be set in kernel/data32.inc |
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392 | jz @f |
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393 | mov eax,-2 |
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394 | ret |
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395 | @@: |
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396 | call init_heap ; (if not initialized yet) |
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397 | or eax,eax |
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398 | jz @f |
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399 | ret |
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400 | @@: |
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401 | mov eax,-3 |
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402 | ret |
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403 | |||
404 | |||
405 | ;*************************************************************************** |
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406 | ; Function |
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407 | ; pci_mmio_map ; NEW! |
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408 | ; |
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409 | ; Description |
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410 | ; maps a block of PCI memory to user-accessible linear address |
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411 | ; |
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412 | ; WARNING! This VERY EXPERIMENTAL service is for one chosen PCI device only! |
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413 | ; The target device address should be set in kernel var mmio_pci_addr |
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414 | ; |
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415 | ; IN: ah = BAR#; |
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416 | ; IN: ebx = block size (bytes); |
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417 | ; IN: ecx = offset in MMIO block (in 4K-pages, to avoid misaligned pages); |
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418 | ; |
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419 | ; Returns eax = MMIO block's linear address in the userspace (if no error) |
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420 | ; |
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421 | ; |
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422 | ; Error codes |
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423 | ; eax = -1 : user access to PCI blocked, |
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424 | ; eax = -2 : an invalid BAR register referred |
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425 | ; eax = -3 : no i/o space on that BAR |
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426 | ; eax = -4 : a port i/o BAR register referred |
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427 | ; eax = -5 : dynamic userspace allocation problem |
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428 | ;*************************************************************************** |
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429 | |||
430 | align 4 |
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431 | pci_mmio_map: |
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432 | and edx,0x0ffff |
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433 | cmp ah,6 |
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1353 | art_zh | 434 | jc .bar_0_5 |
435 | jz .bar_rom |
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1348 | art_zh | 436 | mov eax,-2 |
437 | ret |
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1353 | art_zh | 438 | .bar_rom: |
439 | mov ah, 8 ; bar6 = Expansion ROM base address |
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440 | .bar_0_5: |
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1348 | art_zh | 441 | push ecx |
442 | add ebx, 4095 |
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443 | and ebx,-4096 |
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444 | push ebx |
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1353 | art_zh | 445 | mov bl, ah ; bl = BAR# (0..5), however bl=8 for BAR6 |
1348 | art_zh | 446 | shl bl, 1 |
447 | shl bl, 1 |
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1353 | art_zh | 448 | add bl, 0x10 ; now bl = BAR offset in PCI config. space |
1348 | art_zh | 449 | mov ax,word [mmio_pci_addr] |
450 | mov bh, al ; bh = dddddfff |
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451 | mov al, 2 ; al : DW to read |
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452 | call pci_read_reg |
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453 | or eax, eax |
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454 | jnz @f |
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455 | mov eax,-3 ; empty I/O space |
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456 | jmp mmio_ret_fail |
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457 | @@: |
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458 | test eax, 1 |
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459 | jz @f |
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460 | mov eax,-4 ; damned ports (not MMIO space) |
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461 | jmp mmio_ret_fail |
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462 | @@: |
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463 | pop ecx ; ecx = block size, bytes (expanded to whole page) |
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464 | mov ebx, ecx ; user_alloc destroys eax, ecx, edx, but saves ebx |
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465 | push eax ; store MMIO physical address + keep 2DWords in the stack |
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466 | stdcall user_alloc, ecx |
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467 | or eax, eax |
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468 | jnz mmio_map_over |
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469 | mov eax,-5 ; problem with page allocation |
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470 | |||
471 | mmio_ret_fail: |
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472 | pop ecx |
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473 | pop edx |
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474 | ret |
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475 | |||
476 | mmio_map_over: |
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477 | mov ecx, ebx ; ecx = size (bytes, expanded to whole page) |
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478 | shr ecx, 12 ; ecx = number of pages |
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479 | mov ebx, eax ; ebx = linear address |
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480 | pop eax ; eax = MMIO start |
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481 | pop edx ; edx = MMIO shift (pages) |
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482 | shl edx, 12 ; edx = MMIO shift (bytes) |
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483 | add eax, edx ; eax = uMMIO physical address |
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484 | or eax, PG_SHARED |
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485 | or eax, PG_UW |
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486 | or eax, PG_NOCACHE |
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487 | mov edi, ebx |
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488 | call commit_pages |
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489 | mov eax, edi |
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490 | ret |
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491 | |||
492 | ;*************************************************************************** |
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493 | ; Function |
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494 | ; pci_mmio_unmap_page ; NEW! |
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495 | ; |
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496 | ; Description |
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497 | ; unmaps the linear space previously tied to a PCI memory block |
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498 | ; |
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499 | ; IN: ebx = linear address of space previously allocated by pci_mmio_map |
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500 | ; returns eax = 1 if successfully unmapped |
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501 | ; |
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502 | ; Error codes |
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503 | ; eax = -1 if no user PCI access allowed, |
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504 | ; eax = 0 if unmapping failed |
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505 | ;*************************************************************************** |
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506 | |||
507 | align 4 |
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508 | pci_mmio_unmap: |
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509 | stdcall user_free, ebx |
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510 | ret |
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511 | |||
512 | |||
586 | serge | 513 | ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= |
514 | |||
515 | ; VendID (2), DevID (2), Revision = 0 (1), Class Code (3), FNum (1), Bus (1) |
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516 | pci_emu_dat: times 30*10 db 0 |
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517 | |||
518 | ;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= |
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519 | align 4 |
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520 | sys_pcibios: |
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521 | xchg ebx, eax |
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522 | xchg ecx, eax |
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523 | xchg edx, eax |
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524 | xchg esi, eax |
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1348 | art_zh | 525 | xchg edi, eax |
594 | diamond | 526 | cmp [pci_access_enabled], 1 |
1348 | art_zh | 527 | jne .unsupported_func |
528 | cmp [pci_bios_entry], 0 |
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594 | diamond | 529 | jz .emulate_bios |
586 | serge | 530 | |
1348 | art_zh | 531 | push ds |
532 | mov ax, pci_data_sel |
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533 | mov ds, ax |
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534 | mov eax, ebp |
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535 | mov ah, 0B1h |
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536 | call pword [cs:pci_bios_entry] |
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537 | pop ds |
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586 | serge | 538 | |
539 | jmp .return |
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540 | ;-=-=-=-=-=-=-=-= |
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541 | .emulate_bios: |
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542 | cmp ebp, 1 ; PCI_FUNCTION_ID |
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543 | jnz .not_PCI_BIOS_PRESENT |
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544 | mov edx, 'PCI ' |
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1348 | art_zh | 545 | mov al, [OS_BASE+0x2F0000 + 0x9020] |
546 | mov bx, [OS_BASE+0x2F0000 + 0x9022] |
||
547 | mov cl, [OS_BASE+0x2F0000 + 0x9021] |
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548 | xor ah, ah |
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594 | diamond | 549 | jmp .return_abcd |
586 | serge | 550 | |
551 | .not_PCI_BIOS_PRESENT: |
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552 | cmp ebp, 2 ; FIND_PCI_DEVICE |
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553 | jne .not_FIND_PCI_DEVICE |
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594 | diamond | 554 | mov ebx, pci_emu_dat |
555 | ..nxt: cmp [ebx], dx |
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586 | serge | 556 | jne ..no |
594 | diamond | 557 | cmp [ebx + 2], cx |
586 | serge | 558 | jne ..no |
594 | diamond | 559 | dec si |
586 | serge | 560 | jns ..no |
594 | diamond | 561 | mov bx, [ebx + 4] |
1348 | art_zh | 562 | xor ah, ah |
594 | diamond | 563 | jmp .return_ab |
564 | ..no: cmp word[ebx], 0 |
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586 | serge | 565 | je ..dev_not_found |
594 | diamond | 566 | add ebx, 10 |
586 | serge | 567 | jmp ..nxt |
568 | ..dev_not_found: |
||
569 | mov ah, 0x86 ; DEVICE_NOT_FOUND |
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594 | diamond | 570 | jmp .return_a |
586 | serge | 571 | |
572 | .not_FIND_PCI_DEVICE: |
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573 | cmp ebp, 3 ; FIND_PCI_CLASS_CODE |
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574 | jne .not_FIND_PCI_CLASS_CODE |
||
575 | mov esi, pci_emu_dat |
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594 | diamond | 576 | shl ecx, 8 |
1348 | art_zh | 577 | ..nxt2: cmp [esi], ecx |
586 | serge | 578 | jne ..no2 |
579 | mov bx, [esi] |
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1348 | art_zh | 580 | xor ah, ah |
594 | diamond | 581 | jmp .return_ab |
586 | serge | 582 | ..no2: cmp dword[esi], 0 |
594 | diamond | 583 | je ..dev_not_found |
586 | serge | 584 | add esi, 10 |
585 | jmp ..nxt2 |
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586 | |||
587 | .not_FIND_PCI_CLASS_CODE: |
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588 | cmp ebp, 8 ; READ_CONFIG_* |
||
589 | jb .not_READ_CONFIG |
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590 | cmp ebp, 0x0A |
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591 | ja .not_READ_CONFIG |
||
1348 | art_zh | 592 | mov eax, ebp |
593 | mov ah, bh |
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594 | mov edx, edi |
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595 | mov bh, bl |
||
596 | mov bl, dl |
||
586 | serge | 597 | call pci_read_reg |
598 | mov ecx, eax |
||
599 | xor ah, ah ; SUCCESSFUL |
||
594 | diamond | 600 | jmp .return_abc |
586 | serge | 601 | .not_READ_CONFIG: |
602 | cmp ebp, 0x0B ; WRITE_CONFIG_* |
||
603 | jb .not_WRITE_CONFIG |
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604 | cmp ebp, 0x0D |
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605 | ja .not_WRITE_CONFIG |
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1348 | art_zh | 606 | lea eax, [ebp+1] |
607 | mov ah, bh |
||
608 | mov edx, edi |
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609 | mov bh, bl |
||
610 | mov bl, dl |
||
586 | serge | 611 | call pci_write_reg |
612 | xor ah, ah ; SUCCESSFUL |
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594 | diamond | 613 | jmp .return_abc |
586 | serge | 614 | .not_WRITE_CONFIG: |
615 | .unsupported_func: |
||
616 | mov ah, 0x81 ; FUNC_NOT_SUPPORTED |
||
617 | .return:mov dword[esp + 8 ], edi |
||
618 | mov dword[esp + 12], esi |
||
594 | diamond | 619 | .return_abcd: |
586 | serge | 620 | mov dword[esp + 28], edx |
594 | diamond | 621 | .return_abc: |
586 | serge | 622 | mov dword[esp + 32], ecx |
594 | diamond | 623 | .return_ab: |
624 | mov dword[esp + 24], ebx |
||
625 | .return_a: |
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586 | serge | 626 | mov dword[esp + 36], eax |
627 | ret><><<>><><<> |