WebSVN – Kolibri OS – Blame – /kernel/branches/net/drivers/pcnet32.asm

Rev	Author	Line No.	Line
1196	hidnplayr	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		2	;; ;;
		3	;; Copyright (C) KolibriOS team 2004-2007. All rights reserved. ;;
		4	;; Distributed under terms of the GNU General Public License ;;
		5	;; ;;
		6	;; GNU GENERAL PUBLIC LICENSE ;;
		7	;; Version 2, June 1991 ;;
		8	;; ;;
		9	;; Status: under construction ;;
		10	;; ;;
		11	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
		12
		13	;$Revision$
		14
		15	format MS COFF
		16
		17	API_VERSION equ 0x01000100
		18
		19	DEBUG equ 1
		20	__DEBUG__ equ 1
		21	__DEBUG_LEVEL__ equ 1
		22
		23	MAX_PCNET equ 4
		24	MAX_ETH_FRAME_SIZE equ 1514
		25
		26	include 'proc32.inc'
		27	include 'imports.inc'
		28	include 'fdo.inc'
		29
		30	OS_BASE equ 0;
		31	new_app_base equ 0x60400000
		32	PROC_BASE equ OS_BASE+0x0080000
		33
		34	public START
		35	public service_proc
		36	public version
		37
		38	struc IOCTL {
		39	.handle dd ?
		40	.io_code dd ?
		41	.input dd ?
		42	.inp_size dd ?
		43	.output dd ?
		44	.out_size dd ?
		45	}
		46
		47	virtual at 0
		48	IOCTL IOCTL
		49	end virtual
		50
		51	struc ETH_DEVICE {
		52	; pointers to procedures
		53	.unload dd ?
		54	.reset dd ?
		55	.transmit dd ?
		56	.set_MAC dd ?
		57	.get_MAC dd ?
		58	.set_mode dd ?
		59	.get_mode dd ?
		60	; status
		61	.bytes_tx dq ?
		62	.bytes_rx dq ?
		63	.packets_tx dd ?
		64	.packets_rx dd ?
		65	.mode dd ? ; This dword contains cable status (10mbit/100mbit, full/half duplex, auto negotiation or not,..)
		66	.name dd ?
		67	.mac dp ?
		68	; device specific
		69
		70	.rx_buffer dd ?
		71	.tx_buffer dd ?
		72
		73	.io_addr dd ?
		74	.irq_line db ?
		75	.pci_bus db ?
		76	.pci_dev db ?
		77
1201	clevermous	78	; The following fields up to .tx_ring_phys inclusive form
		79	; initialization block for hardware; do not modify
		80	align 4 ; initialization block must be dword-aligned
1196	hidnplayr	81	.private:
		82	.mode_ dw ?
		83	.tlen_rlen dw ?
1201	clevermous	84	.phys_addr dp ?
1196	hidnplayr	85	.reserved dw ?
		86	.filter dq ?
1201	clevermous	87	.rx_ring_phys dd ?
		88	.tx_ring_phys dd ?
1196	hidnplayr	89	.rx_ring dd ?
		90	.tx_ring dd ?
		91	.cur_rx db ?
		92	.cur_tx db ?
		93	.dirty_rx dd ?
		94	.dirty_tx dd ?
		95	.tx_full db ?
		96	.options dd ?
		97	.full_duplex db ?
		98	.chip_version dd ?
		99	.mii db ?
		100	.ltint db ?
		101	.dxsuflo db ?
		102	.fset db ?
		103	.fdx db ?
		104
		105	.access_read_csr dd ?
		106	.access_write_csr dd ?
		107	.access_read_bcr dd ?
		108	.access_write_bcr dd ?
		109	.access_read_rap dd ?
		110	.access_write_rap dd ?
		111	.access_reset dd ?
		112
		113	.size:
		114
		115	}
		116
		117	virtual at 0
		118	device ETH_DEVICE
		119	end virtual
		120
		121	struc buf_head {
		122	.base dd ?
		123	.length dw ?
		124	.status dw ?
1201	clevermous	125	.msg_length dw ?
		126	.misc dw ?
1196	hidnplayr	127	.reserved dd ?
		128
		129	.size:
		130	}
		131
		132	virtual at 0
		133	buf_head buf_head
		134	end virtual
		135
		136	struc rx_desc_2 { ; Swstyle 2
		137
		138	.rbadr dd ?
		139	.status dd ?
		140	.rfrtag dd ?
		141
		142	; +--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
		143	; \|Address \| 31 \| 30 \| 29 \| 28 \| 27 \| 26 \| 25 \| 24 \| 23 \| 22 \| 21 \| 20 \|19-16\|15-12\|11-0 \|
		144	; +--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
		145	; \|CRDA+00h\| RBADR[31:0] \|
		146	; +--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
		147	; \|CRDA+04h\| OWN \| ERR \|FRAM \|OFLO \| CRC \|BUFF \| STP \| ENP \| BPE \| PAM \|LAFM \| BAM \| RES \|1111 \|BCNT \|
		148	; +--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
		149	; \|CRDA+08h\| RES \| RFRTAG[14:0] \|0000 \|MCNT \|
		150	; +--------+-----+-----------------------------------------------------------------------+-----+-----+
		151	; \|CRDA+0Ch\| USER SPACE \| \| \|
		152	; +--------+-----------------------------------------------------------------------------+-----+-----+
		153
		154	}
		155
		156	struc rx_desc_3 { ; Swstyle 3
		157
		158	.mcnt dd ?
		159	.status dd ?
		160	.rbadr dd ?
		161
		162	; +--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
		163	; \|Address \| 31 \| 30 \| 29 \| 28 \| 27 \| 26 \| 25 \| 24 \| 23 \|22-16\|15-12\|11-0 \|
		164	; +--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
		165	; \|CRDA+00h\| RES \| RES \| RES \|0000 \|MCNT \|
		166	; +--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
		167	; \|CRDA+04h\| OWN \| ERR \|FRAM \|OFLO \| CRC \|BUFF \| STP \| ENP \| BPE \| RES \|1111 \|BCNT \|
		168	; +--------+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+-----+
		169	; \|CRDA+08h\| RBADR[31:0] \|
		170	; +--------+-----------------------------------------------------------------------+
		171	; \|CRDA+0Ch\| USER SPACE \|
		172	; +--------+-----------------------------------------------------------------------+
		173
		174	}
		175
		176	virtual at 0
		177	rx_desc rx_desc_2
		178	end virtual
		179
		180
		181	; PCI Bus defines
		182
		183	PCI_HEADER_TYPE equ 0x0e ;8 bit
		184	PCI_BASE_ADDRESS_0 equ 0x10 ;32 bit
		185	PCI_BASE_ADDRESS_5 equ 0x24 ;32 bits
		186	PCI_BASE_ADDRESS_SPACE_IO equ 0x01
		187	PCI_VENDOR_ID equ 0x00 ;16 bit
		188	PCI_BASE_ADDRESS_IO_MASK equ 0xFFFFFFFC
		189
		190	PCNET_PORT_AUI equ 0x00
		191	PCNET_PORT_10BT equ 0x01
		192	PCNET_PORT_GPSI equ 0x02
		193	PCNET_PORT_MII equ 0x03
		194	PCNET_PORT_PORTSEL equ 0x03
		195	PCNET_PORT_ASEL equ 0x04
		196	PCNET_PORT_100 equ 0x40
		197	PCNET_PORT_FD equ 0x80
		198
		199	PCNET_DMA_MASK equ 0xffffffff
		200
1201	clevermous	201	PCNET_LOG_TX_BUFFERS equ 2
1196	hidnplayr	202	PCNET_LOG_RX_BUFFERS equ 2
		203
		204	PCNET_TX_RING_SIZE equ 4
		205	PCNET_TX_RING_MOD_MASK equ (PCNET_TX_RING_SIZE-1)
1201	clevermous	206	PCNET_TX_RING_LEN_BITS equ (PCNET_LOG_TX_BUFFERS shl 12)
1196	hidnplayr	207
		208	PCNET_RX_RING_SIZE equ 4
		209	PCNET_RX_RING_MOD_MASK equ (PCNET_RX_RING_SIZE-1)
		210	PCNET_RX_RING_LEN_BITS equ (PCNET_LOG_RX_BUFFERS shl 4)
		211
		212	PCNET_PKT_BUF_SZ equ 1544
		213	PCNET_PKT_BUF_SZ_NEG equ 0xf9f8
		214
		215	PCNET_WIO_RDP equ 0x10
		216	PCNET_WIO_RAP equ 0x12
		217	PCNET_WIO_RESET equ 0x14
		218	PCNET_WIO_BDP equ 0x16
		219	PCNET_DWIO_RDP equ 0x10
		220	PCNET_DWIO_RAP equ 0x14
		221	PCNET_DWIO_RESET equ 0x18
		222	PCNET_DWIO_BDP equ 0x1C
		223	PCNET_TOTAL_SIZE equ 0x20
		224
		225	; CSR registers
		226
		227	PCNET_CSR_CSR equ 0x00
		228	PCNET_CSR_IAB0 equ 0x01
		229	PCNET_CSR_IAB1 equ 0x02
		230	PCNET_CSR_IMR equ 0x03
		231	PCNET_CSR_TFEAT equ 0x04
		232	PCNET_CSR_EXTCTL1 equ 0x05
		233	PCNET_CSR_DTBLLEN equ 0x06
		234	PCNET_CSR_EXTCTL2 equ 0x07
		235	PCNET_CSR_MAR0 equ 0x08
		236	PCNET_CSR_MAR1 equ 0x09
		237	PCNET_CSR_MAR2 equ 0x0A
		238	PCNET_CSR_MAR3 equ 0x0B
		239	PCNET_CSR_PAR0 equ 0x0C
		240	PCNET_CSR_PAR1 equ 0x0D
		241	PCNET_CSR_PAR2 equ 0x0E
		242	PCNET_CSR_MODE equ 0x0F
		243	PCNET_CSR_RXADDR0 equ 0x18
		244	PCNET_CSR_RXADDR1 equ 0x19
		245	PCNET_CSR_TXADDR0 equ 0x1E
		246	PCNET_CSR_TXADDR1 equ 0x1F
		247	PCNET_CSR_TXPOLL equ 0x2F
		248	PCNET_CSR_RXPOLL equ 0x31
		249	PCNET_CSR_RXRINGLEN equ 0x4C
		250	PCNET_CSR_TXRINGLEN equ 0x4E
		251	PCNET_CSR_DMACTL equ 0x50
		252	PCNET_CSR_BUSTIMER equ 0x52
		253	PCNET_CSR_MEMERRTIMEO equ 0x64
		254	PCNET_CSR_ONNOWMISC equ 0x74
		255	PCNET_CSR_ADVFEAT equ 0x7A
		256	PCNET_CSR_MACCFG equ 0x7D
		257	PCNET_CSR_CHIPID0 equ 0x58
		258	PCNET_CSR_CHIPID1 equ 0

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(root)/kernel/branches/net/drivers/pcnet32.asm @ 2981 – Rev 1201