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Rev | Author | Line No. | Line |
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1554 | hidnplayr | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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3 | ;; Copyright (C) KolibriOS team 2004-2010. All rights reserved. ;; |
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4 | ;; Distributed under terms of the GNU General Public License ;; |
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5 | ;; ;; |
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6 | ;; RTL8169 driver for KolibriOS ;; |
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7 | ;; ;; |
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8 | ;; Copyright 2007 mike.dld, ;; |
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9 | ;; mike.dld@gmail.com ;; |
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10 | ;; ;; |
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11 | ;; Version 0.1 11 February 2007 ;; |
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12 | ;; Version 0.2 3 August 2010 - port to net branch by hidnplayr ;; |
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1823 | hidnplayr | 13 | ;; Version 0.3 31 Januari 2011 - bugfixes by hidnplayr ;; |
1554 | hidnplayr | 14 | ;; ;; |
15 | ;; References: ;; |
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16 | ;; r8169.c - linux driver (etherboot project) ;; |
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17 | ;; ;; |
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18 | ;; GNU GENERAL PUBLIC LICENSE ;; |
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19 | ;; Version 2, June 1991 ;; |
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20 | ;; ;; |
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21 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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22 | |||
23 | format MS COFF |
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24 | |||
2916 | hidnplayr | 25 | API_VERSION = 0x01000100 |
26 | DRIVER_VERSION = 5 |
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1554 | hidnplayr | 27 | |
2916 | hidnplayr | 28 | MAX_DEVICES = 16 |
1554 | hidnplayr | 29 | |
2916 | hidnplayr | 30 | DEBUG = 1 |
31 | __DEBUG__ = 1 |
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32 | __DEBUG_LEVEL__ = 1 |
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1554 | hidnplayr | 33 | |
2916 | hidnplayr | 34 | NUM_TX_DESC = 4 |
35 | NUM_RX_DESC = 4 |
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1554 | hidnplayr | 36 | |
37 | include 'proc32.inc' |
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38 | include 'imports.inc' |
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39 | include 'fdo.inc' |
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40 | include 'netdrv.inc' |
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41 | |||
42 | public START |
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43 | public service_proc |
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44 | public version |
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45 | |||
46 | |||
2916 | hidnplayr | 47 | REG_MAC0 = 0x0 ; Ethernet hardware address |
48 | REG_MAR0 = 0x8 ; Multicast filter |
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49 | REG_TxDescStartAddr = 0x20 |
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50 | REG_TxHDescStartAddr = 0x28 |
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51 | REG_FLASH = 0x30 |
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52 | REG_ERSR = 0x36 |
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53 | REG_ChipCmd = 0x37 |
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54 | REG_TxPoll = 0x38 |
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55 | REG_IntrMask = 0x3C |
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56 | REG_IntrStatus = 0x3E |
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57 | REG_TxConfig = 0x40 |
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58 | REG_RxConfig = 0x44 |
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59 | REG_RxMissed = 0x4C |
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60 | REG_Cfg9346 = 0x50 |
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61 | REG_Config0 = 0x51 |
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62 | REG_Config1 = 0x52 |
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63 | REG_Config2 = 0x53 |
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64 | REG_Config3 = 0x54 |
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65 | REG_Config4 = 0x55 |
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66 | REG_Config5 = 0x56 |
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67 | REG_MultiIntr = 0x5C |
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68 | REG_PHYAR = 0x60 |
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69 | REG_TBICSR = 0x64 |
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70 | REG_TBI_ANAR = 0x68 |
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71 | REG_TBI_LPAR = 0x6A |
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72 | REG_PHYstatus = 0x6C |
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73 | REG_RxMaxSize = 0xDA |
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74 | REG_CPlusCmd = 0xE0 |
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75 | REG_RxDescStartAddr = 0xE4 |
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76 | REG_ETThReg = 0xEC |
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77 | REG_FuncEvent = 0xF0 |
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78 | REG_FuncEventMask = 0xF4 |
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79 | REG_FuncPresetState = 0xF8 |
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80 | REG_FuncForceEvent = 0xFC |
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1554 | hidnplayr | 81 | |
2387 | hidnplayr | 82 | ; InterruptStatusBits |
2916 | hidnplayr | 83 | ISB_SYSErr = 0x8000 |
84 | ISB_PCSTimeout = 0x4000 |
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85 | ISB_SWInt = 0x0100 |
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86 | ISB_TxDescUnavail = 0x80 |
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87 | ISB_RxFIFOOver = 0x40 |
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88 | ISB_LinkChg = 0x20 |
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89 | ISB_RxOverflow = 0x10 |
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90 | ISB_TxErr = 0x08 |
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91 | ISB_TxOK = 0x04 |
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92 | ISB_RxErr = 0x02 |
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93 | ISB_RxOK = 0x01 |
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1554 | hidnplayr | 94 | |
2387 | hidnplayr | 95 | ; RxStatusDesc |
2916 | hidnplayr | 96 | SD_RxRES = 0x00200000 |
97 | SD_RxCRC = 0x00080000 |
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98 | SD_RxRUNT = 0x00100000 |
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99 | SD_RxRWT = 0x00400000 |
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1554 | hidnplayr | 100 | |
2387 | hidnplayr | 101 | ; ChipCmdBits |
2916 | hidnplayr | 102 | CMD_Reset = 0x10 |
103 | CMD_RxEnb = 0x08 |
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104 | CMD_TxEnb = 0x04 |
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105 | CMD_RxBufEmpty = 0x01 |
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1554 | hidnplayr | 106 | |
2387 | hidnplayr | 107 | ; Cfg9346Bits |
2916 | hidnplayr | 108 | CFG_9346_Lock = 0x00 |
109 | CFG_9346_Unlock = 0xC0 |
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1554 | hidnplayr | 110 | |
2387 | hidnplayr | 111 | ; rx_mode_bits |
2916 | hidnplayr | 112 | RXM_AcceptErr = 0x20 |
113 | RXM_AcceptRunt = 0x10 |
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114 | RXM_AcceptBroadcast = 0x08 |
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115 | RXM_AcceptMulticast = 0x04 |
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116 | RXM_AcceptMyPhys = 0x02 |
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117 | RXM_AcceptAllPhys = 0x01 |
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1554 | hidnplayr | 118 | |
2387 | hidnplayr | 119 | ; RxConfigBits |
2916 | hidnplayr | 120 | RXC_FIFOShift = 13 |
121 | RXC_DMAShift = 8 |
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1554 | hidnplayr | 122 | |
2387 | hidnplayr | 123 | ; TxConfigBits |
2916 | hidnplayr | 124 | TXC_InterFrameGapShift = 24 |
125 | TXC_DMAShift = 8 ; DMA burst value (0-7) is shift this many bits |
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1554 | hidnplayr | 126 | |
2387 | hidnplayr | 127 | ; PHYstatus |
2916 | hidnplayr | 128 | PHYS_TBI_Enable = 0x80 |
129 | PHYS_TxFlowCtrl = 0x40 |
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130 | PHYS_RxFlowCtrl = 0x20 |
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131 | PHYS_1000bpsF = 0x10 |
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132 | PHYS_100bps = 0x08 |
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133 | PHYS_10bps = 0x04 |
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134 | PHYS_LinkStatus = 0x02 |
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135 | PHYS_FullDup = 0x01 |
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1554 | hidnplayr | 136 | |
2387 | hidnplayr | 137 | ; GIGABIT_PHY_registers |
2916 | hidnplayr | 138 | PHY_CTRL_REG = 0 |
139 | PHY_STAT_REG = 1 |
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140 | PHY_AUTO_NEGO_REG = 4 |
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141 | PHY_1000_CTRL_REG = 9 |
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1554 | hidnplayr | 142 | |
2387 | hidnplayr | 143 | ; GIGABIT_PHY_REG_BIT |
2916 | hidnplayr | 144 | PHY_Restart_Auto_Nego = 0x0200 |
145 | PHY_Enable_Auto_Nego = 0x1000 |
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1554 | hidnplayr | 146 | |
2916 | hidnplayr | 147 | ; PHY_STAT_REG = 1 |
148 | PHY_Auto_Neco_Comp = 0x0020 |
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1554 | hidnplayr | 149 | |
2916 | hidnplayr | 150 | ; PHY_AUTO_NEGO_REG = 4 |
151 | PHY_Cap_10_Half = 0x0020 |
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152 | PHY_Cap_10_Full = 0x0040 |
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153 | PHY_Cap_100_Half = 0x0080 |
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154 | PHY_Cap_100_Full = 0x0100 |
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1554 | hidnplayr | 155 | |
2916 | hidnplayr | 156 | ; PHY_1000_CTRL_REG = 9 |
157 | PHY_Cap_1000_Full = 0x0200 |
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158 | PHY_Cap_1000_Half = 0x0100 |
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1554 | hidnplayr | 159 | |
2916 | hidnplayr | 160 | PHY_Cap_PAUSE = 0x0400 |
161 | PHY_Cap_ASYM_PAUSE = 0x0800 |
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1554 | hidnplayr | 162 | |
2916 | hidnplayr | 163 | PHY_Cap_Null = 0x0 |
1554 | hidnplayr | 164 | |
2387 | hidnplayr | 165 | ; _MediaType |
2916 | hidnplayr | 166 | MT_10_Half = 0x01 |
167 | MT_10_Full = 0x02 |
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168 | MT_100_Half = 0x04 |
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169 | MT_100_Full = 0x08 |
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170 | MT_1000_Full = 0x10 |
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1554 | hidnplayr | 171 | |
2387 | hidnplayr | 172 | ; _TBICSRBit |
2916 | hidnplayr | 173 | TBI_LinkOK = 0x02000000 |
1554 | hidnplayr | 174 | |
2387 | hidnplayr | 175 | ; _DescStatusBit |
2916 | hidnplayr | 176 | DSB_OWNbit = 0x80000000 |
177 | DSB_EORbit = 0x40000000 |
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178 | DSB_FSbit = 0x20000000 |
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179 | DSB_LSbit = 0x10000000 |
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1554 | hidnplayr | 180 | |
2916 | hidnplayr | 181 | RX_BUF_SIZE = 1536 ; Rx Buffer size |
1554 | hidnplayr | 182 | |
183 | ; max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4) |
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2916 | hidnplayr | 184 | MAX_ETH_FRAME_SIZE = 1536 |
1554 | hidnplayr | 185 | |
2916 | hidnplayr | 186 | TX_FIFO_THRESH = 256 ; In bytes |
1554 | hidnplayr | 187 | |
2916 | hidnplayr | 188 | RX_FIFO_THRESH = 7 ; 7 means NO threshold, Rx buffer level before first PCI xfer |
189 | RX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024 |
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190 | TX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024 |
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191 | ETTh = 0x3F ; 0x3F means NO threshold |
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1554 | hidnplayr | 192 | |
2916 | hidnplayr | 193 | EarlyTxThld = 0x3F ; 0x3F means NO early transmit |
194 | RxPacketMaxSize = 0x0800 ; Maximum size supported is 16K-1 |
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195 | InterFrameGap = 0x03 ; 3 means InterFrameGap = the shortest one |
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1554 | hidnplayr | 196 | |
2916 | hidnplayr | 197 | HZ = 1000 |
1554 | hidnplayr | 198 | |
2916 | hidnplayr | 199 | RTL_MIN_IO_SIZE = 0x80 |
200 | TX_TIMEOUT = (6*HZ) |
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1554 | hidnplayr | 201 | |
2916 | hidnplayr | 202 | TIMER_EXPIRE_TIME = 100 |
1554 | hidnplayr | 203 | |
2916 | hidnplayr | 204 | ETH_HDR_LEN = 14 |
205 | DEFAULT_MTU = 1500 |
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206 | DEFAULT_RX_BUF_LEN = 1536 |
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1554 | hidnplayr | 207 | |
208 | |||
2916 | hidnplayr | 209 | ;ifdef JUMBO_FRAME_SUPPORT |
210 | ; MAX_JUMBO_FRAME_MTU = 10000 |
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211 | ; MAX_RX_SKBDATA_SIZE = (MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN ) |
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212 | ;else |
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213 | MAX_RX_SKBDATA_SIZE = 1600 |
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214 | ;end if |
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1554 | hidnplayr | 215 | |
2916 | hidnplayr | 216 | MCFG_METHOD_01 = 0x01 |
217 | MCFG_METHOD_02 = 0x02 |
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218 | MCFG_METHOD_03 = 0x03 |
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219 | MCFG_METHOD_04 = 0x04 |
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220 | MCFG_METHOD_05 = 0x05 |
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221 | MCFG_METHOD_11 = 0x0b |
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222 | MCFG_METHOD_12 = 0x0c |
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223 | MCFG_METHOD_13 = 0x0d |
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224 | MCFG_METHOD_14 = 0x0e |
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225 | MCFG_METHOD_15 = 0x0f |
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1554 | hidnplayr | 226 | |
2916 | hidnplayr | 227 | PCFG_METHOD_1 = 0x01 ; PHY Reg 0x03 bit0-3 == 0x0000 |
228 | PCFG_METHOD_2 = 0x02 ; PHY Reg 0x03 bit0-3 == 0x0001 |
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229 | PCFG_METHOD_3 = 0x03 ; PHY Reg 0x03 bit0-3 == 0x0002 |
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1554 | hidnplayr | 230 | |
231 | virtual at 0 |
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232 | tx_desc: |
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233 | .status dd ? |
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234 | .vlan_tag dd ? |
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1557 | hidnplayr | 235 | .buf_addr dq ? |
1554 | hidnplayr | 236 | .size = $ |
2387 | hidnplayr | 237 | rb (NUM_TX_DESC-1)*tx_desc.size |
238 | .buf_soft_addr dd ? |
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1554 | hidnplayr | 239 | end virtual |
240 | |||
241 | virtual at 0 |
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242 | rx_desc: |
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243 | .status dd ? |
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244 | .vlan_tag dd ? |
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1557 | hidnplayr | 245 | .buf_addr dq ? |
1554 | hidnplayr | 246 | .size = $ |
2387 | hidnplayr | 247 | rb (NUM_RX_DESC-1)*rx_desc.size |
248 | .buf_soft_addr dd ? |
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1554 | hidnplayr | 249 | end virtual |
250 | |||
251 | virtual at ebx |
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252 | |||
2387 | hidnplayr | 253 | device: |
1554 | hidnplayr | 254 | |
2387 | hidnplayr | 255 | ETH_DEVICE |
1554 | hidnplayr | 256 | |
2387 | hidnplayr | 257 | .io_addr dd ? |
258 | .pci_bus db ? |
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259 | .pci_dev db ? |
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260 | .irq_line db ? |
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1554 | hidnplayr | 261 | |
2916 | hidnplayr | 262 | rb 256-(($ - device) and 255) ; align 256 |
263 | .tx_ring rb NUM_TX_DESC * tx_desc.size * 2 |
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264 | |||
265 | rb 256-(($ - device) and 255) ; align 256 |
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266 | .rx_ring rb NUM_RX_DESC * rx_desc.size * 2 |
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267 | |||
2387 | hidnplayr | 268 | tpc: |
269 | .mmio_addr dd ? ; memory map physical address |
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270 | .chipset dd ? |
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271 | .pcfg dd ? |
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272 | .mcfg dd ? |
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273 | .cur_rx dd ? ; Index into the Rx descriptor buffer of next Rx pkt |
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274 | .cur_tx dd ? ; Index into the Tx descriptor buffer of next Rx pkt |
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275 | .TxDescArrays dd ? ; Index of Tx Descriptor buffer |
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276 | .RxDescArrays dd ? ; Index of Rx Descriptor buffer |
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277 | .TxDescArray dd ? ; Index of 256-alignment Tx Descriptor buffer |
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278 | .RxDescArray dd ? ; Index of 256-alignment Rx Descriptor buffer |
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1554 | hidnplayr | 279 | |
2387 | hidnplayr | 280 | device_size = $ - device |
1554 | hidnplayr | 281 | |
282 | end virtual |
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283 | |||
2916 | hidnplayr | 284 | intr_mask = ISB_LinkChg or ISB_RxOverflow or ISB_RxFIFOOver or ISB_TxErr or ISB_TxOK or ISB_RxErr or ISB_RxOK |
285 | rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E |
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1554 | hidnplayr | 286 | |
287 | |||
2387 | hidnplayr | 288 | macro udelay msec { |
1554 | hidnplayr | 289 | |
2387 | hidnplayr | 290 | push esi |
291 | mov esi, msec |
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292 | call Sleep |
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293 | pop esi |
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1554 | hidnplayr | 294 | |
295 | } |
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296 | |||
2387 | hidnplayr | 297 | macro WRITE_GMII_REG RegAddr, value { |
1554 | hidnplayr | 298 | |
2387 | hidnplayr | 299 | set_io REG_PHYAR |
300 | if value eq ax |
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301 | and eax, 0x0000ffff |
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302 | or eax, 0x80000000 + (RegAddr shl 16) |
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303 | else |
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304 | mov eax, 0x80000000 + (RegAddr shl 16) + value |
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305 | end if |
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306 | out dx, eax |
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1554 | hidnplayr | 307 | |
2918 | hidnplayr | 308 | call PHY_WAIT_WRITE |
1554 | hidnplayr | 309 | } |
310 | |||
2387 | hidnplayr | 311 | macro READ_GMII_REG RegAddr { |
1554 | hidnplayr | 312 | |
2387 | hidnplayr | 313 | local .error, .done |
1554 | hidnplayr | 314 | |
2387 | hidnplayr | 315 | set_io REG_PHYAR |
316 | mov eax, RegAddr shl 16 |
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317 | out dx, eax |
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1554 | hidnplayr | 318 | |
2918 | hidnplayr | 319 | call PHY_WAIT_READ |
2387 | hidnplayr | 320 | jz .error |
1554 | hidnplayr | 321 | |
2387 | hidnplayr | 322 | in eax, dx |
323 | and eax, 0xFFFF |
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324 | jmp .done |
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1554 | hidnplayr | 325 | |
326 | .error: |
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2387 | hidnplayr | 327 | or eax, -1 |
1554 | hidnplayr | 328 | .done: |
329 | } |
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330 | |||
331 | align 4 |
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2918 | hidnplayr | 332 | PHY_WAIT_READ: ; io addr must already be set to REG_PHYAR |
1554 | hidnplayr | 333 | |
2387 | hidnplayr | 334 | udelay 1 ;;;1000 |
1554 | hidnplayr | 335 | |
2387 | hidnplayr | 336 | push ecx |
337 | mov ecx, 2000 |
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338 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
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1554 | hidnplayr | 339 | @@: |
2387 | hidnplayr | 340 | in eax, dx |
341 | test eax, 0x80000000 |
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2918 | hidnplayr | 342 | jnz .exit |
343 | udelay 1 ;;;100 |
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344 | loop @b |
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345 | .exit: |
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346 | pop ecx |
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347 | ret |
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348 | |||
349 | align 4 |
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350 | PHY_WAIT_WRITE: ; io addr must already be set to REG_PHYAR |
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351 | |||
352 | udelay 1 ;;;1000 |
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353 | |||
354 | push ecx |
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355 | mov ecx, 2000 |
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356 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
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357 | @@: |
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358 | in eax, dx |
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359 | test eax, 0x80000000 |
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2387 | hidnplayr | 360 | jz .exit |
361 | udelay 1 ;;;100 |
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362 | loop @b |
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1554 | hidnplayr | 363 | .exit: |
2387 | hidnplayr | 364 | pop ecx |
365 | ret |
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1554 | hidnplayr | 366 | |
367 | |||
368 | |||
369 | section '.flat' code readable align 16 |
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370 | |||
371 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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372 | ;; ;; |
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373 | ;; proc START ;; |
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374 | ;; ;; |
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375 | ;; (standard driver proc) ;; |
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376 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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377 | |||
378 | align 4 |
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379 | proc START stdcall, state:dword |
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380 | |||
2387 | hidnplayr | 381 | cmp [state], 1 |
382 | jne .exit |
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1554 | hidnplayr | 383 | |
384 | .entry: |
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385 | |||
2916 | hidnplayr | 386 | DEBUGF 2,"Loading %s driver\n", my_service |
2387 | hidnplayr | 387 | stdcall RegService, my_service, service_proc |
388 | ret |
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1554 | hidnplayr | 389 | |
390 | .fail: |
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391 | .exit: |
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2387 | hidnplayr | 392 | xor eax, eax |
393 | ret |
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1554 | hidnplayr | 394 | |
395 | endp |
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396 | |||
397 | |||
398 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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399 | ;; ;; |
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400 | ;; proc SERVICE_PROC ;; |
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401 | ;; ;; |
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402 | ;; (standard driver proc) ;; |
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403 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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404 | |||
405 | align 4 |
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406 | proc service_proc stdcall, ioctl:dword |
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407 | |||
2387 | hidnplayr | 408 | mov edx, [ioctl] |
409 | mov eax, [IOCTL.io_code] |
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1554 | hidnplayr | 410 | |
411 | ;------------------------------------------------------ |
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412 | |||
2387 | hidnplayr | 413 | cmp eax, 0 ;SRV_GETVERSION |
414 | jne @F |
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1554 | hidnplayr | 415 | |
2387 | hidnplayr | 416 | cmp [IOCTL.out_size], 4 |
417 | jl .fail |
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418 | mov eax, [IOCTL.output] |
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419 | mov [eax], dword API_VERSION |
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1554 | hidnplayr | 420 | |
2387 | hidnplayr | 421 | xor eax, eax |
422 | ret |
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1554 | hidnplayr | 423 | |
424 | ;------------------------------------------------------ |
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425 | @@: |
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2387 | hidnplayr | 426 | cmp eax, 1 ;SRV_HOOK |
427 | jne .fail |
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1554 | hidnplayr | 428 | |
2387 | hidnplayr | 429 | cmp [IOCTL.inp_size], 3 ; Data input must be at least 3 bytes |
430 | jl .fail |
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1554 | hidnplayr | 431 | |
2387 | hidnplayr | 432 | mov eax, [IOCTL.input] |
433 | cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
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434 | jne .fail ; other types arent supported for this card yet |
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1554 | hidnplayr | 435 | |
436 | ; check if the device is already listed |
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437 | |||
2387 | hidnplayr | 438 | mov esi, device_list |
439 | mov ecx, [devices] |
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440 | test ecx, ecx |
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441 | jz .firstdevice |
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1554 | hidnplayr | 442 | |
443 | ; mov eax, [IOCTL.input] ; get the pci bus and device numbers |
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2387 | hidnplayr | 444 | mov ax , [eax+1] ; |
1554 | hidnplayr | 445 | .nextdevice: |
2387 | hidnplayr | 446 | mov ebx, [esi] |
447 | cmp ax , word [device.pci_bus] ; compare with pci and device num in device list (notice the usage of word instead of byte) |
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448 | je .find_devicenum ; Device is already loaded, let's find it's device number |
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449 | add esi, 4 |
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450 | loop .nextdevice |
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1554 | hidnplayr | 451 | |
452 | |||
453 | ; This device doesnt have its own eth_device structure yet, lets create one |
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454 | .firstdevice: |
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2387 | hidnplayr | 455 | cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
456 | jge .fail |
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1554 | hidnplayr | 457 | |
2387 | hidnplayr | 458 | allocate_and_clear ebx, device_size, .fail ; Allocate memory to put the device structure in |
1554 | hidnplayr | 459 | |
460 | ; Fill in the direct call addresses into the struct |
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461 | |||
2387 | hidnplayr | 462 | mov [device.reset], reset |
463 | mov [device.transmit], transmit |
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464 | mov [device.get_MAC], read_mac |
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465 | mov [device.set_MAC], write_mac |
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466 | mov [device.unload], unload |
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467 | mov [device.name], my_service |
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1554 | hidnplayr | 468 | |
469 | ; save the pci bus and device numbers |
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470 | |||
2387 | hidnplayr | 471 | mov eax, [IOCTL.input] |
472 | mov cl , [eax+1] |
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473 | mov [device.pci_bus], cl |
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474 | mov cl , [eax+2] |
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475 | mov [device.pci_dev], cl |
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1554 | hidnplayr | 476 | |
477 | ; Now, it's time to find the base io addres of the PCI device |
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478 | |||
2387 | hidnplayr | 479 | find_io [device.pci_bus], [device.pci_dev], [device.io_addr] |
480 | mov eax, [device.io_addr] |
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481 | mov [tpc.mmio_addr], eax |
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1554 | hidnplayr | 482 | |
483 | ; We've found the io address, find IRQ now |
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484 | |||
2387 | hidnplayr | 485 | find_irq [device.pci_bus], [device.pci_dev], [device.irq_line] |
1554 | hidnplayr | 486 | |
2387 | hidnplayr | 487 | DEBUGF 2,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\ |
488 | [device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:8 |
||
1554 | hidnplayr | 489 | |
490 | ; Ok, the eth_device structure is ready, let's probe the device |
||
491 | ; Because initialization fires IRQ, IRQ handler must be aware of this device |
||
2387 | hidnplayr | 492 | mov eax, [devices] ; Add the device structure to our device list |
2916 | hidnplayr | 493 | mov [device_list + 4*eax], ebx ; (IRQ handler uses this list to find device) |
2387 | hidnplayr | 494 | inc [devices] ; |
1554 | hidnplayr | 495 | |
2387 | hidnplayr | 496 | call probe ; this function will output in eax |
497 | test eax, eax |
||
498 | jnz .err2 ; If an error occured, exit |
||
1554 | hidnplayr | 499 | |
2387 | hidnplayr | 500 | mov [device.type], NET_TYPE_ETH |
501 | call NetRegDev |
||
1554 | hidnplayr | 502 | |
2387 | hidnplayr | 503 | cmp eax, -1 |
504 | je .destroy |
||
1554 | hidnplayr | 505 | |
2387 | hidnplayr | 506 | ret |
1554 | hidnplayr | 507 | |
508 | ; If the device was already loaded, find the device number and return it in eax |
||
509 | |||
510 | .find_devicenum: |
||
2387 | hidnplayr | 511 | DEBUGF 2,"Trying to find device number of already registered device\n" |
512 | call NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
||
513 | ; into a device number in edi |
||
514 | mov eax, edi ; Application wants it in eax instead |
||
515 | DEBUGF 2,"Kernel says: %u\n", eax |
||
516 | ret |
||
1554 | hidnplayr | 517 | |
518 | ; If an error occured, remove all allocated data and exit (returning -1 in eax) |
||
519 | |||
520 | .destroy: |
||
2387 | hidnplayr | 521 | ; todo: reset device into virgin state |
1554 | hidnplayr | 522 | |
523 | .err2: |
||
2387 | hidnplayr | 524 | dec [devices] |
1554 | hidnplayr | 525 | .err: |
2387 | hidnplayr | 526 | DEBUGF 2,"removing device structure\n" |
527 | stdcall KernelFree, ebx |
||
1554 | hidnplayr | 528 | .fail: |
2387 | hidnplayr | 529 | or eax, -1 |
530 | ret |
||
1554 | hidnplayr | 531 | |
532 | ;------------------------------------------------------ |
||
533 | endp |
||
534 | |||
535 | |||
536 | align 4 |
||
537 | unload: |
||
538 | |||
2387 | hidnplayr | 539 | ret |
1554 | hidnplayr | 540 | |
541 | |||
542 | align 4 |
||
543 | init_board: |
||
544 | |||
2387 | hidnplayr | 545 | DEBUGF 1,"init_board\n" |
1554 | hidnplayr | 546 | |
2387 | hidnplayr | 547 | make_bus_master [device.pci_bus], [device.pci_dev] |
1554 | hidnplayr | 548 | |
2387 | hidnplayr | 549 | ; Soft reset the chip |
550 | set_io 0 |
||
551 | set_io REG_ChipCmd |
||
552 | mov al, CMD_Reset |
||
553 | out dx, al |
||
1554 | hidnplayr | 554 | |
2387 | hidnplayr | 555 | ; Check that the chip has finished the reset |
556 | mov ecx, 1000 |
||
557 | set_io REG_ChipCmd |
||
558 | @@: in al, dx |
||
559 | test al, CMD_Reset |
||
560 | jz @f |
||
561 | udelay 10 |
||
562 | loop @b |
||
1554 | hidnplayr | 563 | @@: |
2387 | hidnplayr | 564 | ; identify config method |
565 | set_io REG_TxConfig |
||
566 | in eax, dx |
||
567 | and eax, 0x7c800000 |
||
568 | DEBUGF 1,"init_board: TxConfig & 0x7c800000 = 0x%x\n", eax |
||
569 | mov esi, mac_info-8 |
||
570 | @@: add esi, 8 |
||
571 | mov ecx, eax |
||
572 | and ecx, [esi] |
||
573 | cmp ecx, [esi] |
||
574 | jne @b |
||
575 | mov eax, [esi+4] |
||
576 | mov [tpc.mcfg], eax |
||
1554 | hidnplayr | 577 | |
2387 | hidnplayr | 578 | mov [tpc.pcfg], PCFG_METHOD_3 |
579 | READ_GMII_REG 3 |
||
580 | and al, 0x0f |
||
581 | or al, al |
||
582 | jnz @f |
||
583 | mov [tpc.pcfg], PCFG_METHOD_1 |
||
584 | jmp .pconf |
||
585 | @@: dec al |
||
586 | jnz .pconf |
||
587 | mov [tpc.pcfg], PCFG_METHOD_2 |
||
1554 | hidnplayr | 588 | .pconf: |
589 | |||
2387 | hidnplayr | 590 | ; identify chip attached to board |
591 | mov ecx, 10 |
||
592 | mov eax, [tpc.mcfg] |
||
593 | @@: dec ecx |
||
594 | js @f |
||
2916 | hidnplayr | 595 | cmp eax, [rtl_chip_info + ecx*8] |
2387 | hidnplayr | 596 | jne @b |
597 | mov [tpc.chipset], ecx |
||
598 | jmp .match |
||
1554 | hidnplayr | 599 | @@: |
2387 | hidnplayr | 600 | ; if unknown chip, assume array element #0, original RTL-8169 in this case |
601 | DEBUGF 1,"init_board: PCI device: unknown chip version, assuming RTL-8169\n" |
||
602 | set_io REG_TxConfig |
||
603 | in eax, dx |
||
604 | DEBUGF 1,"init_board: PCI device: TxConfig = 0x%x\n", eax |
||
1554 | hidnplayr | 605 | |
2387 | hidnplayr | 606 | mov [tpc.chipset], 0 |
1554 | hidnplayr | 607 | |
2387 | hidnplayr | 608 | xor eax, eax |
609 | inc eax |
||
610 | ret |
||
1554 | hidnplayr | 611 | |
612 | .match: |
||
2387 | hidnplayr | 613 | DEBUGF 1,"init_board: chipset=%u\n", ecx |
614 | xor eax,eax |
||
615 | ret |
||
1554 | hidnplayr | 616 | |
617 | |||
618 | |||
619 | ;*************************************************************************** |
||
620 | ; Function |
||
621 | ; probe |
||
622 | ; Description |
||
623 | ; Searches for an ethernet card, enables it and clears the rx buffer |
||
624 | ; If a card was found, it enables the ethernet -> TCPIP link |
||
625 | ; Destroyed registers |
||
626 | ; eax, ebx, ecx, edx |
||
627 | ; |
||
628 | ;*************************************************************************** |
||
629 | align 4 |
||
630 | probe: |
||
631 | |||
2387 | hidnplayr | 632 | DEBUGF 1,"probe\n" |
1554 | hidnplayr | 633 | |
2387 | hidnplayr | 634 | call init_board |
635 | call read_mac |
||
636 | call PHY_config |
||
1554 | hidnplayr | 637 | |
638 | ; DEBUGF 1,"K : Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
||
2387 | hidnplayr | 639 | set_io 0 |
640 | set_io 0x82 |
||
641 | mov al, 0x01 |
||
642 | out dx, al |
||
643 | cmp [tpc.mcfg], MCFG_METHOD_03 |
||
644 | jae @f |
||
1554 | hidnplayr | 645 | ; DEBUGF 1,"K : Set PCI Latency=0x40\n" |
646 | ; stdcall pci_write_config_byte,PCI_LATENCY_TIMER,0x40 |
||
647 | @@: |
||
2387 | hidnplayr | 648 | cmp [tpc.mcfg], MCFG_METHOD_02 |
649 | jne @f |
||
1554 | hidnplayr | 650 | ; DEBUGF 1,"K : Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
2387 | hidnplayr | 651 | set_io 0x82 |
652 | mov al, 0x01 |
||
653 | out dx, al |
||
1554 | hidnplayr | 654 | ; DEBUGF 1,"K : Set PHY Reg 0x0bh = 0x00h\n" |
2387 | hidnplayr | 655 | WRITE_GMII_REG 0x0b, 0x0000 ; w 0x0b 15 0 0 |
1554 | hidnplayr | 656 | @@: |
2387 | hidnplayr | 657 | ; if TBI is not enabled |
658 | set_io 0 |
||
659 | set_io REG_PHYstatus |
||
660 | in al, dx |
||
661 | test al, PHYS_TBI_Enable |
||
662 | jz .tbi_dis |
||
663 | READ_GMII_REG PHY_AUTO_NEGO_REG |
||
1554 | hidnplayr | 664 | |
2387 | hidnplayr | 665 | ; enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged |
666 | and eax, 0x0C1F |
||
667 | or eax, PHY_Cap_10_Half or PHY_Cap_10_Full or PHY_Cap_100_Half or PHY_Cap_100_Full |
||
668 | WRITE_GMII_REG PHY_AUTO_NEGO_REG, ax |
||
1554 | hidnplayr | 669 | |
2387 | hidnplayr | 670 | ; enable 1000 Full Mode |
671 | WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168 |
||
1554 | hidnplayr | 672 | |
2387 | hidnplayr | 673 | ; Enable auto-negotiation and restart auto-nigotiation |
674 | WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego |
||
1554 | hidnplayr | 675 | |
2387 | hidnplayr | 676 | udelay 100 |
677 | mov ecx, 10000 |
||
678 | ; wait for auto-negotiation process |
||
679 | @@: dec ecx |
||
680 | jz @f |
||
681 | set_io 0 |
||
682 | READ_GMII_REG PHY_STAT_REG |
||
683 | udelay 100 |
||
684 | test eax, PHY_Auto_Neco_Comp |
||
685 | jz @b |
||
686 | set_io REG_PHYstatus |
||
687 | in al, dx |
||
688 | jmp @f |
||
1554 | hidnplayr | 689 | .tbi_dis: |
2387 | hidnplayr | 690 | udelay 100 |
1554 | hidnplayr | 691 | @@: |
692 | |||
693 | |||
694 | ;*************************************************************************** |
||
695 | ; Function |
||
696 | ; rt8169_reset |
||
697 | ; Description |
||
698 | ; Place the chip (ie, the ethernet card) into a virgin state |
||
699 | ; Destroyed registers |
||
700 | ; eax, ebx, ecx, edx |
||
701 | ; |
||
702 | ;*************************************************************************** |
||
703 | align 4 |
||
704 | reset: |
||
705 | |||
2387 | hidnplayr | 706 | DEBUGF 1,"reset\n" |
1554 | hidnplayr | 707 | |
2916 | hidnplayr | 708 | lea eax, [device.tx_ring] |
2387 | hidnplayr | 709 | mov [tpc.TxDescArrays], eax |
710 | mov [tpc.TxDescArray], eax |
||
1554 | hidnplayr | 711 | |
2916 | hidnplayr | 712 | lea eax, [device.rx_ring] |
2387 | hidnplayr | 713 | mov [tpc.RxDescArrays], eax |
714 | mov [tpc.RxDescArray], eax |
||
1554 | hidnplayr | 715 | |
2387 | hidnplayr | 716 | call init_ring |
717 | call hw_start |
||
1554 | hidnplayr | 718 | |
1558 | hidnplayr | 719 | ; clear packet/byte counters |
720 | |||
2387 | hidnplayr | 721 | xor eax, eax |
722 | lea edi, [device.bytes_tx] |
||
723 | mov ecx, 6 |
||
724 | rep stosd |
||
1558 | hidnplayr | 725 | |
2387 | hidnplayr | 726 | mov [device.mtu], 1500 |
1554 | hidnplayr | 727 | |
2387 | hidnplayr | 728 | xor eax, eax |
729 | ret |
||
1554 | hidnplayr | 730 | |
731 | |||
732 | |||
733 | |||
734 | |||
735 | align 4 |
||
736 | PHY_config: |
||
737 | |||
2387 | hidnplayr | 738 | DEBUGF 1,"hw_PHY_config: priv.mcfg=%d, priv.pcfg=%d\n",[tpc.mcfg],[tpc.pcfg] |
1554 | hidnplayr | 739 | |
2387 | hidnplayr | 740 | cmp [tpc.mcfg], MCFG_METHOD_04 |
741 | jne .not_4 |
||
742 | set_io 0 |
||
1554 | hidnplayr | 743 | ; WRITE_GMII_REG 0x1F, 0x0001 |
744 | ; WRITE_GMII_REG 0x1b, 0x841e |
||
745 | ; WRITE_GMII_REG 0x0e, 0x7bfb |
||
746 | ; WRITE_GMII_REG 0x09, 0x273a |
||
2387 | hidnplayr | 747 | WRITE_GMII_REG 0x1F, 0x0002 |
748 | WRITE_GMII_REG 0x01, 0x90D0 |
||
749 | WRITE_GMII_REG 0x1F, 0x0000 |
||
750 | jmp .exit |
||
1554 | hidnplayr | 751 | .not_4: |
2387 | hidnplayr | 752 | cmp [tpc.mcfg], MCFG_METHOD_02 |
753 | je @f |
||
754 | cmp [tpc.mcfg], MCFG_METHOD_03 |
||
755 | jne .not_2_or_3 |
||
1557 | hidnplayr | 756 | @@: |
2387 | hidnplayr | 757 | set_io 0 |
758 | WRITE_GMII_REG 0x1F, 0x0001 |
||
759 | WRITE_GMII_REG 0x15, 0x1000 |
||
760 | WRITE_GMII_REG 0x18, 0x65C7 |
||
761 | WRITE_GMII_REG 0x04, 0x0000 |
||
762 | WRITE_GMII_REG 0x03, 0x00A1 |
||
763 | WRITE_GMII_REG 0x02, 0x0008 |
||
764 | WRITE_GMII_REG 0x01, 0x1020 |
||
765 | WRITE_GMII_REG 0x00, 0x1000 |
||
766 | WRITE_GMII_REG 0x04, 0x0800 |
||
767 | WRITE_GMII_REG 0x04, 0x0000 |
||
768 | WRITE_GMII_REG 0x04, 0x7000 |
||
769 | WRITE_GMII_REG 0x03, 0xFF41 |
||
770 | WRITE_GMII_REG 0x02, 0xDE60 |
||
771 | WRITE_GMII_REG 0x01, 0x0140 |
||
772 | WRITE_GMII_REG 0x00, 0x0077 |
||
773 | WRITE_GMII_REG 0x04, 0x7800 |
||
774 | WRITE_GMII_REG 0x04, 0x7000 |
||
775 | WRITE_GMII_REG 0x04, 0xA000 |
||
776 | WRITE_GMII_REG 0x03, 0xDF01 |
||
777 | WRITE_GMII_REG 0x02, 0xDF20 |
||
778 | WRITE_GMII_REG 0x01, 0xFF95 |
||
779 | WRITE_GMII_REG 0x00, 0xFA00 |
||
780 | WRITE_GMII_REG 0x04, 0xA800 |
||
781 | WRITE_GMII_REG 0x04, 0xA000 |
||
782 | WRITE_GMII_REG 0x04, 0xB000 |
||
783 | WRITE_GMII_REG 0x03, 0xFF41 |
||
784 | WRITE_GMII_REG 0x02, 0xDE20 |
||
785 | WRITE_GMII_REG 0x01, 0x0140 |
||
786 | WRITE_GMII_REG 0x00, 0x00BB |
||
787 | WRITE_GMII_REG 0x04, 0xB800 |
||
788 | WRITE_GMII_REG 0x04, 0xB000 |
||
789 | WRITE_GMII_REG 0x04, 0xF000 |
||
790 | WRITE_GMII_REG 0x03, 0xDF01 |
||
791 | WRITE_GMII_REG 0x02, 0xDF20 |
||
792 | WRITE_GMII_REG 0x01, 0xFF95 |
||
793 | WRITE_GMII_REG 0x00, 0xBF00 |
||
794 | WRITE_GMII_REG 0x04, 0xF800 |
||
795 | WRITE_GMII_REG 0x04, 0xF000 |
||
796 | WRITE_GMII_REG 0x04, 0x0000 |
||
797 | WRITE_GMII_REG 0x1F, 0x0000 |
||
798 | WRITE_GMII_REG 0x0B, 0x0000 |
||
799 | jmp .exit |
||
1554 | hidnplayr | 800 | .not_2_or_3: |
2387 | hidnplayr | 801 | DEBUGF 1,"tpc.mcfg=%d, discard hw PHY config\n", [tpc.mcfg] |
1554 | hidnplayr | 802 | .exit: |
2387 | hidnplayr | 803 | ret |
1554 | hidnplayr | 804 | |
805 | |||
806 | |||
807 | align 4 |
||
808 | set_rx_mode: |
||
809 | |||
2387 | hidnplayr | 810 | DEBUGF 1,"set_rx_mode\n" |
1554 | hidnplayr | 811 | |
2387 | hidnplayr | 812 | ; IFF_ALLMULTI |
813 | ; Too many to filter perfectly -- accept all multicasts |
||
814 | set_io 0 |
||
815 | set_io REG_RxConfig |
||
816 | in eax, dx |
||
817 | mov ecx, [tpc.chipset] |
||
818 | and eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask |
||
819 | or eax, rx_config or (RXM_AcceptBroadcast or RXM_AcceptMulticast or RXM_AcceptMyPhys) |
||
820 | out dx, eax |
||
1554 | hidnplayr | 821 | |
2387 | hidnplayr | 822 | ; Multicast hash filter |
823 | set_io REG_MAR0 + 0 |
||
824 | or eax, -1 |
||
825 | out dx, eax |
||
826 | set_io REG_MAR0 + 4 |
||
827 | out dx, eax |
||
1554 | hidnplayr | 828 | |
2387 | hidnplayr | 829 | ret |
1554 | hidnplayr | 830 | |
831 | |||
832 | align 4 |
||
833 | init_ring: |
||
834 | |||
2387 | hidnplayr | 835 | DEBUGF 1,"init_ring\n" |
1554 | hidnplayr | 836 | |
2387 | hidnplayr | 837 | xor eax, eax |
838 | mov [tpc.cur_rx], eax |
||
839 | mov [tpc.cur_tx], eax |
||
1554 | hidnplayr | 840 | |
2916 | hidnplayr | 841 | lea edi, [device.tx_ring] |
2387 | hidnplayr | 842 | mov ecx, (NUM_TX_DESC * tx_desc.size) / 4 |
843 | rep stosd |
||
1554 | hidnplayr | 844 | |
2916 | hidnplayr | 845 | lea edi, [device.rx_ring] |
2387 | hidnplayr | 846 | mov ecx, (NUM_RX_DESC * rx_desc.size) / 4 |
847 | rep stosd |
||
1554 | hidnplayr | 848 | |
2387 | hidnplayr | 849 | mov edi, [tpc.RxDescArray] |
850 | mov ecx, NUM_RX_DESC |
||
1557 | hidnplayr | 851 | .loop: |
2387 | hidnplayr | 852 | push ecx |
853 | stdcall KernelAlloc, RX_BUF_SIZE |
||
854 | mov [edi + rx_desc.buf_soft_addr], eax |
||
855 | call GetPgAddr |
||
856 | mov dword [edi + rx_desc.buf_addr], eax |
||
857 | mov [edi + rx_desc.status], DSB_OWNbit or RX_BUF_SIZE |
||
858 | add edi, rx_desc.size |
||
859 | pop ecx |
||
860 | loop .loop |
||
861 | or [edi - rx_desc.size + rx_desc.status], DSB_EORbit |
||
1554 | hidnplayr | 862 | |
2387 | hidnplayr | 863 | ret |
1554 | hidnplayr | 864 | |
865 | |||
866 | align 4 |
||
867 | hw_start: |
||
868 | |||
2387 | hidnplayr | 869 | DEBUGF 1,"hw_start\n" |
1554 | hidnplayr | 870 | |
1556 | hidnplayr | 871 | ; attach int handler |
2387 | hidnplayr | 872 | movzx eax, [device.irq_line] |
873 | DEBUGF 1,"Attaching int handler to irq %x\n", eax:1 |
||
874 | stdcall AttachIntHandler, eax, int_handler, dword 0 |
||
1556 | hidnplayr | 875 | |
2387 | hidnplayr | 876 | ; Soft reset the chip |
877 | set_io 0 |
||
878 | set_io REG_ChipCmd |
||
879 | mov al, CMD_Reset |
||
880 | out dx, al |
||
1554 | hidnplayr | 881 | |
2916 | hidnplayr | 882 | DEBUGF 1,"Waiting for chip to reset... " |
2387 | hidnplayr | 883 | ; Check that the chip has finished the reset |
884 | mov ecx, 1000 |
||
885 | set_io REG_ChipCmd |
||
886 | @@: in al, dx |
||
887 | test al, CMD_Reset |
||
888 | jz @f |
||
889 | udelay 10 |
||
890 | loop @b |
||
1554 | hidnplayr | 891 | @@: |
2916 | hidnplayr | 892 | DEBUGF 1,"done!\n" |
1554 | hidnplayr | 893 | |
2387 | hidnplayr | 894 | set_io REG_Cfg9346 |
895 | mov al, CFG_9346_Unlock |
||
896 | out dx, al |
||
1554 | hidnplayr | 897 | |
2387 | hidnplayr | 898 | set_io REG_ChipCmd |
899 | mov al, CMD_TxEnb or CMD_RxEnb |
||
900 | out dx, al |
||
1554 | hidnplayr | 901 | |
2387 | hidnplayr | 902 | set_io REG_ETThReg |
903 | mov al, ETTh |
||
904 | out dx, al |
||
1554 | hidnplayr | 905 | |
2387 | hidnplayr | 906 | ; For gigabit rtl8169 |
907 | set_io REG_RxMaxSize |
||
908 | mov ax, RxPacketMaxSize |
||
909 | out dx, ax |
||
1554 | hidnplayr | 910 | |
2387 | hidnplayr | 911 | ; Set Rx Config register |
912 | set_io REG_RxConfig |
||
913 | in ax, dx |
||
914 | mov ecx, [tpc.chipset] |
||
915 | and eax, [rtl_chip_info + ecx * 8 + 4] ; RxConfigMask |
||
916 | or eax, rx_config |
||
917 | out dx, eax |
||
1554 | hidnplayr | 918 | |
2387 | hidnplayr | 919 | ; Set DMA burst size and Interframe Gap Time |
920 | set_io REG_TxConfig |
||
921 | mov eax, (TX_DMA_BURST shl TXC_DMAShift) or (InterFrameGap shl TXC_InterFrameGapShift) |
||
922 | out dx, eax |
||
1554 | hidnplayr | 923 | |
2387 | hidnplayr | 924 | set_io REG_CPlusCmd |
925 | in ax, dx |
||
926 | out dx, ax |
||
1554 | hidnplayr | 927 | |
2387 | hidnplayr | 928 | in ax, dx |
929 | or ax, 1 shl 3 |
||
930 | cmp [tpc.mcfg], MCFG_METHOD_02 |
||
931 | jne @f |
||
932 | cmp [tpc.mcfg], MCFG_METHOD_03 |
||
933 | jne @f |
||
934 | or ax,1 shl 14 |
||
935 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n" |
||
936 | jmp .set |
||
1554 | hidnplayr | 937 | @@: |
2387 | hidnplayr | 938 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3\n" |
1554 | hidnplayr | 939 | .set: |
2387 | hidnplayr | 940 | set_io REG_CPlusCmd |
941 | out dx, ax |
||
1554 | hidnplayr | 942 | |
2387 | hidnplayr | 943 | set_io 0xE2 |
1554 | hidnplayr | 944 | ; mov ax, 0x1517 |
945 | ; out dx, ax |
||
946 | ; mov ax, 0x152a |
||
947 | ; out dx, ax |
||
948 | ; mov ax, 0x282a |
||
949 | ; out dx, ax |
||
2387 | hidnplayr | 950 | xor ax, ax |
951 | out dx, ax |
||
1554 | hidnplayr | 952 | |
2387 | hidnplayr | 953 | xor eax, eax |
954 | mov [tpc.cur_rx], eax |
||
2916 | hidnplayr | 955 | lea eax, [device.tx_ring] |
2387 | hidnplayr | 956 | GetRealAddr |
957 | set_io REG_TxDescStartAddr |
||
958 | out dx, eax |
||
1554 | hidnplayr | 959 | |
2916 | hidnplayr | 960 | lea eax, [device.rx_ring] |
2387 | hidnplayr | 961 | GetRealAddr |
962 | set_io REG_RxDescStartAddr |
||
963 | out dx, eax |
||
1554 | hidnplayr | 964 | |
2387 | hidnplayr | 965 | set_io REG_Cfg9346 |
966 | mov al, CFG_9346_Lock |
||
967 | out dx, al |
||
1554 | hidnplayr | 968 | |
2387 | hidnplayr | 969 | udelay 10 |
1554 | hidnplayr | 970 | |
2387 | hidnplayr | 971 | xor eax, eax |
972 | set_io REG_RxMissed |
||
973 | out dx, eax |
||
1554 | hidnplayr | 974 | |
2387 | hidnplayr | 975 | call set_rx_mode |
1554 | hidnplayr | 976 | |
2387 | hidnplayr | 977 | set_io 0 |
978 | ; no early-rx interrupts |
||
979 | set_io REG_MultiIntr |
||
980 | in ax, dx |
||
981 | and ax, 0xF000 |
||
982 | out dx, ax |
||
1554 | hidnplayr | 983 | |
2387 | hidnplayr | 984 | ; set interrupt mask |
985 | set_io REG_IntrMask |
||
986 | mov ax, intr_mask |
||
987 | out dx, ax |
||
1554 | hidnplayr | 988 | |
2387 | hidnplayr | 989 | xor eax, eax |
990 | ret |
||
1554 | hidnplayr | 991 | |
992 | |||
993 | align 4 |
||
994 | read_mac: |
||
995 | |||
2387 | hidnplayr | 996 | set_io 0 |
997 | set_io REG_MAC0 |
||
998 | xor ecx, ecx |
||
999 | lea edi, [device.mac] |
||
2916 | hidnplayr | 1000 | mov ecx, 6 |
1554 | hidnplayr | 1001 | |
2387 | hidnplayr | 1002 | ; Get MAC address. FIXME: read EEPROM |
1003 | @@: in al, dx |
||
1004 | stosb |
||
1005 | inc edx |
||
1006 | loop @r |
||
1554 | hidnplayr | 1007 | |
2916 | hidnplayr | 1008 | DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n",\ |
1009 | [device.mac+0]:2,[device.mac+1]:2,[device.mac+2]:2,[device.mac+3]:2,[device.mac+4]:2,[device.mac+5]:2 |
||
1554 | hidnplayr | 1010 | |
2387 | hidnplayr | 1011 | ret |
1554 | hidnplayr | 1012 | |
1013 | align 4 |
||
1014 | write_mac: |
||
1015 | |||
2387 | hidnplayr | 1016 | ret 6 |
1554 | hidnplayr | 1017 | |
1018 | |||
1019 | |||
1020 | |||
1021 | |||
1022 | ;*************************************************************************** |
||
1023 | ; Function |
||
1024 | ; transmit |
||
1025 | ; Description |
||
1026 | ; Transmits a packet of data via the ethernet card |
||
1027 | ; |
||
1028 | ; Destroyed registers |
||
1029 | ; eax, edx, esi, edi |
||
1030 | ; |
||
1031 | ;*************************************************************************** |
||
1032 | align 4 |
||
1033 | transmit: |
||
1034 | |||
2387 | hidnplayr | 1035 | DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8] |
1036 | mov eax, [esp+4] |
||
1037 | DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
||
1038 | [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
||
1039 | [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
||
1040 | [eax+13]:2,[eax+12]:2 |
||
1554 | hidnplayr | 1041 | |
2387 | hidnplayr | 1042 | cmp dword [esp+8], MAX_ETH_FRAME_SIZE |
1043 | ja .fail |
||
1554 | hidnplayr | 1044 | |
1045 | ;---------------------------------- |
||
1046 | ; Find currentTX descriptor address |
||
1047 | |||
2387 | hidnplayr | 1048 | mov eax, tx_desc.size |
1049 | mul [tpc.cur_tx] |
||
2916 | hidnplayr | 1050 | lea esi, [eax + device.tx_ring] |
1554 | hidnplayr | 1051 | |
2387 | hidnplayr | 1052 | DEBUGF 1,"Using TX desc: %x\n", esi |
1823 | hidnplayr | 1053 | |
1554 | hidnplayr | 1054 | ;--------------------------- |
1055 | ; Program the packet pointer |
||
1056 | |||
2387 | hidnplayr | 1057 | mov eax, [esp + 4] |
1058 | mov [esi + tx_desc.buf_soft_addr], eax |
||
1059 | GetRealAddr |
||
1060 | mov dword [esi + tx_desc.buf_addr], eax |
||
1554 | hidnplayr | 1061 | |
1062 | ;------------------------ |
||
1063 | ; Program the packet size |
||
1064 | |||
2387 | hidnplayr | 1065 | mov eax, [esp + 8] |
1066 | @@: or eax, DSB_OWNbit or DSB_FSbit or DSB_LSbit |
||
1067 | cmp [tpc.cur_tx], NUM_TX_DESC - 1 |
||
1068 | jne @f |
||
1069 | or eax, DSB_EORbit |
||
1070 | @@: mov [esi + tx_desc.status], eax |
||
1554 | hidnplayr | 1071 | |
1558 | hidnplayr | 1072 | ;----------------------------------------- |
1073 | ; Set the polling bit (start transmission) |
||
1554 | hidnplayr | 1074 | |
2387 | hidnplayr | 1075 | set_io 0 |
1076 | set_io REG_TxPoll |
||
1077 | mov al, 0x40 ; set polling bit |
||
1078 | out dx, al |
||
1554 | hidnplayr | 1079 | |
1080 | ;----------------------- |
||
1081 | ; Update TX descriptor |
||
1082 | |||
2387 | hidnplayr | 1083 | inc [tpc.cur_tx] |
1084 | and [tpc.cur_tx], NUM_TX_DESC - 1 |
||
1558 | hidnplayr | 1085 | |
1086 | ;------------- |
||
1087 | ; Update stats |
||
1088 | |||
2387 | hidnplayr | 1089 | inc [device.packets_tx] |
2916 | hidnplayr | 1090 | mov eax, [esp + 8] |
2387 | hidnplayr | 1091 | add dword [device.bytes_tx], eax |
1092 | adc dword [device.bytes_tx + 4], 0 |
||
1558 | hidnplayr | 1093 | |
2387 | hidnplayr | 1094 | xor eax, eax |
1095 | ret 8 |
||
1554 | hidnplayr | 1096 | |
1097 | .fail: |
||
2387 | hidnplayr | 1098 | DEBUGF 1,"transmit failed\n" |
1099 | or eax, -1 |
||
1100 | stdcall KernelFree, [esp+4] |
||
1101 | ret 8 |
||
1554 | hidnplayr | 1102 | |
1103 | |||
1104 | ;;;DSB_OWNbit |
||
1105 | |||
1106 | |||
1107 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
1108 | ;; ;; |
||
1109 | ;; Interrupt handler ;; |
||
1110 | ;; ;; |
||
1111 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
1112 | |||
1113 | align 4 |
||
1114 | int_handler: |
||
1115 | |||
2935 | hidnplayr | 1116 | DEBUGF 1,"\n%s int\n", my_service |
1554 | hidnplayr | 1117 | |
1118 | ; find pointer of device wich made IRQ occur |
||
1119 | |||
2387 | hidnplayr | 1120 | mov ecx, [devices] |
1121 | test ecx, ecx |
||
2935 | hidnplayr | 1122 | jz .nothing |
2387 | hidnplayr | 1123 | mov esi, device_list |
1554 | hidnplayr | 1124 | .nextdevice: |
2935 | hidnplayr | 1125 | mov ebx, [esi] |
1554 | hidnplayr | 1126 | |
2387 | hidnplayr | 1127 | set_io 0 |
1128 | set_io REG_IntrStatus |
||
1129 | in ax, dx |
||
1130 | test ax, ax |
||
1131 | jnz .got_it |
||
1554 | hidnplayr | 1132 | .continue: |
2387 | hidnplayr | 1133 | add esi, 4 |
1134 | dec ecx |
||
1135 | jnz .nextdevice |
||
2935 | hidnplayr | 1136 | .nothing: |
2387 | hidnplayr | 1137 | ret ; If no device was found, abort (The irq was probably for a device, not registered to this driver) |
1554 | hidnplayr | 1138 | |
1139 | .got_it: |
||
1140 | |||
2935 | hidnplayr | 1141 | DEBUGF 1,"Device: %x Status: %x ", ebx, ax |
1142 | |||
2387 | hidnplayr | 1143 | cmp ax, 0xFFFF ; if so, hardware is no longer present |
1144 | je .fail |
||
1554 | hidnplayr | 1145 | |
1146 | ;-------- |
||
1147 | ; Receive |
||
1148 | |||
2387 | hidnplayr | 1149 | test ax, ISB_RxOK |
1150 | jz .no_rx |
||
1554 | hidnplayr | 1151 | |
2387 | hidnplayr | 1152 | push ax |
1153 | push ebx |
||
1554 | hidnplayr | 1154 | |
1559 | hidnplayr | 1155 | .check_more: |
2387 | hidnplayr | 1156 | pop ebx |
1157 | DEBUGF 1,"ebx = 0x%x\n", ebx |
||
1158 | mov eax, rx_desc.size |
||
1159 | mul [tpc.cur_rx] |
||
2916 | hidnplayr | 1160 | lea esi, [eax + device.rx_ring] |
1554 | hidnplayr | 1161 | |
2387 | hidnplayr | 1162 | DEBUGF 1,"RxDesc.status = 0x%x\n", [esi + rx_desc.status] |
1554 | hidnplayr | 1163 | |
2387 | hidnplayr | 1164 | mov eax, [esi + rx_desc.status] |
1165 | test eax, DSB_OWNbit ;;; |
||
1166 | jnz .rx_return |
||
1554 | hidnplayr | 1167 | |
2387 | hidnplayr | 1168 | DEBUGF 1,"tpc.cur_rx = %u\n", [tpc.cur_rx] |
1554 | hidnplayr | 1169 | |
2387 | hidnplayr | 1170 | test eax, SD_RxRES |
1171 | jnz .rx_return ;;;;; RX error! |
||
1554 | hidnplayr | 1172 | |
2387 | hidnplayr | 1173 | push ebx |
1174 | push .check_more |
||
1175 | and eax, 0x00001FFF |
||
1176 | add eax, -4 ; we dont need CRC |
||
1177 | push eax |
||
1178 | DEBUGF 1,"data length = %u\n", ax |
||
1554 | hidnplayr | 1179 | |
1558 | hidnplayr | 1180 | ;------------- |
1181 | ; Update stats |
||
1559 | hidnplayr | 1182 | |
2387 | hidnplayr | 1183 | add dword [device.bytes_rx], eax |
1184 | adc dword [device.bytes_rx + 4], 0 |
||
1185 | inc dword [device.packets_rx] |
||
1558 | hidnplayr | 1186 | |
2387 | hidnplayr | 1187 | push [esi + rx_desc.buf_soft_addr] |
1554 | hidnplayr | 1188 | |
1557 | hidnplayr | 1189 | ;---------------------- |
1190 | ; Allocate a new buffer |
||
1191 | |||
2387 | hidnplayr | 1192 | stdcall KernelAlloc, RX_BUF_SIZE |
1193 | mov [esi + rx_desc.buf_soft_addr], eax |
||
1194 | GetRealAddr |
||
1195 | mov dword [esi + rx_desc.buf_addr], eax |
||
1557 | hidnplayr | 1196 | |
1554 | hidnplayr | 1197 | ;--------------- |
1198 | ; re set OWN bit |
||
1199 | |||
2387 | hidnplayr | 1200 | mov eax, DSB_OWNbit or RX_BUF_SIZE |
1201 | cmp [tpc.cur_rx], NUM_RX_DESC - 1 |
||
1202 | jne @f |
||
1203 | or eax, DSB_EORbit |
||
1204 | @@: mov [esi + rx_desc.status], eax |
||
1554 | hidnplayr | 1205 | |
1206 | ;-------------- |
||
1207 | ; Update rx ptr |
||
1208 | |||
2387 | hidnplayr | 1209 | inc [tpc.cur_rx] |
1210 | and [tpc.cur_rx], NUM_RX_DESC - 1 |
||
1554 | hidnplayr | 1211 | |
2981 | hidnplayr | 1212 | jmp Eth_input |
1554 | hidnplayr | 1213 | .rx_return: |
1214 | |||
2387 | hidnplayr | 1215 | pop ax |
1554 | hidnplayr | 1216 | .no_rx: |
1217 | |||
1218 | ;--------- |
||
1219 | ; Transmit |
||
1220 | |||
2387 | hidnplayr | 1221 | test ax, ISB_TxOK |
1222 | jz .no_tx |
||
1223 | push ax |
||
1554 | hidnplayr | 1224 | |
2387 | hidnplayr | 1225 | DEBUGF 1,"TX ok!\n" |
1554 | hidnplayr | 1226 | |
2387 | hidnplayr | 1227 | mov ecx, NUM_TX_DESC |
2916 | hidnplayr | 1228 | lea esi, [device.tx_ring] |
1558 | hidnplayr | 1229 | .txloop: |
2916 | hidnplayr | 1230 | cmp [esi + tx_desc.buf_soft_addr], 0 |
2387 | hidnplayr | 1231 | jz .maybenext |
1558 | hidnplayr | 1232 | |
2916 | hidnplayr | 1233 | test [esi + tx_desc.status], DSB_OWNbit |
2387 | hidnplayr | 1234 | jnz .maybenext |
1558 | hidnplayr | 1235 | |
2387 | hidnplayr | 1236 | push ecx |
1237 | DEBUGF 1,"Freeing up TX desc: %x\n", esi |
||
2916 | hidnplayr | 1238 | stdcall KernelFree, [esi + tx_desc.buf_soft_addr] |
2387 | hidnplayr | 1239 | pop ecx |
2916 | hidnplayr | 1240 | and [esi + tx_desc.buf_soft_addr], 0 |
1558 | hidnplayr | 1241 | |
1242 | .maybenext: |
||
2387 | hidnplayr | 1243 | add esi, tx_desc.size |
1244 | dec ecx |
||
1245 | jnz .txloop |
||
1558 | hidnplayr | 1246 | |
2387 | hidnplayr | 1247 | pop ax |
1554 | hidnplayr | 1248 | .no_tx: |
1249 | |||
1250 | ;------- |
||
1251 | ; Finish |
||
1252 | |||
2387 | hidnplayr | 1253 | set_io 0 |
1254 | set_io REG_IntrStatus |
||
1255 | out dx, ax ; ACK all interrupts |
||
1554 | hidnplayr | 1256 | |
1257 | .fail: |
||
2387 | hidnplayr | 1258 | ret |
1554 | hidnplayr | 1259 | |
1260 | |||
1261 | |||
1262 | |||
1263 | |||
1264 | |||
1265 | |||
1266 | |||
1267 | |||
1268 | ; End of code |
||
2387 | hidnplayr | 1269 | align 4 ; Place all initialised data here |
1554 | hidnplayr | 1270 | |
1271 | devices dd 0 |
||
1272 | version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF) |
||
2387 | hidnplayr | 1273 | my_service db 'RTL8169',0 ; max 16 chars include zero |
1554 | hidnplayr | 1274 | |
2387 | hidnplayr | 1275 | include_debug_strings ; All data wich FDO uses will be included here |
1554 | hidnplayr | 1276 | |
1277 | rtl_chip_info dd \ |
||
1278 | MCFG_METHOD_01, 0xff7e1880, \ ; RTL8169 |
||
1279 | MCFG_METHOD_02, 0xff7e1880, \ ; RTL8169s/8110s |
||
1280 | MCFG_METHOD_03, 0xff7e1880, \ ; RTL8169s/8110s |
||
1281 | MCFG_METHOD_04, 0xff7e1880, \ ; RTL8169sb/8110sb |
||
1282 | MCFG_METHOD_05, 0xff7e1880, \ ; RTL8169sc/8110sc |
||
1283 | MCFG_METHOD_11, 0xff7e1880, \ ; RTL8168b/8111b // PCI-E |
||
1284 | MCFG_METHOD_12, 0xff7e1880, \ ; RTL8168b/8111b // PCI-E |
||
1285 | MCFG_METHOD_13, 0xff7e1880, \ ; RTL8101e // PCI-E 8139 |
||
1286 | MCFG_METHOD_14, 0xff7e1880, \ ; RTL8100e // PCI-E 8139 |
||
2387 | hidnplayr | 1287 | MCFG_METHOD_15, 0xff7e1880 ; RTL8100e // PCI-E 8139 |
1554 | hidnplayr | 1288 | |
1289 | mac_info dd \ |
||
1290 | 0x38800000, MCFG_METHOD_15, \ |
||
1291 | 0x38000000, MCFG_METHOD_12, \ |
||
1292 | 0x34000000, MCFG_METHOD_13, \ |
||
1293 | 0x30800000, MCFG_METHOD_14, \ |
||
1294 | 0x30000000, MCFG_METHOD_11, \ |
||
1295 | 0x18000000, MCFG_METHOD_05, \ |
||
1296 | 0x10000000, MCFG_METHOD_04, \ |
||
1297 | 0x04000000, MCFG_METHOD_03, \ |
||
1298 | 0x00800000, MCFG_METHOD_02, \ |
||
2387 | hidnplayr | 1299 | 0x00000000, MCFG_METHOD_01 ; catch-all |
1554 | hidnplayr | 1300 | |
2387 | hidnplayr | 1301 | name_01 db "RTL8169", 0 |
1302 | name_02_03 db "RTL8169s/8110s", 0 |
||
1303 | name_04 db "RTL8169sb/8110sb", 0 |
||
1304 | name_05 db "RTL8169sc/8110sc", 0 |
||
1305 | name_11_12 db "RTL8168b/8111b", 0 ; PCI-E |
||
1306 | name_13 db "RTL8101e", 0 ; PCI-E 8139 |
||
1307 | name_14_15 db "RTL8100e", 0 ; PCI-E 8139 |
||
1558 | hidnplayr | 1308 | |
1309 | |||
1554 | hidnplayr | 1310 | section '.data' data readable writable align 16 ; place all uninitialized data place here |
1311 | |||
2387 | hidnplayr | 1312 | device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling |
1554 | hidnplayr | 1313 |