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Rev | Author | Line No. | Line |
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9020 | rgimad | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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3 | ;; Copyright (C) KolibriOS team 2004-2021. All rights reserved. ;; |
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4 | ;; Distributed under terms of the GNU General Public License ;; |
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5 | ;; ;; |
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6 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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7 | |||
8 | $Revision$ |
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9 | |||
10 | PCI_REG_STATUS_COMMAND = 0x0004 |
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11 | PCI_REG_BAR5 = 0x0024 |
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12 | |||
9134 | rgimad | 13 | ; different SATA device signatures |
14 | SATA_SIG_ATA = 0x00000101 ; SATA drive |
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15 | SATA_SIG_ATAPI = 0xEB140101 ; SATAPI drive |
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16 | SATA_SIG_SEMB = 0xC33C0101 ; Enclosure management bridge |
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17 | SATA_SIG_PM = 0x96690101 ; Port multiplier |
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18 | |||
19 | ; Device type constants |
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20 | AHCI_DEV_NULL = 0 |
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21 | AHCI_DEV_SATA = 1 |
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22 | AHCI_DEV_SEMB = 2 |
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23 | AHCI_DEV_PM = 3 |
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24 | AHCI_DEV_SATAPI = 4 |
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25 | |||
26 | ; ATA commands |
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27 | ATA_IDENTIFY = 0xEC |
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28 | |||
29 | ; ATAPI commands |
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30 | ATAPI_IDENTIFY = 0xA1 |
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31 | |||
9023 | rgimad | 32 | ; bit_ prefix means that its index of bit |
33 | ; format: bit_AHCI_STR_REG_BIT |
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34 | bit_AHCI_HBA_CAP2_BOH = 0 ; Supports BIOS/OS Handoff |
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9020 | rgimad | 35 | |
9023 | rgimad | 36 | bit_AHCI_HBA_BOHC_BOS = 0 ; BIOS-Owned Semaphore (BIOS owns controller) |
37 | bit_AHCI_HBA_BOHC_OOS = 1 ; OS-Owned Semaphore (OS owns controller) |
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38 | bit_AHCI_HBA_BOHC_BB = 4 ; BIOS Busy (polling bit while BIOS cleans up |
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9020 | rgimad | 39 | |
9023 | rgimad | 40 | bit_AHCI_HBA_GHC_AHCI_ENABLE = 31 ; Enable AHCI mode |
41 | bit_AHCI_HBA_GHC_RESET = 0 ; Reset HBA |
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42 | bit_AHCI_HBA_GHC_INTERRUPT_ENABLE = 1 ; Enable interrupts from the HBA |
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43 | |||
9065 | rgimad | 44 | bit_AHCI_HBA_PxCMD_ST = 0 |
45 | bit_AHCI_HBA_PxCMD_FRE = 4 |
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46 | bit_AHCI_HBA_PxCMD_FR = 14 |
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47 | bit_AHCI_HBA_PxCMD_CR = 15 |
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48 | |||
9130 | rgimad | 49 | AHCI_HBA_PxCMD_ST = 1 shl 0 |
50 | AHCI_HBA_PxCMD_FRE = 1 shl 4 |
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51 | AHCI_HBA_PxCMD_FR = 1 shl 14 |
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52 | AHCI_HBA_PxCMD_CR = 1 shl 15 |
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53 | |||
9074 | rgimad | 54 | bit_AHCI_H2D_FLAG_CMD = 7 |
55 | |||
9037 | rgimad | 56 | AHCI_HBA_PxSSTS_DET = 0xF |
57 | AHCI_HBA_PORT_IPM_ACTIVE = 1 |
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58 | AHCI_HBA_PxSSTS_DET_PRESENT = 3 |
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59 | |||
9023 | rgimad | 60 | AHCI_MAX_PORTS = 32 ; |
9064 | rgimad | 61 | ;HBA_MEMORY_SIZE = 0x1100 |
9020 | rgimad | 62 | |
9064 | rgimad | 63 | ; Frame Information Structure Types |
64 | FIS_TYPE_REG_H2D = 0x27 ; Register FIS - host to device |
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65 | FIS_TYPE_REG_D2H = 0x34 ; Register FIS - device to host |
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66 | FIS_TYPE_DMA_ACT = 0x39 ; DMA activate FIS - device to host |
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67 | FIS_TYPE_DMA_SETUP = 0x41 ; DMA setup FIS - bidirectional |
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68 | FIS_TYPE_DATA = 0x46 ; Data FIS - bidirectional |
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69 | FIS_TYPE_BIST = 0x58 ; BIST activate FIS - bidirectional |
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70 | FIS_TYPE_PIO_SETUP = 0x5F ; PIO setup FIS - device to host |
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71 | FIS_TYPE_DEV_BITS = 0xA1 ; Set device bits FIS - device to host |
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72 | |||
9020 | rgimad | 73 | struct AHCI_DATA |
74 | abar dd ? ; pointer to HBA Memory (BAR5) mapped to virtual kernelspace memory |
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75 | pcidev dd ? ; pointer to corresponding PCIDEV structure |
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76 | ends |
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77 | |||
78 | ; Generic Host Control registers |
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79 | struct HBA_MEM |
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9064 | rgimad | 80 | cap dd ? ; 0x00, Host capabilities |
81 | ghc dd ? ; 0x04, Global host control |
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82 | is dd ? ; 0x08, Interrupt status |
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83 | pi dd ? ; 0x0C, Port implemented |
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84 | version dd ? ; 0x10, Version |
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9020 | rgimad | 85 | ccc_ctl dd ? ; 0x14, Command completion coalescing control |
86 | ccc_pts dd ? ; 0x18, Command completion coalescing ports |
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87 | em_loc dd ? ; 0x1C, Enclosure management location |
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88 | em_ctl dd ? ; 0x20, Enclosure management control |
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9064 | rgimad | 89 | cap2 dd ? ; 0x24, Host capabilities extended |
9020 | rgimad | 90 | bohc dd ? ; 0x28, BIOS/OS handoff control and status |
9072 | rgimad | 91 | reserved rb (0xA0-HBA_MEM.reserved) ; 0x2C - 0x9F, Reserved |
92 | vendor rb (0x100-HBA_MEM.vendor) ; 0xA0 - 0xFF, Vendor specific |
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9023 | rgimad | 93 | ports rb (sizeof.HBA_PORT*AHCI_MAX_PORTS) ; 0x100 - 0x10FF, Port control registers, max AHCI_MAX_PORTS |
9020 | rgimad | 94 | ends |
95 | |||
96 | ; Port Control registers |
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97 | struct HBA_PORT |
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9064 | rgimad | 98 | command_list_base_l dd ? ; 0x00, command list base address, 1K-byte aligned |
99 | command_list_base_h dd ? ; 0x04, command list base address upper 32 bits, used on 64 bit systems |
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100 | fis_base_l dd ? ; 0x08, FIS base address, 256-byte aligned |
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101 | fis_base_h dd ? ; 0x0C, FIS base address upper 32 bits, used on 64 bit systems |
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102 | interrupt_status dd ? ; 0x10 |
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103 | interrupt_enable dd ? ; 0x14 |
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104 | command dd ? ; 0x18, command and status |
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105 | reserved0 dd ? ; 0x1C |
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106 | task_file_data dd ? ; 0x20 |
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107 | signature dd ? ; 0x24 |
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108 | sata_status dd ? ; 0x28, SATA status (SCR0:SStatus) |
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109 | sata_control dd ? ; 0x2C, SATA control (SCR2:SControl) |
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110 | sata_error dd ? ; 0x30, SATA error (SCR1:SError) |
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111 | sata_active dd ? ; 0x34, SATA active (SCR3:SActive) |
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112 | command_issue dd ? ; 0x38 |
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113 | sata_notification dd ? ; 0x3C, SATA notification (SCR4:SNotification) |
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114 | fis_based_switch_control dd ? ; 0x40 |
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115 | reserved1 rd 11 ; 0x44 - 0x6F |
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116 | vendor rd 4 ; 0x70 - 0x7F, vendor specific |
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9020 | rgimad | 117 | ends |
118 | |||
9074 | rgimad | 119 | ; Command header structure, size = 32 bytes |
9068 | rgimad | 120 | struct HBA_CMD_HDR |
9131 | rgimad | 121 | flags1 db ? ; 0bPWACCCCC, P - Prefetchable, W - Write (1: H2D, 0: D2H) |
9068 | rgimad | 122 | ; A - ATAPI, C - Command FIS length in DWORDS, 2 ~ 16 |
123 | |||
9131 | rgimad | 124 | flags2 db ? ; 0bPPPPRCB(Re), P - Port multiplier port, R - Reserved, |
9068 | rgimad | 125 | ; C - Clear busy upon R_OK, B - BIST, Re - Reset |
126 | |||
127 | prdtl dw ? ; Physical region descriptor table length in entries |
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128 | prdbc dd ? ; Physical region descriptor byte count transferred |
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129 | ctba dd ? ; Command table descriptor base address |
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130 | ctbau dd ? ; Command table descriptor base address upper 32 bits |
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9072 | rgimad | 131 | rd 4 ; Reserved |
9068 | rgimad | 132 | ends |
133 | |||
9074 | rgimad | 134 | ; Physical region descriptor table entry, size = 16 bytes |
9069 | rgimad | 135 | struct HBA_PRDT_ENTRY |
136 | dba dd ? ; Data base address |
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137 | dbau dd ? ; Data base address upper 32 bits |
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9072 | rgimad | 138 | dd ? ; Reserved |
9131 | rgimad | 139 | flags dd ? ; 0bIR..RD..D, I (1 bit) - Interrupt on completion, |
9069 | rgimad | 140 | ; R (9 bits) - Reserved, D (22 bits) - Byte count, 4M max |
141 | ends |
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142 | |||
143 | struct HBA_CMD_TBL |
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144 | cfis rb 64 ; 0x00, Command FIS |
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145 | acmd rb 16 ; 0x40, ATAPI command, 12 or 16 bytes |
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9072 | rgimad | 146 | rb 48 ; 0x50, Reserved |
9069 | rgimad | 147 | prdt_entry HBA_PRDT_ENTRY ; 0x80, Physical region descriptor table entries, 0 ~ 65535 |
148 | ; so, this structure is variable-length |
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149 | ends |
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150 | |||
9068 | rgimad | 151 | ; Contains virtual mappings for port phys memory regions |
152 | struct PORT_DATA |
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153 | clb dd ? ; Command list base |
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154 | fb dd ? ; FIS base |
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155 | ctba_arr rd 32 ; ctba_arr[0] = clb[0].ctba, ... and so on. |
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156 | port dd ? ; address of correspoding HBA_PORT structure |
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9074 | rgimad | 157 | portno dd ? ; port index, 0..31 |
9134 | rgimad | 158 | drive_type db ? ; drive type |
9068 | rgimad | 159 | ends |
160 | |||
9064 | rgimad | 161 | ; Register FIS – Host to Device |
162 | struct FIS_REG_H2D |
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163 | fis_type db ? ; FIS_TYPE_REG_H2D |
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9131 | rgimad | 164 | flags db ? ; 0bCRRRPPPP, C - 1: Command, 0: Control |
9064 | rgimad | 165 | ; R - Reserved, P - Port multiplier |
166 | |||
167 | command db ? ; Command register |
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168 | featurel db ? ; Feature register, 7:0 |
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169 | |||
170 | lba0 db ? ; LBA low register, 7:0 |
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171 | lba1 db ? ; LBA mid register, 15:8 |
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172 | lba2 db ? ; LBA high register, 23:16 |
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173 | device db ? ; Device register |
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174 | |||
175 | lba3 db ? ; LBA register, 31:24 |
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176 | lba4 db ? ; LBA register, 39:32 |
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177 | lba5 db ? ; LBA register, 47:40 |
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178 | featureh db ? ; Feature register, 15:8 |
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179 | |||
180 | countl db ? ; Count register, 7:0 |
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181 | counth db ? ; Count register, 15:8 |
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182 | icc db ? ; Isochronous command completion |
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183 | control db ? ; Control register |
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184 | |||
9072 | rgimad | 185 | rb 4 ; Reserved |
9064 | rgimad | 186 | ends |
187 | |||
188 | ; Register FIS – Device to Host |
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189 | struct FIS_REG_D2H |
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190 | fis_type db ? ; FIS_TYPE_REG_D2H |
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191 | |||
9131 | rgimad | 192 | flags db ? ; 0bRIRPPPP, P - Port multiplier, R - Reserved |
9064 | rgimad | 193 | ; I - Interrupt bit |
194 | |||
195 | status db ? ; Status register |
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196 | error db ? ; Error register |
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197 | |||
198 | lba0 db ? ; LBA low register, 7:0 |
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199 | lba1 db ? ; LBA mid register, 15:8 |
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200 | lba2 db ? ; LBA high register, 23:16 |
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201 | device db ? ; Device register |
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202 | |||
203 | lba3 db ? ; LBA register, 31:24 |
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204 | lba4 db ? ; LBA register, 39:32 |
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205 | lba5 db ? ; LBA register, 47:40 |
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9072 | rgimad | 206 | db ? ; Reserved |
9064 | rgimad | 207 | |
208 | countl db ? ; Count register, 7:0 |
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209 | counth db ? ; Count register, 15:8 |
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9072 | rgimad | 210 | rb 2 ; Reserved |
9064 | rgimad | 211 | |
9072 | rgimad | 212 | rb 4 ; Reserved |
9064 | rgimad | 213 | ends |
214 | |||
215 | ; Data FIS – Bidirectional |
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216 | struct FIS_DATA |
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217 | fis_type db ? ; FIS_TYPE_DATA |
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9131 | rgimad | 218 | flags db ? ; 0bRRRRPPPP, R - Reserved, P - Port multiplier |
9072 | rgimad | 219 | rb 2 ; Reserved |
9064 | rgimad | 220 | ; DWORD 1 ~ N (?) |
221 | data rd 1 ; Payload |
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222 | ends |
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223 | |||
224 | ; PIO Setup – Device to Host |
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225 | struct FIS_PIO_SETUP |
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226 | fis_type db ? ; FIS_TYPE_PIO_SETUP |
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227 | |||
9131 | rgimad | 228 | flags db ? ; 0bRIDRPPPP, P - Port multiplier, R - Reserved |
9064 | rgimad | 229 | ; I - Interrupt bit, D - Data transfer direction, 1 - device to host |
230 | |||
231 | status db ? ; Status register |
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232 | error db ? ; Error register |
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233 | |||
234 | lba0 db ? ; LBA low register, 7:0 |
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235 | lba1 db ? ; LBA mid register, 15:8 |
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236 | lba2 db ? ; LBA high register, 23:16 |
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237 | device db ? ; Device register |
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238 | |||
239 | lba3 db ? ; LBA register, 31:24 |
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240 | lba4 db ? ; LBA register, 39:32 |
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241 | lba5 db ? ; LBA register, 47:40 |
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9072 | rgimad | 242 | db ? ; Reserved |
9064 | rgimad | 243 | |
244 | countl db ? ; Count register, 7:0 |
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245 | counth db ? ; Count register, 15:8 |
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9072 | rgimad | 246 | db ? ; Reserved |
9064 | rgimad | 247 | e_status db ? ; New value of status register |
248 | |||
249 | tc dw ? ; Transfer count |
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9072 | rgimad | 250 | rb 2 ; Reserved |
9064 | rgimad | 251 | ends |
252 | |||
253 | ; DMA Setup – Device to Host |
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254 | struct FIS_DMA_SETUP |
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255 | fis_type db ? ; FIS_TYPE_DMA_SETUP |
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9131 | rgimad | 256 | flags db ? ; 0bAIDRPPPP, A - Auto-activate. Specifies if DMA Activate FIS is needed, |
9064 | rgimad | 257 | ; I - Interrupt bit, D - Data transfer direction, 1 - device to host, |
258 | ; R - Reserved, P - Port multiplier |
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259 | |||
9072 | rgimad | 260 | rb 2 ; Reserved |
9064 | rgimad | 261 | DMAbufferID dq ? ; DMA Buffer Identifier. |
262 | ; Used to Identify DMA buffer in host memory. |
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263 | ; SATA Spec says host specific and not in Spec. |
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264 | ; Trying AHCI spec might work. |
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265 | |||
9072 | rgimad | 266 | dd ? ; Reserved |
267 | DMAbufOffset dd ? ; Byte offset into buffer. First 2 bits must be 0 |
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9064 | rgimad | 268 | TransferCount dd ? ; Number of bytes to transfer. Bit 0 must be 0 |
9072 | rgimad | 269 | dd ? ; Reserved |
9064 | rgimad | 270 | ends |
271 | |||
272 | ; Set device bits FIS - device to host |
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273 | struct FIS_DEV_BITS |
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274 | fis_type db ? ; FIS_TYPE_DEV_BITS |
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9131 | rgimad | 275 | flags db ? ; 0bNIRRPPPP, N - Notification, I - Interrupt, |
9064 | rgimad | 276 | ; R - Reserved, P - Port multiplier |
277 | |||
278 | status db ? ; Status register |
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279 | error db ? ; Error register |
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280 | |||
281 | protocol dd ? ; Protocol |
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282 | ends |
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283 | |||
9069 | rgimad | 284 | struct HBA_FIS |
285 | dsfis FIS_DMA_SETUP ; 0x00, DMA Setup FIS |
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9072 | rgimad | 286 | rb 4 ; padding |
9069 | rgimad | 287 | |
288 | psfis FIS_PIO_SETUP ; 0x20, PIO Setup FIS |
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9072 | rgimad | 289 | rb 12 ; padding |
9069 | rgimad | 290 | |
291 | rfis FIS_REG_D2H ; 0x40, Register - Device to Host FIS |
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9072 | rgimad | 292 | rb 4 ; padding |
9069 | rgimad | 293 | |
294 | sdbfis FIS_DEV_BITS ; 0x58, Set Device Bit FIS |
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295 | |||
296 | ufis rb 64 ; 0x60 |
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297 | |||
9072 | rgimad | 298 | rb (0x100 - 0xA0) ; 0xA0, Reserved |
9069 | rgimad | 299 | ends |
300 | |||
9064 | rgimad | 301 | ; -------------------------------------------------- |
9020 | rgimad | 302 | uglobal |
303 | align 4 |
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304 | ahci_controller AHCI_DATA |
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9068 | rgimad | 305 | port_data_arr rb (sizeof.PORT_DATA*AHCI_MAX_PORTS) |
9020 | rgimad | 306 | endg |
307 | |||
9064 | rgimad | 308 | ; ----------------------------------------------------------------------- |
9020 | rgimad | 309 | ; detect ahci controller and initialize |
310 | align 4 |
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9068 | rgimad | 311 | ahci_init: |
9020 | rgimad | 312 | mov ecx, ahci_controller |
313 | mov esi, pcidev_list |
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314 | .find_ahci_ctr: |
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315 | mov esi, [esi + PCIDEV.fd] |
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316 | cmp esi, pcidev_list |
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317 | jz .ahci_ctr_not_found |
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318 | mov eax, [esi + PCIDEV.class] |
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319 | ;DEBUGF 1, "K: device class = %x\n", eax |
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320 | shr eax, 8 ; shift right because lowest 8 bits if ProgIf field |
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321 | cmp eax, 0x0106 ; 0x01 - Mass Storage Controller class, 0x06 - Serial ATA Controller subclass |
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322 | jz .ahci_ctr_found |
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323 | jmp .find_ahci_ctr |
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324 | |||
325 | .ahci_ctr_not_found: |
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326 | DEBUGF 1, "K: AHCI controller not found\n" |
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327 | ret |
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328 | |||
329 | .ahci_ctr_found: |
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330 | mov [ahci_controller + AHCI_DATA.pcidev], esi |
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331 | |||
332 | mov eax, [esi+PCIDEV.class] |
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333 | movzx ebx, byte [esi+PCIDEV.bus] |
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334 | movzx ecx, byte [esi+PCIDEV.devfn] |
||
335 | shr ecx, 3 ; get rid of 3 lowest bits (function code), the rest bits is device code |
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336 | movzx edx, byte [esi+PCIDEV.devfn] |
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337 | and edx, 00000111b ; get only 3 lowest bits (function code) |
||
338 | DEBUGF 1, "K: found AHCI controller, (class, subcl, progif) = %x, bus = %x, device = %x, function = %x\n", eax, ebx, ecx, edx |
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339 | |||
9023 | rgimad | 340 | ; get BAR5 value, it is physical address |
9037 | rgimad | 341 | movzx ebx, [esi + PCIDEV.bus] |
342 | movzx ebp, [esi + PCIDEV.devfn] |
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343 | stdcall pci_read32, ebx, ebp, PCI_REG_BAR5 |
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344 | DEBUGF 1, "K: AHCI controller MMIO = %x\n", eax |
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345 | mov edi, eax |
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9020 | rgimad | 346 | |
9037 | rgimad | 347 | ; get the size of MMIO region |
348 | stdcall pci_write32, ebx, ebp, PCI_REG_BAR5, 0xFFFFFFFF |
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349 | stdcall pci_read32, ebx, ebp, PCI_REG_BAR5 |
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350 | not eax |
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351 | inc eax |
||
352 | DEBUGF 1, "K: AHCI: MMIO region size = 0x%x bytes\n", eax |
||
353 | |||
354 | ; Map MMIO region to virtual memory |
||
355 | stdcall map_io_mem, edi, eax, PG_SWR + PG_NOCACHE |
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9020 | rgimad | 356 | mov [ahci_controller + AHCI_DATA.abar], eax |
357 | DEBUGF 1, "K: AHCI controller BAR5 mapped to virtual addr %x\n", eax |
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358 | |||
9037 | rgimad | 359 | ; Restore the original BAR5 value |
360 | stdcall pci_write32, ebx, ebp, PCI_REG_BAR5, edi |
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361 | |||
9023 | rgimad | 362 | ; Enable dma bus mastering, memory space access, clear the "disable interrupts" bit |
363 | ; Usually, it is already done before us |
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9024 | rgimad | 364 | movzx ebx, [esi + PCIDEV.bus] |
365 | movzx ebp, [esi + PCIDEV.devfn] |
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366 | stdcall pci_read32, ebx, ebp, PCI_REG_STATUS_COMMAND |
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9020 | rgimad | 367 | DEBUGF 1, "K: AHCI: pci_status_command = %x\nEnabling interrupts, DMA bus mastering and memory space access\n", eax |
368 | or eax, 0x06 ; pci.command |= 0x06 (dma bus mastering + memory space access) |
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369 | btr eax, 10 ; clear the "disable interrupts" bit |
||
370 | DEBUGF 1, "K: AHCI: pci_status_command = %x\n", eax |
||
9024 | rgimad | 371 | stdcall pci_write32, ebx, ebp, PCI_REG_STATUS_COMMAND, eax |
9020 | rgimad | 372 | |
9023 | rgimad | 373 | ; ; Print some register values to debug board |
374 | ; mov esi, [ahci_controller + AHCI_DATA.abar] |
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9064 | rgimad | 375 | ; DEBUGF 1, "K: AHCI: HBA.cap = %x, HBA.ghc = %x, HBA_MEM.version = %x\n", [esi + HBA_MEM.cap], [esi + HBA_MEM.ghc], [esi + HBA_MEM.version] |
9020 | rgimad | 376 | |
9023 | rgimad | 377 | ;------------------------------------------------------- |
378 | ; Request BIOS/OS ownership handoff, if supported. (TODO check correctness) |
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379 | mov esi, [ahci_controller + AHCI_DATA.abar] |
||
9064 | rgimad | 380 | ;mov ebx, [esi + HBA_MEM.cap2] |
9023 | rgimad | 381 | ;DEBUGF 1, "K: AHCI: HBA_MEM.cap2 = %x\n", ebx |
9064 | rgimad | 382 | bt [esi + HBA_MEM.cap2], bit_AHCI_HBA_CAP2_BOH |
9020 | rgimad | 383 | jnc .end_handoff |
9023 | rgimad | 384 | DEBUGF 1, "K: AHCI: requesting AHCI ownership change...\n" |
9024 | rgimad | 385 | bts [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_OOS |
9020 | rgimad | 386 | |
387 | .wait_not_bos: |
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9024 | rgimad | 388 | bt [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_BOS |
9020 | rgimad | 389 | jc .wait_not_bos |
390 | |||
391 | mov ebx, 3 |
||
392 | call delay_hs |
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393 | |||
9023 | rgimad | 394 | ; if Bios Busy is still set after 30 mS, wait 2 seconds. |
9024 | rgimad | 395 | bt [esi + HBA_MEM.bohc], bit_AHCI_HBA_BOHC_BB |
9020 | rgimad | 396 | jnc @f |
397 | |||
398 | mov ebx, 200 |
||
399 | call delay_hs |
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400 | @@: |
||
9023 | rgimad | 401 | DEBUGF 1, "K: AHCI: ownership change completed.\n" |
9020 | rgimad | 402 | |
403 | .end_handoff: |
||
9023 | rgimad | 404 | ;------------------------------------------------------- |
9020 | rgimad | 405 | |
9023 | rgimad | 406 | ; enable the AHCI and reset it |
9064 | rgimad | 407 | bts [esi + HBA_MEM.ghc], bit_AHCI_HBA_GHC_AHCI_ENABLE |
408 | bts [esi + HBA_MEM.ghc], bit_AHCI_HBA_GHC_RESET |
||
9020 | rgimad | 409 | |
9023 | rgimad | 410 | ; wait for reset to complete |
411 | .wait_reset: |
||
9064 | rgimad | 412 | bt [esi + HBA_MEM.ghc], bit_AHCI_HBA_GHC_RESET |
9023 | rgimad | 413 | jc .wait_reset |
9020 | rgimad | 414 | |
9023 | rgimad | 415 | ; enable the AHCI and interrupts |
9064 | rgimad | 416 | bts [esi + HBA_MEM.ghc], bit_AHCI_HBA_GHC_AHCI_ENABLE |
417 | bts [esi + HBA_MEM.ghc], bit_AHCI_HBA_GHC_INTERRUPT_ENABLE |
||
9023 | rgimad | 418 | mov ebx, 2 |
419 | call delay_hs |
||
420 | |||
9064 | rgimad | 421 | DEBUGF 1, "K: AHCI: caps: %x %x, ver: %x, ghc: %x, pi: %x\n", [esi + HBA_MEM.cap], [esi + HBA_MEM.cap2], [esi + HBA_MEM.version], [esi + HBA_MEM.ghc], [esi + HBA_MEM.pi] |
9020 | rgimad | 422 | |
9037 | rgimad | 423 | ; TODO: |
424 | ; calculate irq line |
||
425 | ; ahciHBA->ghc |= AHCI_GHC_IE; |
||
426 | ; IDT::RegisterInterruptHandler(irq, InterruptHandler); |
||
9064 | rgimad | 427 | ; ahciHBA->is = 0xffffffff; |
9037 | rgimad | 428 | |
429 | xor ebx, ebx |
||
430 | .detect_drives: |
||
431 | cmp ebx, AHCI_MAX_PORTS |
||
432 | jae .end_detect_drives |
||
433 | |||
434 | ; if port with index ebx is not implemented then go to next |
||
9064 | rgimad | 435 | mov ecx, [esi + HBA_MEM.pi] |
9037 | rgimad | 436 | bt ecx, ebx |
437 | jnc .continue_detect_drives |
||
438 | |||
439 | mov edi, ebx |
||
9074 | rgimad | 440 | imul edi, sizeof.HBA_PORT |
9037 | rgimad | 441 | add edi, HBA_MEM.ports |
442 | add edi, esi |
||
443 | ; now edi - base of HBA_MEM.ports[ebx] |
||
444 | |||
9130 | rgimad | 445 | DEBUGF 1, "K: AHCI: port %d, cmd = %x, ssts = %x\n", ebx, [edi + HBA_PORT.command], [edi + HBA_PORT.sata_status] |
9037 | rgimad | 446 | |
9130 | rgimad | 447 | ; If port is not idle force it to be idle |
448 | mov eax, [edi + HBA_PORT.command] |
||
449 | and eax, (AHCI_HBA_PxCMD_ST or AHCI_HBA_PxCMD_CR or AHCI_HBA_PxCMD_FRE or AHCI_HBA_PxCMD_FR) |
||
450 | test eax, eax |
||
451 | jz @f |
||
452 | |||
453 | mov eax, edi |
||
454 | DEBUGF 1, "ahci_stop_cmd..\n" |
||
455 | call ahci_stop_cmd |
||
456 | @@: |
||
457 | ; TODO: what is purpose of this block of code ? |
||
458 | ; Reset port, disable slumber and partial state |
||
459 | ; mov [edi + HBA_PORT.sata_control], 0x301 |
||
460 | ; push ebx |
||
461 | ; mov ebx, 5 ; wait 50 ms |
||
462 | ; call delay_hs |
||
463 | ; pop ebx |
||
464 | ; mov [edi + HBA_PORT.sata_control], 0x300 |
||
465 | |||
466 | ; if(abar->cap & HBA_MEM_CAP_SSS) |
||
467 | ; { |
||
468 | ; abar->ports[i].cmd |= (HBA_PxCMD_SUD | HBA_PxCMD_POD | HBA_PxCMD_ICC); |
||
469 | ; Sleep(10); |
||
470 | ; } |
||
471 | ; rewritten to: |
||
472 | bt [esi + HBA_MEM.cap], 27 ; check Supports Staggered Spin-up bit in capabilities |
||
473 | jnc @f |
||
9134 | rgimad | 474 | DEBUGF 1, "Supports Staggered Spin-up, spinning up the port..\n" |
9130 | rgimad | 475 | or [edi + HBA_PORT.command], (0x0002 or 0x0004 or 0x10000000) |
476 | push ebx |
||
477 | mov ebx, 1 ; wait 10 ms |
||
478 | call delay_hs |
||
479 | pop ebx |
||
480 | @@: |
||
481 | ; Clear interrupt status and error status |
||
482 | mov [edi + HBA_PORT.sata_error], 0xFFFFFFFF |
||
483 | mov [edi + HBA_PORT.interrupt_status], 0xFFFFFFFF |
||
484 | |||
485 | ; ------------------------------------------ |
||
486 | |||
9037 | rgimad | 487 | mov ecx, [edi + HBA_PORT.sata_status] |
488 | shr ecx, 8 |
||
489 | and ecx, 0x0F |
||
490 | cmp ecx, AHCI_HBA_PORT_IPM_ACTIVE |
||
491 | jne .continue_detect_drives |
||
492 | |||
493 | mov ecx, [edi + HBA_PORT.sata_status] |
||
494 | and ecx, AHCI_HBA_PxSSTS_DET |
||
495 | cmp ecx, AHCI_HBA_PxSSTS_DET_PRESENT |
||
9068 | rgimad | 496 | jne .continue_detect_drives |
9037 | rgimad | 497 | |
9134 | rgimad | 498 | ; DEBUGF 1, "K: AHCI: found drive at port %d, cmd = 0x%x, ssts = 0x%x, signature = 0x%x\n", ebx, [edi + HBA_PORT.command], [edi + HBA_PORT.sata_status], [edi + HBA_PORT.signature] |
9037 | rgimad | 499 | |
9068 | rgimad | 500 | mov ecx, ebx |
9074 | rgimad | 501 | imul ecx, sizeof.PORT_DATA |
9068 | rgimad | 502 | add ecx, port_data_arr |
503 | stdcall ahci_port_rebase, edi, ebx, ecx |
||
504 | |||
9134 | rgimad | 505 | ; DEBUGF 1, "K: AHCI: After REBASING, signature = 0x%x\n", [edi + HBA_PORT.signature] |
506 | |||
9135 | rgimad | 507 | ; Determine drive type by checking port signature |
9134 | rgimad | 508 | .switch_sig: |
509 | cmp [edi + HBA_PORT.signature], SATA_SIG_ATA |
||
9135 | rgimad | 510 | mov eax, AHCI_DEV_SATA |
511 | jz .end_switch_sig |
||
512 | |||
9134 | rgimad | 513 | cmp [edi + HBA_PORT.signature], SATA_SIG_ATAPI |
9135 | rgimad | 514 | mov eax, AHCI_DEV_SATAPI |
515 | jz .end_switch_sig |
||
516 | |||
9134 | rgimad | 517 | cmp [edi + HBA_PORT.signature], SATA_SIG_SEMB |
9135 | rgimad | 518 | mov eax, AHCI_DEV_SEMB |
519 | jz .end_switch_sig |
||
520 | |||
9134 | rgimad | 521 | cmp [edi + HBA_PORT.signature], SATA_SIG_PM |
9135 | rgimad | 522 | mov eax, AHCI_DEV_PM |
523 | jz .end_switch_sig |
||
524 | |||
9134 | rgimad | 525 | DEBUGF 1, "Unknown device signature\n" |
9135 | rgimad | 526 | mov eax, AHCI_DEV_NULL |
9134 | rgimad | 527 | .end_switch_sig: |
9136 | rgimad | 528 | mov [ecx + PORT_DATA.drive_type], al |
9134 | rgimad | 529 | |
530 | DEBUGF 1, "K: AHCI: found drive on port %u: TYPE = %u\n", ebx, [ecx + PORT_DATA.drive_type] |
||
531 | |||
9074 | rgimad | 532 | stdcall ahci_port_identify, ecx |
533 | |||
9037 | rgimad | 534 | .continue_detect_drives: |
535 | inc ebx |
||
536 | jmp .detect_drives |
||
537 | |||
9064 | rgimad | 538 | |
9037 | rgimad | 539 | |
540 | .end_detect_drives: |
||
541 | |||
542 | |||
9020 | rgimad | 543 | ret |
9065 | rgimad | 544 | ; ------------------------------------------------- |
9020 | rgimad | 545 | |
9074 | rgimad | 546 | modelstr rb 42 |
547 | ; Identify drive on port ; TODO check |
||
548 | ; in: pdata - address of PORT_DATA structure |
||
549 | proc ahci_port_identify stdcall, pdata: dword |
||
550 | locals |
||
551 | cmdslot dd ? |
||
552 | cmdheader dd ? |
||
553 | cmdtable dd ? |
||
554 | buf_phys dd ? |
||
555 | buf_virt dd ? |
||
556 | endl |
||
557 | |||
558 | pushad |
||
559 | |||
560 | mov esi, [pdata] ; esi - address of PORT_DATA struct of port |
||
561 | mov edi, [esi + PORT_DATA.port] ; edi - address of HBA_PORT struct of port |
||
562 | |||
563 | mov eax, edi |
||
564 | call ahci_find_cmdslot |
||
565 | |||
566 | cmp eax, -1 |
||
567 | jne .cmdslot_found |
||
568 | |||
569 | DEBUGF 1, "No free cmdslot on port %u\n", [esi + PORT_DATA.portno] |
||
570 | |||
571 | .cmdslot_found: |
||
572 | mov [cmdslot], eax |
||
9134 | rgimad | 573 | ; DEBUGF 1, "Found free cmdslot %u on port %u\n", [cmdslot], [esi + PORT_DATA.portno] |
9074 | rgimad | 574 | |
575 | shl eax, BSF sizeof.HBA_CMD_HDR |
||
576 | add eax, [esi + PORT_DATA.clb] |
||
577 | mov [cmdheader], eax ; address of virtual mapping of command header |
||
578 | mov eax, [cmdslot] |
||
579 | mov eax, [esi + eax*4 + PORT_DATA.ctba_arr] |
||
580 | mov [cmdtable], eax ; address of virtual mapping of command table of command header |
||
581 | |||
582 | stdcall _memset, eax, 0, sizeof.HBA_CMD_TBL |
||
583 | |||
584 | call alloc_page |
||
585 | mov [buf_phys], eax |
||
586 | |||
587 | stdcall map_io_mem, eax, 4096, PG_NOCACHE + PG_SWR ; map to virt memory so we can work with it |
||
588 | mov [buf_virt], eax |
||
589 | |||
590 | mov eax, [cmdtable] |
||
591 | mov ebx, [buf_phys] |
||
592 | mov dword [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.dba], ebx |
||
593 | mov dword [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.dbau], 0 |
||
9131 | rgimad | 594 | and [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.flags], not 0x3FFFFF ; zero out lower 22 bits, they used for byte count |
595 | or [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.flags], 512 - 1 ; reason why -1 see in spec on this field |
||
596 | ; or [eax + HBA_CMD_TBL.prdt_entry + HBA_PRDT_ENTRY.flags], 1 shl 31 ; enable interrupt on completion |
||
597 | |||
9074 | rgimad | 598 | mov eax, [cmdheader] |
9131 | rgimad | 599 | and [eax + HBA_CMD_HDR.flags1], not 0x1F ; zero out lower 5 bits, they will be used for cfl |
600 | or [eax + HBA_CMD_HDR.flags1], (sizeof.FIS_REG_H2D / 4) ; set command fis length in dwords |
||
601 | movzx bx, [eax + HBA_CMD_HDR.flags1] |
||
602 | btr bx, 6 ; flag W = 0 |
||
603 | mov [eax + HBA_CMD_HDR.flags1], bl |
||
604 | movzx bx, [eax + HBA_CMD_HDR.flags2] |
||
605 | btr bx, 2 ; flag C = 0 |
||
606 | mov [eax + HBA_CMD_HDR.flags2], bl |
||
9074 | rgimad | 607 | mov [eax + HBA_CMD_HDR.prdtl], 1 |
608 | |||
609 | mov eax, [cmdtable] |
||
610 | mov byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D.fis_type], FIS_TYPE_REG_H2D |
||
9131 | rgimad | 611 | movzx ebx, byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D.flags] |
9074 | rgimad | 612 | bts ebx, bit_AHCI_H2D_FLAG_CMD ; Set Command bit in H2D FIS. |
9131 | rgimad | 613 | mov byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D.flags], bl |
9134 | rgimad | 614 | |
615 | mov byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D.command], ATA_IDENTIFY |
||
616 | cmp [esi + PORT_DATA.drive_type], AHCI_DEV_SATAPI |
||
617 | jne @f |
||
618 | mov byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D.command], ATAPI_IDENTIFY |
||
619 | @@: |
||
9074 | rgimad | 620 | mov byte [eax + HBA_CMD_TBL.cfis + FIS_REG_H2D.device], 0 |
621 | |||
622 | ; TODO Wait on previous command to complete. AHCIPortWait(bd->port_num, tS + 2); |
||
623 | mov ebx, 20 ;;; |
||
624 | call delay_hs ;;; |
||
625 | |||
626 | mov eax, [cmdslot] |
||
627 | bts [edi + HBA_PORT.command_issue], eax ; Issue the command |
||
628 | |||
629 | ; TODO AHCIPortCmdWait(bd->port_num, cmd_slot); |
||
630 | mov ebx, 20 ;;; |
||
631 | call delay_hs ;;; |
||
632 | |||
9134 | rgimad | 633 | ; DEBUGF 1, "sata_error register = 0x%x\n", [edi + HBA_PORT.sata_error] |
9130 | rgimad | 634 | |
9131 | rgimad | 635 | ; mov ecx, ecx |
636 | ; mov esi, [buf_virt] |
||
637 | ; .print_ident: |
||
638 | ; cmp ecx, 512 - 1 ; why -1 ? |
||
639 | ; jae .end_print_ident |
||
9130 | rgimad | 640 | |
9131 | rgimad | 641 | ; mov al, byte [esi + ecx] |
642 | ; mov byte [modelstr], al |
||
643 | ; mov byte [modelstr + 1], 0 |
||
644 | ; DEBUGF 1, "(%s) ", modelstr |
||
9130 | rgimad | 645 | |
9131 | rgimad | 646 | ; inc ecx |
647 | ; jmp .print_ident |
||
648 | ; .end_print_ident: |
||
649 | ; DEBUGF 1, "\n" |
||
9130 | rgimad | 650 | |
9134 | rgimad | 651 | ; DEBUGF 1, "after identification: signature = 0x%x\n", [edi + HBA_PORT.signature] |
652 | |||
9130 | rgimad | 653 | mov esi, [buf_virt] |
9074 | rgimad | 654 | add esi, 27*2 |
655 | mov edi, modelstr |
||
656 | mov ecx, ((46-27)+1)*2 |
||
657 | cld |
||
658 | rep movsb |
||
659 | mov byte [edi], 0 |
||
660 | |||
9138 | rgimad | 661 | stdcall swap_bytes_in_words, modelstr, (46-27)+1 |
9131 | rgimad | 662 | DEBUGF 1, "IDENTIFICATION RESULT: MODEL = %s\n", modelstr |
9074 | rgimad | 663 | |
9138 | rgimad | 664 | mov esi, [buf_virt] |
665 | mov eax, [esi + 200] |
||
666 | mov edx, [esi + 200 + 4] |
||
667 | DEBUGF 1, "lba48 mode sector count = 0x%x:%x\n", edx, eax |
||
668 | |||
669 | shrd eax, edx, 11 ; i.e *512 / 1024 / 1024, 512 - sector size |
||
670 | DEBUGF 1, "disk capacity = %u MiB ", eax |
||
671 | shrd eax, edx, 10 ; / 1024 |
||
672 | DEBUGF 1, "= %u GiB\n", eax |
||
9074 | rgimad | 673 | .ret: |
674 | popad |
||
675 | ret |
||
676 | endp |
||
677 | |||
9134 | rgimad | 678 | |
9065 | rgimad | 679 | ; Start command engine |
680 | ; in: eax - address of HBA_PORT structure |
||
9068 | rgimad | 681 | ahci_start_cmd: |
9065 | rgimad | 682 | .wait_cr: ; Wait until CR (bit15) is cleared |
683 | bt [eax + HBA_PORT.command], bit_AHCI_HBA_PxCMD_CR |
||
684 | jc .wait_cr |
||
685 | |||
686 | ; Set FRE (bit4) and ST (bit0) |
||
687 | bts [eax + HBA_PORT.command], bit_AHCI_HBA_PxCMD_FRE |
||
688 | bts [eax + HBA_PORT.command], bit_AHCI_HBA_PxCMD_ST |
||
9068 | rgimad | 689 | ; maybe here call ahci flush cmd ? TODO (see seakernel) |
9065 | rgimad | 690 | ret |
691 | |||
692 | ; Stop command engine |
||
693 | ; in: eax - address of HBA_PORT structure |
||
9068 | rgimad | 694 | ahci_stop_cmd: |
9065 | rgimad | 695 | btr [eax + HBA_PORT.command], bit_AHCI_HBA_PxCMD_ST ; Clear ST (bit0) |
696 | btr [eax + HBA_PORT.command], bit_AHCI_HBA_PxCMD_FRE ; Clear FRE (bit4) |
||
697 | .wait_fr_cr: ; Wait until FR (bit14), CR (bit15) are cleared |
||
698 | bt [eax + HBA_PORT.command], bit_AHCI_HBA_PxCMD_FR |
||
699 | jc .wait_fr_cr |
||
700 | bt [eax + HBA_PORT.command], bit_AHCI_HBA_PxCMD_CR |
||
701 | jc .wait_fr_cr |
||
702 | |||
703 | ret |
||
704 | |||
9068 | rgimad | 705 | ; The commands may not take effect until the command |
706 | ; register is read again by software, because reasons. |
||
707 | ; in: eax - address of HBA_PORT structure |
||
708 | ; out: eax - command register value |
||
709 | ahci_flush_cmd: |
||
710 | mov eax, [eax + HBA_PORT.command] |
||
711 | ret |
||
9065 | rgimad | 712 | |
9068 | rgimad | 713 | ; Send command to port |
714 | ; in: eax - address of HBA_PORT structure |
||
715 | ; ebx - index of command slot |
||
716 | ahci_send_cmd: |
||
717 | push ecx |
||
718 | mov [eax + HBA_PORT.interrupt_status], 0xFFFFFFFF |
||
719 | |||
720 | mov cl, bl |
||
721 | mov [eax + HBA_PORT.command_issue], 1 |
||
722 | shl [eax + HBA_PORT.command_issue], cl |
||
9065 | rgimad | 723 | |
9068 | rgimad | 724 | call ahci_flush_cmd |
725 | pop ecx |
||
726 | ret |
||
9065 | rgimad | 727 | |
9068 | rgimad | 728 | ; --------------------------------------------------------------------------- |
729 | ; in: port - address of HBA_PORT structure |
||
730 | ; portno - port index (0..31) |
||
731 | ; pdata - address of PORT_DATA structure |
||
732 | proc ahci_port_rebase stdcall, port: dword, portno: dword, pdata: dword |
||
733 | locals |
||
734 | phys_page1 dd ? |
||
735 | virt_page1 dd ? |
||
736 | phys_page23 dd ? |
||
737 | virt_page23 dd ? |
||
738 | tmp dd ? |
||
739 | endl |
||
740 | |||
741 | pushad |
||
742 | |||
743 | DEBUGF 1, "Rebasing port %u\n", [portno] |
||
744 | |||
745 | mov eax, [port] |
||
746 | call ahci_stop_cmd |
||
747 | |||
748 | ; Command list entry size = 32 |
||
749 | ; Command list entry maxim count = 32 |
||
750 | ; Command list maxim size = 32*32 = 1K per port |
||
751 | call alloc_page |
||
752 | mov [phys_page1], eax |
||
753 | |||
754 | stdcall map_io_mem, eax, 4096, PG_NOCACHE + PG_SWR ; map to virt memory so we can work with it |
||
755 | mov [virt_page1], eax |
||
756 | |||
757 | mov esi, [port] |
||
758 | mov ebx, [phys_page1] |
||
759 | mov [esi + HBA_PORT.command_list_base_l], ebx ; set the command list base |
||
760 | mov [esi + HBA_PORT.command_list_base_h], 0 ; zero upper 32 bits of addr cause we are 32 bit os |
||
761 | |||
762 | mov edi, [pdata] |
||
763 | mov ebx, [virt_page1] |
||
764 | mov [edi + PORT_DATA.clb], ebx ; set pdata->clb |
||
765 | |||
766 | mov eax, [port] |
||
767 | mov [edi + PORT_DATA.port], eax ; set pdata->port |
||
9074 | rgimad | 768 | mov eax, [portno] ; set pdata->portno |
769 | mov [edi + PORT_DATA.portno], eax |
||
9068 | rgimad | 770 | |
771 | stdcall _memset, ebx, 0, 1024 ; zero out the command list |
||
772 | |||
773 | ; FIS entry size = 256 bytes per port |
||
774 | mov eax, [phys_page1] |
||
775 | add eax, 1024 |
||
776 | mov [esi + HBA_PORT.fis_base_l], eax |
||
777 | mov [esi + HBA_PORT.fis_base_h], 0 |
||
778 | |||
779 | mov eax, [virt_page1] |
||
780 | add eax, 1024 |
||
781 | mov [edi + PORT_DATA.fb], eax ; set pdata->fb |
||
782 | stdcall _memset, eax, 0, 256 ; zero out |
||
783 | |||
784 | stdcall alloc_pages, 2 |
||
785 | mov [phys_page23], eax |
||
786 | stdcall map_io_mem, eax, 2*4096, PG_NOCACHE + PG_SWR |
||
787 | mov [virt_page23], eax |
||
788 | |||
789 | ; Command table size = 256*32 = 8K per port |
||
790 | mov edx, [edi + PORT_DATA.clb] ; cmdheader array base |
||
791 | xor ecx, ecx |
||
792 | |||
793 | .for1: |
||
794 | cmp ecx, 32 |
||
795 | jae .for1_end |
||
796 | |||
797 | mov ebx, ecx |
||
798 | shl ebx, BSF sizeof.HBA_CMD_HDR |
||
799 | add ebx, edx ; ebx = cmdheader[ecx] |
||
800 | |||
801 | mov [ebx + HBA_CMD_HDR.prdtl], 8 ; 8 prdt entries per command table |
||
802 | |||
803 | ; 256 bytes per command table, 64+16+48+16*8 |
||
804 | |||
805 | push edx |
||
806 | |||
807 | ; cmdheader[ecx].ctba = phys_page23 + ecx*256 |
||
808 | mov [ebx + HBA_CMD_HDR.ctba], ecx |
||
809 | shl [ebx + HBA_CMD_HDR.ctba], BSF 256 ; *= 256 |
||
810 | mov eax, [ebx + HBA_CMD_HDR.ctba] |
||
811 | mov edx, [phys_page23] |
||
812 | add [ebx + HBA_CMD_HDR.ctba], edx |
||
813 | |||
814 | add eax, [virt_page23] |
||
815 | mov [tmp], eax ; tmp = virt_page23 + ecx*256 |
||
9069 | rgimad | 816 | lea eax, [ecx*4 + edi + PORT_DATA.ctba_arr] ; eax = pdata->ctba_arr[ecx] |
9068 | rgimad | 817 | mov edx, [tmp] |
818 | mov [eax], edx ; pdata->ctba_arr[ecx] = virt_page23 + ecx*256 |
||
819 | |||
820 | pop edx |
||
821 | |||
822 | mov [ebx + HBA_CMD_HDR.ctbau], 0 |
||
823 | stdcall _memset, [eax], 0, 256 ; zero out |
||
824 | |||
825 | inc ecx |
||
826 | jmp .for1 |
||
827 | .for1_end: |
||
828 | |||
829 | mov eax, [port] |
||
830 | call ahci_start_cmd |
||
831 | |||
832 | DEBUGF 1, "End rebasing port %u\n", [portno] |
||
833 | popad |
||
834 | ret |
||
835 | endp |
||
836 | |||
9069 | rgimad | 837 | ; ----------------------------------------------------------- ; TODO check |
838 | ; Find a free command list slot |
||
839 | ; in: eax - address of HBA_PORT structure |
||
840 | ; out: eax - if not found -1, else slot index |
||
841 | ahci_find_cmdslot: |
||
842 | push ebx ecx edx esi |
||
843 | ; If not set in SACT and CI, the slot is free |
||
844 | mov ebx, [eax + HBA_PORT.sata_active] |
||
845 | or ebx, [eax + HBA_PORT.command_issue] ; ebx = slots |
||
9068 | rgimad | 846 | |
9069 | rgimad | 847 | mov esi, [ahci_controller + AHCI_DATA.abar] |
848 | mov edx, [esi + HBA_MEM.cap] |
||
849 | shr edx, 8 |
||
850 | and edx, 0xf |
||
9134 | rgimad | 851 | ; DEBUGF 1, "Number of Command Slots on each port = %u\n", edx |
9069 | rgimad | 852 | xor ecx, ecx |
853 | .for1: |
||
854 | cmp ecx, edx |
||
855 | jae .for1_end |
||
9068 | rgimad | 856 | |
9069 | rgimad | 857 | ; if ((slots&1) == 0) return i; |
858 | bt ebx, 0 |
||
859 | jc .cont1 |
||
860 | |||
861 | mov eax, ecx |
||
862 | jmp .ret |
||
863 | |||
864 | .cont1: |
||
865 | shr ebx, 1 |
||
866 | inc ecx |
||
867 | jmp .for1 |
||
868 | .for1_end: |
||
869 | DEBUGF 1, "Cannot find free command list entry\n" |
||
870 | mov eax, -1 |
||
871 | .ret: |
||
872 | pop esi edx ecx ebx |
||
873 | ret |
||
874 | |||
875 | |||
9068 | rgimad | 876 | proc _memset stdcall, dest:dword, val:byte, cnt:dword ; doesnt clobber any registers |
877 | ;DEBUGF DBG_INFO, "memset(%x, %u, %u)\n", [dest], [val], [cnt] |
||
878 | push eax ecx edi |
||
879 | mov edi, dword [dest] |
||
880 | mov al, byte [val] |
||
881 | mov ecx, dword [cnt] |
||
9069 | rgimad | 882 | rep stosb |
9068 | rgimad | 883 | pop edi ecx eax |
884 | ret |
||
885 | endp |
||
9138 | rgimad | 886 | |
887 | ; Swaps byte order in words |
||
888 | ; base - address of first word |
||
889 | ; len - how many words to swap bytes in |
||
890 | ; doesnt clobber any registers |
||
891 | proc swap_bytes_in_words stdcall, base: dword, len: dword |
||
892 | push eax ebx ecx |
||
893 | xor ecx, ecx |
||
894 | mov ebx, [base] |
||
895 | .loop: |
||
896 | cmp ecx, [len] |
||
897 | jae .loop_end |
||
898 | mov ax, word [ebx + ecx*2] |
||
899 | xchg ah, al |
||
900 | mov word [ebx + ecx*2], ax |
||
901 | inc ecx |
||
902 | jmp .loop |
||
903 | .loop_end: |
||
904 | pop ecx ebx eax |
||
905 | ret |
||
906 | endp |