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1029 serge 1
/*
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 * Copyright 2006-2007 Advanced Micro Devices, Inc.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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 * OTHER DEALINGS IN THE SOFTWARE.
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 */
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/**
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Module Name:
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    hwserv_drv.c
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Abstract:
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		Functions defined in the Command Decoder Specification document
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Revision History:
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	NEG:27.09.2002	Initiated.
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--*/
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#include "CD_binding.h"
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#include "CD_hw_services.h"
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//trace settings
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#if DEBUG_OUTPUT_DEVICE & 1
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	#define TRACE_USING_STDERR          //define it to use stderr as trace output,
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#endif
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#if DEBUG_OUTPUT_DEVICE & 2
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	#define TRACE_USING_RS232
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#endif
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#if DEBUG_OUTPUT_DEVICE & 4
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	#define TRACE_USING_LPT
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#endif
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51
 
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#if DEBUG_PARSER == 4
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	#define IO_TRACE					//IO access trace switch, undefine it to turn off
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	#define PCI_TRACE					//PCI access trace switch, undefine it to turn off
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	#define MEM_TRACE					//MEM access trace switch, undefine it to turn off
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#endif
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UINT32 CailReadATIRegister(VOID*,UINT32);
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VOID   CailWriteATIRegister(VOID*,UINT32,UINT32);
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VOID*  CailAllocateMemory(VOID*,UINT16);
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VOID   CailReleaseMemory(VOID *,VOID *);
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VOID   CailDelayMicroSeconds(VOID *,UINT32 );
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VOID   CailReadPCIConfigData(VOID*,VOID*,UINT32,UINT16);
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VOID   CailWritePCIConfigData(VOID*,VOID*,UINT32,UINT16);
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UINT32 CailReadFBData(VOID*,UINT32);
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VOID   CailWriteFBData(VOID*,UINT32,UINT32);
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ULONG  CailReadPLL(VOID *Context ,ULONG Address);
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VOID   CailWritePLL(VOID *Context,ULONG Address,ULONG Data);
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ULONG  CailReadMC(VOID *Context ,ULONG Address);
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VOID   CailWriteMC(VOID *Context ,ULONG Address,ULONG Data);
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72
 
73
#if DEBUG_PARSER>0
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VOID   CailVideoDebugPrint(VOID*,ULONG_PTR, UINT16);
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#endif
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// Delay function
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#if ( defined ENABLE_PARSER_DELAY || defined ENABLE_ALL_SERVICE_FUNCTIONS )
78
 
79
VOID	DelayMilliseconds(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
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{
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	    CailDelayMicroSeconds(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->SourceData32*1000);
82
}
83
 
84
VOID	DelayMicroseconds(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
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{
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	    CailDelayMicroSeconds(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->SourceData32);
87
}
88
#endif
89
 
90
VOID	PostCharOutput(PARSER_TEMP_DATA STACK_BASED * pParserTempData)
91
{
92
}
93
 
94
VOID	CallerDebugFunc(PARSER_TEMP_DATA STACK_BASED * pParserTempData)
95
{
96
}
97
 
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// PCI READ Access
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#if ( defined ENABLE_PARSER_PCIREAD8 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
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UINT8   ReadPCIReg8(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
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{
104
    UINT8 rvl;
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    CailReadPCIConfigData(pWorkingTableData->pDeviceData->CAIL,&rvl,pWorkingTableData->Index,sizeof(UINT8));
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	return rvl;
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}
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#endif
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#if ( defined ENABLE_PARSER_PCIREAD16 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
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UINT16	ReadPCIReg16(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
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{
114
 
115
    UINT16 rvl;
116
    CailReadPCIConfigData(pWorkingTableData->pDeviceData->CAIL,&rvl,pWorkingTableData->Index,sizeof(UINT16));
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    return rvl;
118
 
119
}
120
#endif
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#if ( defined ENABLE_PARSER_PCIREAD32 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
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UINT32  ReadPCIReg32   (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
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{
127
 
128
    UINT32 rvl;
129
    CailReadPCIConfigData(pWorkingTableData->pDeviceData->CAIL,&rvl,pWorkingTableData->Index,sizeof(UINT32));
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    return rvl;
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}
132
#endif
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// PCI WRITE Access
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#if ( defined ENABLE_PARSER_PCIWRITE8 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
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VOID	WritePCIReg8	(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
139
{
140
 
141
    CailWritePCIConfigData(pWorkingTableData->pDeviceData->CAIL,&(pWorkingTableData->DestData32),pWorkingTableData->Index,sizeof(UINT8));
142
 
143
}
144
 
145
#endif
146
 
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148
#if ( defined ENABLE_PARSER_PCIWRITE16 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
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VOID    WritePCIReg16  (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
150
{
151
 
152
        CailWritePCIConfigData(pWorkingTableData->pDeviceData->CAIL,&(pWorkingTableData->DestData32),pWorkingTableData->Index,sizeof(UINT16));
153
}
154
 
155
#endif
156
 
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158
#if ( defined ENABLE_PARSER_PCIWRITE32 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
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VOID    WritePCIReg32  (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
160
{
161
    CailWritePCIConfigData(pWorkingTableData->pDeviceData->CAIL,&(pWorkingTableData->DestData32),pWorkingTableData->Index,sizeof(UINT32));
162
}
163
#endif
164
 
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// System IO Access
169
#if ( defined ENABLE_PARSER_SYS_IOREAD8 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
170
UINT8   ReadSysIOReg8    (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
171
{
172
    UINT8 rvl;
173
    rvl=0;
174
    //rvl= (UINT8) ReadGenericPciCfg(dev,reg,sizeof(UINT8));
175
	return rvl;
176
}
177
#endif
178
 
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180
#if ( defined ENABLE_PARSER_SYS_IOREAD16 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
181
UINT16	ReadSysIOReg16(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
182
{
183
 
184
    UINT16 rvl;
185
    rvl=0;
186
    //rvl= (UINT16) ReadGenericPciCfg(dev,reg,sizeof(UINT16));
187
    return rvl;
188
 
189
}
190
#endif
191
 
192
 
193
 
194
#if ( defined ENABLE_PARSER_SYS_IOREAD32 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
195
UINT32  ReadSysIOReg32   (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
196
{
197
 
198
    UINT32 rvl;
199
    rvl=0;
200
    //rvl= (UINT32) ReadGenericPciCfg(dev,reg,sizeof(UINT32));
201
    return rvl;
202
}
203
#endif
204
 
205
 
206
// PCI WRITE Access
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208
#if ( defined ENABLE_PARSER_SYS_IOWRITE8 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
209
VOID	WriteSysIOReg8	(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
210
{
211
 
212
    //WriteGenericPciCfg(dev,reg,sizeof(UINT8),(UINT32)value);
213
}
214
 
215
#endif
216
 
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218
#if ( defined ENABLE_PARSER_SYS_IOWRITE16 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
219
VOID    WriteSysIOReg16  (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
220
{
221
 
222
    //WriteGenericPciCfg(dev,reg,sizeof(UINT16),(UINT32)value);
223
}
224
 
225
#endif
226
 
227
 
228
#if ( defined ENABLE_PARSER_SYS_IOWRITE32 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
229
VOID    WriteSysIOReg32  (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
230
{
231
    //WriteGenericPciCfg(dev,reg,sizeof(UINT32),(UINT32)value);
232
}
233
#endif
234
 
235
// ATI Registers Memory Mapped Access
236
 
237
#if ( defined ENABLE_PARSER_REGISTERS_MEMORY_ACCESS || defined ENABLE_ALL_SERVICE_FUNCTIONS)
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239
UINT32	ReadReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
240
{
241
    return CailReadATIRegister(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index);
242
}
243
 
244
VOID	WriteReg32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
245
{
246
    CailWriteATIRegister(pWorkingTableData->pDeviceData->CAIL,(UINT16)pWorkingTableData->Index,pWorkingTableData->DestData32 );
247
}
248
 
249
 
250
VOID	ReadIndReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
251
{
252
    pWorkingTableData->IndirectData = CailReadATIRegister(pWorkingTableData->pDeviceData->CAIL,*(UINT16*)(pWorkingTableData->IndirectIOTablePointer+1));
253
}
254
 
255
VOID	WriteIndReg32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
256
{
257
    CailWriteATIRegister(pWorkingTableData->pDeviceData->CAIL,*(UINT16*)(pWorkingTableData->IndirectIOTablePointer+1),pWorkingTableData->IndirectData );
258
}
259
 
260
#endif
261
 
262
// ATI Registers IO Mapped Access
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264
#if ( defined ENABLE_PARSER_REGISTERS_IO_ACCESS || defined ENABLE_ALL_SERVICE_FUNCTIONS )
265
UINT32	ReadRegIO (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
266
{
267
    //return CailReadATIRegister(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index);
268
    return 0;
269
}
270
VOID	WriteRegIO(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
271
{
272
      //  return CailWriteATIRegister(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index,pWorkingTableData->DestData32 );
273
}
274
#endif
275
 
276
// access to Frame buffer, dummy function, need more information to implement it
277
UINT32	ReadFrameBuffer32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
278
{
279
 
280
    return CailReadFBData(pWorkingTableData->pDeviceData->CAIL, (pWorkingTableData->Index <<2 ));
281
 
282
}
283
 
284
VOID	WriteFrameBuffer32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
285
{
286
    CailWriteFBData(pWorkingTableData->pDeviceData->CAIL,(pWorkingTableData->Index <<2), pWorkingTableData->DestData32);
287
 
288
}
289
 
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291
VOID *AllocateMemory(DEVICE_DATA *pDeviceData , UINT16 MemSize)
292
{
293
    if(MemSize)
294
        return(CailAllocateMemory(pDeviceData->CAIL,MemSize));
295
    else
296
        return NULL;
297
}
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VOID ReleaseMemory(DEVICE_DATA *pDeviceData , WORKING_TABLE_DATA* pWorkingTableData)
301
{
302
    if( pWorkingTableData)
303
        CailReleaseMemory(pDeviceData->CAIL, pWorkingTableData);
304
}
305
 
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UINT32	ReadMC32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
308
{
309
    UINT32 ReadData;
310
    ReadData=(UINT32)CailReadMC(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index);
311
    return ReadData;
312
}
313
 
314
VOID	WriteMC32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
315
{
316
    CailWriteMC(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index,pWorkingTableData->DestData32);
317
}
318
 
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UINT32	ReadPLL32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
320
{
321
    UINT32 ReadData;
322
    ReadData=(UINT32)CailReadPLL(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index);
323
    return ReadData;
324
 
325
}
326
 
327
VOID	WritePLL32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
328
{
329
    CailWritePLL(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index,pWorkingTableData->DestData32);
330
 
331
}
332
 
333
 
334
 
335
#if DEBUG_PARSER>0
336
VOID CD_print_string	(DEVICE_DATA *pDeviceData, UINT8 *str)
337
{
338
    CailVideoDebugPrint( pDeviceData->CAIL, (ULONG_PTR) str, PARSER_STRINGS);
339
}
340
 
341
VOID CD_print_value	(DEVICE_DATA *pDeviceData, ULONG_PTR value, UINT16 value_type )
342
{
343
    CailVideoDebugPrint( pDeviceData->CAIL, (ULONG_PTR)value, value_type);
344
}
345
 
346
#endif
347
 
348
// EOF