Rev 1404 | Rev 1986 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
1246 | serge | 1 | |
2 | #include |
||
3 | #include |
||
4 | #include "radeon_drm.h" |
||
5 | #include "radeon.h" |
||
6 | #include "radeon_object.h" |
||
7 | #include "display.h" |
||
8 | |||
9 | |||
10 | |||
11 | static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y); |
||
12 | |||
13 | |||
14 | |||
15 | |||
1313 | serge | 16 | |
17 | |||
1246 | serge | 18 | { |
19 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
||
20 | struct radeon_device *rdev = crtc->dev->dev_private; |
||
21 | |||
22 | |||
23 | WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset); |
||
24 | WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN | |
||
25 | (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT)); |
||
26 | } else { |
||
27 | switch (radeon_crtc->crtc_id) { |
||
28 | case 0: |
||
29 | WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL); |
||
30 | break; |
||
31 | case 1: |
||
32 | WREG32(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL); |
||
33 | break; |
||
34 | default: |
||
35 | return; |
||
36 | } |
||
37 | |||
38 | |||
39 | (RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)), |
||
40 | ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK)); |
||
41 | } |
||
42 | } |
||
43 | |||
44 | |||
45 | { |
||
46 | struct radeon_device *rdev = crtc->dev->dev_private; |
||
47 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
||
48 | uint32_t cur_lock; |
||
49 | |||
50 | |||
51 | cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset); |
||
52 | if (lock) |
||
53 | cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK; |
||
54 | else |
||
55 | cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK; |
||
56 | WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); |
||
57 | } else { |
||
58 | cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); |
||
59 | if (lock) |
||
60 | cur_lock |= RADEON_CUR_LOCK; |
||
61 | else |
||
62 | cur_lock &= ~RADEON_CUR_LOCK; |
||
63 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock); |
||
64 | } |
||
65 | } |
||
66 | |||
67 | |||
68 | { |
||
69 | struct radeon_device *rdev; |
||
70 | struct radeon_crtc *radeon_crtc; |
||
71 | cursor_t *old; |
||
72 | uint32_t gpu_addr; |
||
73 | |||
74 | |||
75 | radeon_crtc = to_radeon_crtc(rdisplay->crtc); |
||
76 | |||
77 | |||
78 | |||
79 | |||
80 | gpu_addr = radeon_bo_gpu_offset(cursor->robj); |
||
1404 | serge | 81 | |
1246 | serge | 82 | |
83 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); |
||
84 | else { |
||
85 | radeon_crtc->legacy_cursor_offset = gpu_addr - rdev->mc.vram_start; |
||
1430 | serge | 86 | /* offset is from DISP(2)_BASE_ADDRESS */ |
1246 | serge | 87 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); |
88 | } |
||
89 | |||
90 | |||
91 | }; |
||
92 | |||
93 | |||
94 | { |
||
95 | struct radeon_device *rdev; |
||
96 | rdev = (struct radeon_device *)rdisplay->ddev->dev_private; |
||
97 | struct drm_crtc *crtc = rdisplay->crtc; |
||
98 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
||
99 | |||
100 | |||
101 | int hot_y = cursor->hot_y; |
||
102 | |||
103 | |||
104 | if (ASIC_IS_AVIVO(rdev)) |
||
105 | { |
||
106 | int w = 32; |
||
107 | int i = 0; |
||
108 | struct drm_crtc *crtc_p; |
||
109 | |||
110 | |||
111 | // x += crtc->x; |
||
112 | // y += crtc->y; |
||
113 | |||
114 | |||
115 | #if 0 |
||
116 | /* avivo cursor image can't end on 128 pixel boundry or |
||
117 | * go past the end of the frame if both crtcs are enabled |
||
118 | */ |
||
119 | list_for_each_entry(crtc_p, &crtc->dev->mode_config.crtc_list, head) { |
||
120 | if (crtc_p->enabled) |
||
121 | i++; |
||
122 | } |
||
123 | if (i > 1) { |
||
124 | int cursor_end, frame_end; |
||
125 | |||
126 | |||
127 | frame_end = crtc->x + crtc->mode.crtc_hdisplay; |
||
128 | if (cursor_end >= frame_end) { |
||
129 | w = w - (cursor_end - frame_end); |
||
130 | if (!(frame_end & 0x7f)) |
||
131 | w--; |
||
132 | } else { |
||
133 | if (!(cursor_end & 0x7f)) |
||
134 | w--; |
||
135 | } |
||
136 | if (w <= 0) |
||
137 | w = 1; |
||
138 | } |
||
139 | #endif |
||
140 | WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset, |
||
141 | (x << 16) | y); |
||
142 | WREG32(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset, |
||
143 | (hot_x << 16) | hot_y); |
||
144 | WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset, |
||
145 | ((w - 1) << 16) | 31); |
||
146 | } else { |
||
147 | if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN) |
||
148 | y *= 2; |
||
149 | |||
150 | |||
1404 | serge | 151 | int xorg =0, yorg=0; |
152 | |||
153 | |||
154 | y = y - hot_y; |
||
155 | |||
156 | |||
157 | { |
||
158 | xorg = -x + 1; |
||
159 | x = 0; |
||
160 | } |
||
161 | |||
162 | |||
163 | { |
||
164 | yorg = -hot_y + 1; |
||
165 | y = 0; |
||
166 | }; |
||
167 | |||
168 | |||
169 | (RADEON_CUR_LOCK | (xorg << 16) | yorg )); |
||
170 | WREG32(RADEON_CUR_HORZ_VERT_POSN, |
||
171 | (RADEON_CUR_LOCK | (x << 16) | y)); |
||
1246 | serge | 172 | |
173 | |||
1404 | serge | 174 | |
175 | |||
1246 | serge | 176 | WREG32(RADEON_CUR_OFFSET, |
1404 | serge | 177 | (gpu_addr - rdev->mc.vram_start + (yorg * 256))); |
1430 | serge | 178 | } |
1246 | serge | 179 | radeon_lock_cursor_kms(crtc, false); |
180 | } |
||
181 | |||
182 | |||
183 | { |
||
184 | static char name[4]; |
||
185 | |||
186 | |||
187 | name[1] = ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@'; |
||
188 | name[2] = (x[1] & 0x1F) + '@'; |
||
189 | name[3] = 0; |
||
190 | |||
191 | |||
192 | } |
||
193 | |||
194 | |||
195 | videomode_t *reqmode, bool strict) |
||
1403 | serge | 196 | { |
1246 | serge | 197 | struct drm_display_mode *mode = NULL, *tmpmode; |
198 | |||
199 | |||
200 | |||
201 | |||
202 | |||
203 | |||
204 | reqmode->width, reqmode->height, reqmode->freq); |
||
205 | |||
206 | |||
207 | { |
||
208 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
||
209 | (drm_mode_height(tmpmode) == reqmode->height) && |
||
210 | (drm_mode_vrefresh(tmpmode) == reqmode->freq) ) |
||
211 | { |
||
212 | mode = tmpmode; |
||
213 | goto do_set; |
||
214 | } |
||
215 | }; |
||
216 | |||
217 | |||
218 | { |
||
219 | list_for_each_entry(tmpmode, &connector->modes, head) |
||
220 | { |
||
221 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
||
222 | (drm_mode_height(tmpmode) == reqmode->height) ) |
||
223 | { |
||
224 | mode = tmpmode; |
||
225 | goto do_set; |
||
226 | } |
||
227 | }; |
||
228 | }; |
||
229 | |||
230 | |||
231 | |||
232 | |||
233 | { |
||
234 | struct drm_framebuffer *fb; |
||
235 | struct drm_encoder *encoder; |
||
236 | struct drm_crtc *crtc; |
||
237 | |||
238 | |||
239 | char *con_name; |
||
240 | char *enc_name; |
||
241 | |||
242 | |||
243 | crtc = encoder->crtc; |
||
244 | |||
245 | |||
246 | struct drm_framebuffer, filp_head); |
||
247 | |||
248 | |||
249 | |||
250 | |||
251 | // manufacturer_name(con_edid + 0x08), |
||
252 | // (unsigned short)(con_edid[0x0A] + (con_edid[0x0B] << 8)), |
||
253 | // (unsigned int)(con_edid[0x0C] + (con_edid[0x0D] << 8) |
||
254 | // + (con_edid[0x0E] << 16) + (con_edid[0x0F] << 24))); |
||
255 | |||
256 | |||
257 | enc_name = drm_get_encoder_name(encoder); |
||
258 | |||
259 | |||
260 | reqmode->width, reqmode->height, con_name, enc_name); |
||
261 | |||
262 | |||
263 | fb->height = reqmode->height; |
||
264 | fb->pitch = radeon_align_pitch(dev->dev_private, reqmode->width, 32, false) * ((32 + 1) / 8); |
||
265 | |||
266 | |||
267 | crtc->enabled = true; |
||
268 | rdisplay->crtc = crtc; |
||
269 | |||
270 | |||
271 | |||
272 | |||
273 | radeon_show_cursor_kms(crtc); |
||
274 | |||
275 | |||
276 | { |
||
277 | rdisplay->width = fb->width; |
||
278 | rdisplay->height = fb->height; |
||
279 | rdisplay->pitch = fb->pitch; |
||
280 | rdisplay->vrefresh = drm_mode_vrefresh(mode); |
||
281 | |||
282 | |||
283 | |||
284 | |||
285 | fb->width, fb->height, fb->pitch); |
||
286 | } |
||
287 | else |
||
288 | DRM_ERROR("failed to set mode %d_%d on crtc %p\n", |
||
289 | fb->width, fb->height, crtc); |
||
290 | } |
||
291 | |||
292 | |||
293 | return ret; |
||
294 | }; |
||
295 | |||
296 | |||
297 | { |
||
298 | struct drm_display_mode *mode; |
||
299 | int count = 0; |
||
300 | |||
301 | |||
302 | { |
||
303 | count++; |
||
304 | }; |
||
305 | return count; |
||
306 | }; |
||
307 | |||
308 | |||
309 | { |
||
310 | struct drm_connector *connector; |
||
311 | struct drm_connector *def_connector = NULL; |
||
312 | |||
313 | |||
314 | { |
||
315 | struct drm_encoder *encoder; |
||
316 | struct drm_crtc *crtc; |
||
317 | |||
318 | |||
319 | continue; |
||
320 | |||
321 | |||
322 | if( encoder == NULL) |
||
323 | continue; |
||
324 | |||
325 | |||
326 | if(crtc == NULL) |
||
327 | continue; |
||
328 | |||
329 | |||
330 | break; |
||
331 | }; |
||
332 | |||
333 | |||
334 | }; |
||
335 | |||
336 | |||
1403 | serge | 337 | { |
1246 | serge | 338 | struct drm_device *dev; |
339 | |||
340 | |||
341 | bool retval = false; |
||
342 | u32_t ifl; |
||
343 | |||
344 | |||
345 | |||
346 | |||
347 | |||
348 | |||
349 | |||
350 | |||
351 | { |
||
352 | list_for_each_entry(cursor, &rdisplay->cursors, list) |
||
353 | { |
||
354 | init_cursor(cursor); |
||
355 | }; |
||
356 | }; |
||
357 | safe_sti(ifl); |
||
358 | |||
359 | |||
360 | if( rdisplay->connector == 0 ) |
||
361 | { |
||
362 | dbgprintf("no active connectors\n"); |
||
363 | return false; |
||
364 | }; |
||
365 | |||
366 | |||
367 | rdisplay->supported_modes = count_connector_modes(rdisplay->connector); |
||
368 | |||
369 | |||
1268 | serge | 370 | rdisplay->width, rdisplay->height, rdisplay->vrefresh); |
371 | dbgprintf("user mode mode %d x %d x %d\n", |
||
372 | usermode->width, usermode->height, usermode->freq); |
||
373 | |||
374 | |||
1246 | serge | 375 | (usermode->height != 0) && |
376 | ( (usermode->width != rdisplay->width) || |
||
377 | (usermode->height != rdisplay->height) || |
||
378 | (usermode->freq != rdisplay->vrefresh) ) ) |
||
379 | { |
||
380 | |||
381 | |||
382 | } |
||
383 | |||
384 | |||
385 | { |
||
386 | rdisplay->restore_cursor(0,0); |
||
387 | rdisplay->init_cursor = init_cursor; |
||
388 | rdisplay->select_cursor = select_cursor_kms; |
||
389 | rdisplay->show_cursor = NULL; |
||
390 | rdisplay->move_cursor = move_cursor_kms; |
||
391 | rdisplay->restore_cursor = restore_cursor; |
||
392 | rdisplay->disable_mouse = disable_mouse; |
||
1313 | serge | 393 | |
1268 | serge | 394 | |
395 | radeon_show_cursor_kms(rdisplay->crtc); |
||
1246 | serge | 396 | }; |
397 | safe_sti(ifl); |
||
398 | |||
399 | |||
400 | |||
401 | |||
402 | }; |
||
403 | |||
404 | |||
1403 | serge | 405 | { |
1246 | serge | 406 | int err = -1; |
407 | |||
408 | |||
409 | |||
410 | |||
411 | |||
412 | |||
413 | { |
||
414 | *count = rdisplay->supported_modes; |
||
415 | err = 0; |
||
416 | } |
||
417 | else if( mode != NULL ) |
||
418 | { |
||
419 | struct drm_display_mode *drmmode; |
||
420 | int i = 0; |
||
421 | |||
422 | |||
423 | *count = rdisplay->supported_modes; |
||
424 | |||
425 | |||
426 | { |
||
427 | if( i < *count) |
||
428 | { |
||
429 | mode->width = drm_mode_width(drmmode); |
||
430 | mode->height = drm_mode_height(drmmode); |
||
431 | mode->bpp = 32; |
||
432 | mode->freq = drm_mode_vrefresh(drmmode); |
||
433 | i++; |
||
434 | mode++; |
||
435 | } |
||
436 | else break; |
||
437 | }; |
||
438 | *count = i; |
||
439 | err = 0; |
||
440 | }; |
||
441 | LEAVE(); |
||
442 | return err; |
||
443 | } |
||
444 | |||
445 | |||
1403 | serge | 446 | { |
1246 | serge | 447 | int err = -1; |
448 | |||
449 | |||
450 | |||
451 | |||
452 | mode->width, mode->height, mode->freq); |
||
453 | |||
454 | |||
455 | (mode->height != 0) && |
||
456 | (mode->freq != 0 ) && |
||
457 | ( (mode->width != rdisplay->width) || |
||
458 | (mode->height != rdisplay->height) || |
||
459 | (mode->freq != rdisplay->vrefresh) ) ) |
||
460 | { |
||
461 | if( set_mode(rdisplay->ddev, rdisplay->connector, mode, true) ) |
||
462 | err = 0; |
||
463 | }; |
||
464 | |||
465 | |||
466 | return err; |
||
467 | }; |
||
468 | |||
469 | |||
1404 | serge | 470 | void drm_helper_disable_unused_functions(struct drm_device *dev) |
471 | { |
||
472 | struct drm_encoder *encoder; |
||
473 | struct drm_connector *connector; |
||
474 | struct drm_encoder_helper_funcs *encoder_funcs; |
||
475 | struct drm_crtc *crtc; |
||
476 | |||
477 | |||
478 | if (!connector->encoder) |
||
479 | continue; |
||
480 | if (connector->status == connector_status_disconnected) |
||
481 | connector->encoder = NULL; |
||
482 | } |
||
483 | |||
484 | |||
485 | encoder_funcs = encoder->helper_private; |
||
486 | if (!drm_helper_encoder_in_use(encoder)) { |
||
487 | if (encoder_funcs->disable) |
||
488 | (*encoder_funcs->disable)(encoder); |
||
489 | else |
||
490 | (*encoder_funcs->dpms)(encoder, DRM_MODE_DPMS_OFF); |
||
491 | /* disconnector encoder from any connector */ |
||
492 | encoder->crtc = NULL; |
||
493 | } |
||
494 | } |
||
495 | |||
496 | |||
497 | struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; |
||
498 | crtc->enabled = drm_helper_crtc_in_use(crtc); |
||
499 | if (!crtc->enabled) { |
||
500 | crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF); |
||
501 | crtc->fb = NULL; |
||
502 | } |
||
503 | } |
||
504 | } |
||
505 | #endif>><>><>><>><>><>><>><>>>><>><>><>=>><>><> |
||
506 |