Subversion Repositories Kolibri OS

Rev

Rev 1313 | Rev 1404 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
1246 serge 1
 
2
#include 
3
#include 
4
#include "radeon_drm.h"
5
#include "radeon.h"
6
#include "radeon_object.h"
7
#include "display.h"
8
9
 
10
 
11
static void       __stdcall move_cursor_kms(cursor_t *cursor, int x, int y);
12
13
 
14
15
 
1313 serge 16
17
 
1246 serge 18
{
19
    struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
20
    struct radeon_device *rdev = crtc->dev->dev_private;
21
22
 
23
        WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);
24
        WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |
25
                 (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
26
    } else {
27
        switch (radeon_crtc->crtc_id) {
28
        case 0:
29
            WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
30
            break;
31
        case 1:
32
            WREG32(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL);
33
            break;
34
        default:
35
            return;
36
        }
37
38
 
39
                      (RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)),
40
             ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK));
41
    }
42
}
43
44
 
45
{
46
    struct radeon_device *rdev = crtc->dev->dev_private;
47
    struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
48
    uint32_t cur_lock;
49
50
 
51
        cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset);
52
        if (lock)
53
            cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK;
54
        else
55
            cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK;
56
        WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);
57
    } else {
58
        cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset);
59
        if (lock)
60
            cur_lock |= RADEON_CUR_LOCK;
61
        else
62
            cur_lock &= ~RADEON_CUR_LOCK;
63
        WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock);
64
    }
65
}
66
67
 
68
{
69
    struct radeon_device *rdev;
70
    struct radeon_crtc   *radeon_crtc;
71
    cursor_t *old;
72
    uint32_t  gpu_addr;
73
74
 
75
    radeon_crtc = to_radeon_crtc(rdisplay->crtc);
76
77
 
78
79
 
80
//    gpu_addr = cursor->robj->gpu_addr;
1403 serge 81
1246 serge 82
 
83
        WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr);
84
    else {
85
        radeon_crtc->legacy_cursor_offset = gpu_addr - rdev->mc.vram_location;
1275 serge 86
        /* offset is from DISP(2)_BASE_ADDRESS */
1246 serge 87
        WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset);
88
    }
89
90
 
91
};
92
93
 
94
{
95
    struct radeon_device *rdev;
96
    rdev = (struct radeon_device *)rdisplay->ddev->dev_private;
97
    struct drm_crtc *crtc = rdisplay->crtc;
98
    struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
99
100
 
101
    int hot_y = cursor->hot_y;
102
103
 
104
    if (ASIC_IS_AVIVO(rdev))
105
    {
106
        int w = 32;
107
        int i = 0;
108
        struct drm_crtc *crtc_p;
109
110
 
111
//        x += crtc->x;
112
//        y += crtc->y;
113
114
 
115
#if 0
116
        /* avivo cursor image can't end on 128 pixel boundry or
117
         * go past the end of the frame if both crtcs are enabled
118
         */
119
        list_for_each_entry(crtc_p, &crtc->dev->mode_config.crtc_list, head) {
120
            if (crtc_p->enabled)
121
                i++;
122
        }
123
        if (i > 1) {
124
            int cursor_end, frame_end;
125
126
 
127
            frame_end = crtc->x + crtc->mode.crtc_hdisplay;
128
            if (cursor_end >= frame_end) {
129
                w = w - (cursor_end - frame_end);
130
                if (!(frame_end & 0x7f))
131
                    w--;
132
            } else {
133
                if (!(cursor_end & 0x7f))
134
                    w--;
135
            }
136
            if (w <= 0)
137
                w = 1;
138
        }
139
#endif
140
        WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset,
141
               (x << 16) | y);
142
        WREG32(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset,
143
               (hot_x << 16) | hot_y);
144
        WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset,
145
               ((w - 1) << 16) | 31);
146
    } else {
147
        if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)
148
            y *= 2;
149
150
 
151
               (RADEON_CUR_LOCK | (hot_x << 16) | hot_y ));
1275 serge 152
        WREG32(RADEON_CUR_HORZ_VERT_POSN + radeon_crtc->crtc_offset,
1246 serge 153
               (RADEON_CUR_LOCK | (x << 16) | y));
154
155
 
156
        WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset,
157
         (radeon_crtc->legacy_cursor_offset + (hot_y * 256)));
158
    }
159
    radeon_lock_cursor_kms(crtc, false);
160
}
161
162
 
163
{
164
    static char name[4];
165
166
 
167
    name[1] = ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@';
168
    name[2] = (x[1] & 0x1F) + '@';
169
    name[3] = 0;
170
171
 
172
}
173
174
 
175
              videomode_t *reqmode, bool strict)
1403 serge 176
{
1246 serge 177
    struct drm_display_mode  *mode = NULL, *tmpmode;
178
179
 
180
181
 
182
183
 
184
               reqmode->width, reqmode->height, reqmode->freq);
185
186
 
187
    {
188
        if( (drm_mode_width(tmpmode)    == reqmode->width)  &&
189
            (drm_mode_height(tmpmode)   == reqmode->height) &&
190
            (drm_mode_vrefresh(tmpmode) == reqmode->freq) )
191
        {
192
            mode = tmpmode;
193
            goto do_set;
194
        }
195
    };
196
197
 
198
    {
199
        list_for_each_entry(tmpmode, &connector->modes, head)
200
        {
201
            if( (drm_mode_width(tmpmode)  == reqmode->width)  &&
202
                (drm_mode_height(tmpmode) == reqmode->height) )
203
            {
204
                mode = tmpmode;
205
                goto do_set;
206
            }
207
        };
208
    };
209
210
 
211
212
 
213
    {
214
        struct drm_framebuffer   *fb;
215
        struct drm_encoder       *encoder;
216
        struct drm_crtc          *crtc;
217
218
 
219
        char *con_name;
220
        char *enc_name;
221
222
 
223
        crtc = encoder->crtc;
224
225
 
226
                              struct drm_framebuffer, filp_head);
227
228
 
229
230
 
231
//        manufacturer_name(con_edid + 0x08),
232
//        (unsigned short)(con_edid[0x0A] + (con_edid[0x0B] << 8)),
233
//        (unsigned int)(con_edid[0x0C] + (con_edid[0x0D] << 8)
234
//            + (con_edid[0x0E] << 16) + (con_edid[0x0F] << 24)));
235
236
 
237
        enc_name = drm_get_encoder_name(encoder);
238
239
 
240
                   reqmode->width, reqmode->height, con_name, enc_name);
241
242
 
243
        fb->height = reqmode->height;
244
        fb->pitch  = radeon_align_pitch(dev->dev_private, reqmode->width, 32, false) * ((32 + 1) / 8);
245
246
 
247
        crtc->enabled = true;
248
        rdisplay->crtc = crtc;
249
250
 
251
252
 
253
        radeon_show_cursor_kms(crtc);
254
255
 
256
        {
257
            rdisplay->width    = fb->width;
258
            rdisplay->height   = fb->height;
259
            rdisplay->pitch    = fb->pitch;
260
            rdisplay->vrefresh = drm_mode_vrefresh(mode);
261
262
 
263
264
 
265
                       fb->width, fb->height, fb->pitch);
266
        }
267
        else
268
            DRM_ERROR("failed to set mode %d_%d on crtc %p\n",
269
                       fb->width, fb->height, crtc);
270
    }
271
272
 
273
    return ret;
274
};
275
276
 
277
{
278
    struct drm_display_mode  *mode;
279
    int count = 0;
280
281
 
282
    {
283
        count++;
284
    };
285
    return count;
286
};
287
288
 
289
{
290
    struct drm_connector  *connector;
291
    struct drm_connector  *def_connector = NULL;
292
293
 
294
    {
295
        struct drm_encoder  *encoder;
296
        struct drm_crtc     *crtc;
297
298
 
299
            continue;
300
301
 
302
        if( encoder == NULL)
303
            continue;
304
305
 
306
        if(crtc == NULL)
307
            continue;
308
309
 
310
        break;
311
    };
312
313
 
314
};
315
316
 
1403 serge 317
{
1246 serge 318
    struct drm_device   *dev;
319
320
 
321
    bool                 retval = false;
322
    u32_t                ifl;
323
324
 
325
326
 
327
328
 
329
330
 
331
    {
332
        list_for_each_entry(cursor, &rdisplay->cursors, list)
333
        {
334
            init_cursor(cursor);
335
        };
336
    };
337
    safe_sti(ifl);
338
339
 
340
    if( rdisplay->connector == 0 )
341
    {
342
        dbgprintf("no active connectors\n");
343
        return false;
344
    };
345
346
 
347
    rdisplay->supported_modes = count_connector_modes(rdisplay->connector);
348
349
 
1268 serge 350
              rdisplay->width, rdisplay->height, rdisplay->vrefresh);
351
    dbgprintf("user mode mode %d x %d x %d\n",
352
              usermode->width, usermode->height, usermode->freq);
353
354
 
1246 serge 355
        (usermode->height != 0) &&
356
        ( (usermode->width  != rdisplay->width)  ||
357
          (usermode->height != rdisplay->height) ||
358
          (usermode->freq   != rdisplay->vrefresh) ) )
359
    {
360
361
 
362
    }
363
364
 
365
    {
366
        rdisplay->restore_cursor(0,0);
367
        rdisplay->init_cursor    = init_cursor;
368
        rdisplay->select_cursor  = select_cursor_kms;
369
        rdisplay->show_cursor    = NULL;
370
        rdisplay->move_cursor    = move_cursor_kms;
371
        rdisplay->restore_cursor = restore_cursor;
372
        rdisplay->disable_mouse  = disable_mouse;
1313 serge 373
1268 serge 374
 
375
        radeon_show_cursor_kms(rdisplay->crtc);
1246 serge 376
    };
377
    safe_sti(ifl);
378
379
 
380
381
 
382
};
383
384
 
1403 serge 385
{
1246 serge 386
    int err = -1;
387
388
 
389
390
 
391
392
 
393
    {
394
        *count = rdisplay->supported_modes;
395
        err = 0;
396
    }
397
    else if( mode != NULL )
398
    {
399
        struct drm_display_mode  *drmmode;
400
        int i = 0;
401
402
 
403
            *count = rdisplay->supported_modes;
404
405
 
406
        {
407
            if( i < *count)
408
            {
409
                mode->width  = drm_mode_width(drmmode);
410
                mode->height = drm_mode_height(drmmode);
411
                mode->bpp    = 32;
412
                mode->freq   = drm_mode_vrefresh(drmmode);
413
                i++;
414
                mode++;
415
            }
416
            else break;
417
        };
418
        *count = i;
419
        err = 0;
420
    };
421
    LEAVE();
422
    return err;
423
}
424
425
 
1403 serge 426
{
1246 serge 427
    int err = -1;
428
429
 
430
431
 
432
               mode->width, mode->height, mode->freq);
433
434
 
435
        (mode->height != 0)  &&
436
        (mode->freq   != 0 ) &&
437
        ( (mode->width   != rdisplay->width)  ||
438
          (mode->height  != rdisplay->height) ||
439
          (mode->freq    != rdisplay->vrefresh) ) )
440
    {
441
        if( set_mode(rdisplay->ddev, rdisplay->connector, mode, true) )
442
            err = 0;
443
    };
444
445
 
446
    return err;
447
};
448