Subversion Repositories Kolibri OS

#include 

#include "radeon.h"

#include "radeon_object.h"

#include "bitmap.h"

#include "display.h"

static void       __stdcall move_cursor(cursor_t *cursor, int x, int y);

{};

{

    struct radeon_device *rdev;

    uint32_t *src;

    int       r;

                     4096, false, RADEON_GEM_DOMAIN_VRAM, 0, NULL, NULL, &cursor->robj);

        return r;

    if (unlikely(r != 0))

        return r;

    if (unlikely(r != 0))

        return r;

    if (r) {

         DRM_ERROR("radeon: failed to map cursor (%d).\n", r);

         return r;

    };

    {

        for(j = 0; j < 32; j++)

            *bits++ = *src++;

        for(j = 32; j < CURSOR_WIDTH; j++)

            *bits++ = 0;

    }

    for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++)

        *bits++ = 0;

};

{

    list_del(&cursor->list);

    radeon_bo_unpin(cursor->robj);

    KernelFree(cursor->data);

    __DestroyObject(cursor);

};

{

    struct radeon_device *rdev = (struct radeon_device *)os_display->ddev->dev_private;

        WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL);

        WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_EN |

               EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT));

    } else if (ASIC_IS_AVIVO(rdev)) {

        WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL);

        WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |

                 (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));

    } else {

        WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);

        WREG32_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN |

                      (RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)),

             ~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK));

    }

}

{

    struct radeon_device *rdev;

    cursor_t *old;

    uint32_t  gpu_addr;

    gpu_addr = radeon_bo_gpu_offset(cursor->robj);

    {

        WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH, 0);

        WREG32(EVERGREEN_CUR_SURFACE_ADDRESS, gpu_addr);

    }

    else if (ASIC_IS_AVIVO(rdev))

    {

        if (rdev->family >= CHIP_RV770)

            WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0);

        WREG32(AVIVO_D1CUR_SURFACE_ADDRESS,  gpu_addr);

    }

    else {

        WREG32(RADEON_CUR_OFFSET, gpu_addr - rdev->mc.vram_start);

    }

};

{

    struct radeon_device *rdev;

		cur_lock = RREG32(EVERGREEN_CUR_UPDATE);

		if (lock)

			cur_lock |= EVERGREEN_CURSOR_UPDATE_LOCK;

		else

			cur_lock &= ~EVERGREEN_CURSOR_UPDATE_LOCK;

        WREG32(EVERGREEN_CUR_UPDATE, cur_lock);

	} else if (ASIC_IS_AVIVO(rdev)) {

        cur_lock = RREG32(AVIVO_D1CUR_UPDATE);

        if (lock)

            cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK;

        else

            cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK;

        WREG32(AVIVO_D1CUR_UPDATE, cur_lock);

    } else {

        cur_lock = RREG32(RADEON_CUR_OFFSET);

        if (lock)

            cur_lock |= RADEON_CUR_LOCK;

        else

            cur_lock &= ~RADEON_CUR_LOCK;

        WREG32(RADEON_CUR_OFFSET, cur_lock);

    }

}

{

    struct radeon_device *rdev;

    rdev = (struct radeon_device *)os_display->ddev->dev_private;

    int hot_y = cursor->hot_y;

    int w     = 32;

        WREG32(EVERGREEN_CUR_POSITION,(x << 16) | y);

        WREG32(EVERGREEN_CUR_HOT_SPOT, (hot_x << 16) | hot_y);

        WREG32(EVERGREEN_CUR_SIZE, ((w - 1) << 16) | 31);

    } else if (ASIC_IS_AVIVO(rdev)) {

        WREG32(AVIVO_D1CUR_POSITION, (x << 16) | y);

        WREG32(AVIVO_D1CUR_HOT_SPOT, (hot_x << 16) | hot_y);

        WREG32(AVIVO_D1CUR_SIZE, ((w - 1) << 16) | 31);

    } else {

        int       xorg =0, yorg=0;

        y = y - hot_y;

        {

            xorg = -x + 1;

            x = 0;

        }

        {

            yorg = -hot_y + 1;

            y = 0;

        };

               (RADEON_CUR_LOCK | (xorg << 16) | yorg ));

        WREG32(RADEON_CUR_HORZ_VERT_POSN,

               (RADEON_CUR_LOCK | (x << 16) | y));

        WREG32(RADEON_CUR_OFFSET,

         (gpu_addr - rdev->mc.vram_start + (yorg * 256)));

    }

    radeon_lock_cursor(false);

}

{

};

{

    struct drm_device   *dev;

    bool      retval = true;

    u32       ifl;

    {

        list_for_each_entry(cursor, &os_display->cursors, list)

        {

            init_cursor(cursor);

        };

        os_display->init_cursor    = init_cursor;

        os_display->select_cursor  = select_cursor;

        os_display->show_cursor    = NULL;

        os_display->move_cursor    = move_cursor;

        os_display->restore_cursor = restore_cursor;

        os_display->disable_mouse  = disable_mouse;

        radeon_show_cursor();

    };

    safe_sti(ifl);

};

{

#define BYTES_PER_LONG (BITS_PER_LONG/8)

#define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG))

    int fb_info_size = sizeof(struct fb_info);

    struct fb_info *info;

    char *p;

        fb_info_size += PADDING;

        return NULL;

        info->par = p + fb_info_size;

#undef PADDING

#undef BYTES_PER_LONG

}

{

    kfree(info);

}

#define I2F_FRAC_BITS  23

#define I2F_MASK ((1 << I2F_FRAC_BITS) - 1)

 * Converts unsigned integer into 32-bit IEEE floating point representation.

 * Will be exact from 0 to 2^24.  Above that, we round towards zero

 * as the fractional bits will not fit in a float.  (It would be better to

 * round towards even as the fpu does, but that is slower.)

 */

__pure uint32_t int2float(uint32_t x)

{

    uint32_t msb, exponent, fraction;

    if (!x) return 0;

    msb = __fls(x);

     * Use a rotate instead of a shift because that works both leftwards

     * and rightwards due to the mod(32) behaviour.  This means we don't

     * need to check to see if we are above 2^24 or not.

     */

    fraction = ror32(x, (msb - I2F_FRAC_BITS) & 0x1f) & I2F_MASK;

    exponent = (127 + msb) << I2F_FRAC_BITS;

}