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5078 | serge | 1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice shall be included in |
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12 | * all copies or substantial portions of the Software. |
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13 | * |
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14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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20 | * OTHER DEALINGS IN THE SOFTWARE. |
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21 | * |
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22 | */ |
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23 | |||
24 | #include |
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25 | #include |
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26 | #include |
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27 | #include |
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28 | #include "radeon.h" |
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29 | #include "radeon_ucode.h" |
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30 | |||
31 | static void radeon_ucode_print_common_hdr(const struct common_firmware_header *hdr) |
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32 | { |
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33 | DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes)); |
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34 | DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes)); |
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35 | DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major)); |
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36 | DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor)); |
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37 | DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major)); |
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38 | DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor)); |
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39 | DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version)); |
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40 | DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes)); |
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41 | DRM_DEBUG("ucode_array_offset_bytes: %u\n", |
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42 | le32_to_cpu(hdr->ucode_array_offset_bytes)); |
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43 | DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32)); |
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44 | } |
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45 | |||
46 | void radeon_ucode_print_mc_hdr(const struct common_firmware_header *hdr) |
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47 | { |
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48 | uint16_t version_major = le16_to_cpu(hdr->header_version_major); |
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49 | uint16_t version_minor = le16_to_cpu(hdr->header_version_minor); |
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50 | |||
51 | DRM_DEBUG("MC\n"); |
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52 | radeon_ucode_print_common_hdr(hdr); |
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53 | |||
54 | if (version_major == 1) { |
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55 | const struct mc_firmware_header_v1_0 *mc_hdr = |
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56 | container_of(hdr, struct mc_firmware_header_v1_0, header); |
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57 | |||
58 | DRM_DEBUG("io_debug_size_bytes: %u\n", |
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59 | le32_to_cpu(mc_hdr->io_debug_size_bytes)); |
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60 | DRM_DEBUG("io_debug_array_offset_bytes: %u\n", |
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61 | le32_to_cpu(mc_hdr->io_debug_array_offset_bytes)); |
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62 | } else { |
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63 | DRM_ERROR("Unknown MC ucode version: %u.%u\n", version_major, version_minor); |
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64 | } |
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65 | } |
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66 | |||
67 | void radeon_ucode_print_smc_hdr(const struct common_firmware_header *hdr) |
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68 | { |
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69 | uint16_t version_major = le16_to_cpu(hdr->header_version_major); |
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70 | uint16_t version_minor = le16_to_cpu(hdr->header_version_minor); |
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71 | |||
72 | DRM_DEBUG("SMC\n"); |
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73 | radeon_ucode_print_common_hdr(hdr); |
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74 | |||
75 | if (version_major == 1) { |
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76 | const struct smc_firmware_header_v1_0 *smc_hdr = |
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77 | container_of(hdr, struct smc_firmware_header_v1_0, header); |
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78 | |||
79 | DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr)); |
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80 | } else { |
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81 | DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor); |
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82 | } |
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83 | } |
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84 | |||
85 | void radeon_ucode_print_gfx_hdr(const struct common_firmware_header *hdr) |
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86 | { |
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87 | uint16_t version_major = le16_to_cpu(hdr->header_version_major); |
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88 | uint16_t version_minor = le16_to_cpu(hdr->header_version_minor); |
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89 | |||
90 | DRM_DEBUG("GFX\n"); |
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91 | radeon_ucode_print_common_hdr(hdr); |
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92 | |||
93 | if (version_major == 1) { |
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94 | const struct gfx_firmware_header_v1_0 *gfx_hdr = |
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95 | container_of(hdr, struct gfx_firmware_header_v1_0, header); |
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96 | |||
97 | DRM_DEBUG("ucode_feature_version: %u\n", |
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98 | le32_to_cpu(gfx_hdr->ucode_feature_version)); |
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99 | DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset)); |
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100 | DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size)); |
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101 | } else { |
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102 | DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor); |
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103 | } |
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104 | } |
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105 | |||
106 | void radeon_ucode_print_rlc_hdr(const struct common_firmware_header *hdr) |
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107 | { |
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108 | uint16_t version_major = le16_to_cpu(hdr->header_version_major); |
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109 | uint16_t version_minor = le16_to_cpu(hdr->header_version_minor); |
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110 | |||
111 | DRM_DEBUG("RLC\n"); |
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112 | radeon_ucode_print_common_hdr(hdr); |
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113 | |||
114 | if (version_major == 1) { |
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115 | const struct rlc_firmware_header_v1_0 *rlc_hdr = |
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116 | container_of(hdr, struct rlc_firmware_header_v1_0, header); |
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117 | |||
118 | DRM_DEBUG("ucode_feature_version: %u\n", |
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119 | le32_to_cpu(rlc_hdr->ucode_feature_version)); |
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120 | DRM_DEBUG("save_and_restore_offset: %u\n", |
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121 | le32_to_cpu(rlc_hdr->save_and_restore_offset)); |
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122 | DRM_DEBUG("clear_state_descriptor_offset: %u\n", |
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123 | le32_to_cpu(rlc_hdr->clear_state_descriptor_offset)); |
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124 | DRM_DEBUG("avail_scratch_ram_locations: %u\n", |
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125 | le32_to_cpu(rlc_hdr->avail_scratch_ram_locations)); |
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126 | DRM_DEBUG("master_pkt_description_offset: %u\n", |
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127 | le32_to_cpu(rlc_hdr->master_pkt_description_offset)); |
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128 | } else { |
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129 | DRM_ERROR("Unknown RLC ucode version: %u.%u\n", version_major, version_minor); |
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130 | } |
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131 | } |
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132 | |||
133 | void radeon_ucode_print_sdma_hdr(const struct common_firmware_header *hdr) |
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134 | { |
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135 | uint16_t version_major = le16_to_cpu(hdr->header_version_major); |
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136 | uint16_t version_minor = le16_to_cpu(hdr->header_version_minor); |
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137 | |||
138 | DRM_DEBUG("SDMA\n"); |
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139 | radeon_ucode_print_common_hdr(hdr); |
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140 | |||
141 | if (version_major == 1) { |
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142 | const struct sdma_firmware_header_v1_0 *sdma_hdr = |
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143 | container_of(hdr, struct sdma_firmware_header_v1_0, header); |
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144 | |||
145 | DRM_DEBUG("ucode_feature_version: %u\n", |
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146 | le32_to_cpu(sdma_hdr->ucode_feature_version)); |
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147 | DRM_DEBUG("ucode_change_version: %u\n", |
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148 | le32_to_cpu(sdma_hdr->ucode_change_version)); |
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149 | DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset)); |
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150 | DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size)); |
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151 | } else { |
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152 | DRM_ERROR("Unknown SDMA ucode version: %u.%u\n", |
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153 | version_major, version_minor); |
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154 | } |
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155 | } |
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156 | |||
157 | int radeon_ucode_validate(const struct firmware *fw) |
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158 | { |
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159 | const struct common_firmware_header *hdr = |
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160 | (const struct common_firmware_header *)fw->data; |
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161 | |||
162 | if (fw->size == le32_to_cpu(hdr->size_bytes)) |
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163 | return 0; |
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164 | |||
165 | return -EINVAL; |
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166 | } |
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167 |