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1404 serge 1
/*
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 * Copyright 2009 Jerome Glisse.
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 * All Rights Reserved.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the
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 * "Software"), to deal in the Software without restriction, including
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * the following conditions:
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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 * USE OR OTHER DEALINGS IN THE SOFTWARE.
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 *
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 * The above copyright notice and this permission notice (including the
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 * next paragraph) shall be included in all copies or substantial portions
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 * of the Software.
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 *
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 */
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/*
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 * Authors:
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 *    Jerome Glisse 
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 *    Thomas Hellstrom 
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 *    Dave Airlie
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 */
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#include 
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#include 
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#include 
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#include 
2997 Serge 36
#include 
1404 serge 37
#include 
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#include 
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#include 
2997 Serge 40
#include 
1404 serge 41
#include "radeon_reg.h"
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#include "radeon.h"
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44
#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
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static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
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static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
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{
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	struct radeon_mman *mman;
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	struct radeon_device *rdev;
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	mman = container_of(bdev, struct radeon_mman, bdev);
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	rdev = container_of(mman, struct radeon_device, mman);
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	return rdev;
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}
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58
 
59
/*
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 * Global memory.
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 */
2997 Serge 62
static int radeon_ttm_mem_global_init(struct drm_global_reference *ref)
1404 serge 63
{
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	return ttm_mem_global_init(ref->object);
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}
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2997 Serge 67
static void radeon_ttm_mem_global_release(struct drm_global_reference *ref)
1404 serge 68
{
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	ttm_mem_global_release(ref->object);
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}
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72
static int radeon_ttm_global_init(struct radeon_device *rdev)
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{
2997 Serge 74
	struct drm_global_reference *global_ref;
1404 serge 75
	int r;
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	rdev->mman.mem_global_referenced = false;
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	global_ref = &rdev->mman.mem_global_ref;
2997 Serge 79
	global_ref->global_type = DRM_GLOBAL_TTM_MEM;
1404 serge 80
	global_ref->size = sizeof(struct ttm_mem_global);
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	global_ref->init = &radeon_ttm_mem_global_init;
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	global_ref->release = &radeon_ttm_mem_global_release;
2997 Serge 83
	r = drm_global_item_ref(global_ref);
1404 serge 84
	if (r != 0) {
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		DRM_ERROR("Failed setting up TTM memory accounting "
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			  "subsystem.\n");
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		return r;
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	}
89
 
90
	rdev->mman.bo_global_ref.mem_glob =
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		rdev->mman.mem_global_ref.object;
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	global_ref = &rdev->mman.bo_global_ref.ref;
2997 Serge 93
	global_ref->global_type = DRM_GLOBAL_TTM_BO;
1404 serge 94
	global_ref->size = sizeof(struct ttm_bo_global);
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	global_ref->init = &ttm_bo_global_init;
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	global_ref->release = &ttm_bo_global_release;
2997 Serge 97
	r = drm_global_item_ref(global_ref);
1404 serge 98
	if (r != 0) {
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		DRM_ERROR("Failed setting up TTM BO subsystem.\n");
2997 Serge 100
		drm_global_item_unref(&rdev->mman.mem_global_ref);
1404 serge 101
		return r;
102
	}
103
 
104
	rdev->mman.mem_global_referenced = true;
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	return 0;
106
}
107
 
108
 
2997 Serge 109
static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
110
{
111
	return 0;
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}
1404 serge 113
 
114
static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
115
				struct ttm_mem_type_manager *man)
116
{
117
	struct radeon_device *rdev;
118
 
119
	rdev = radeon_get_rdev(bdev);
120
 
121
	switch (type) {
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	case TTM_PL_SYSTEM:
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		/* System memory */
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		man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
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		man->available_caching = TTM_PL_MASK_CACHING;
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		man->default_caching = TTM_PL_FLAG_CACHED;
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		break;
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	case TTM_PL_TT:
2997 Serge 129
		man->func = &ttm_bo_manager_func;
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		man->gpu_offset = rdev->mc.gtt_start;
1404 serge 131
		man->available_caching = TTM_PL_MASK_CACHING;
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		man->default_caching = TTM_PL_FLAG_CACHED;
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		man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
134
#if __OS_HAS_AGP
135
		if (rdev->flags & RADEON_IS_AGP) {
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			if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
137
				DRM_ERROR("AGP is not enabled for memory type %u\n",
138
					  (unsigned)type);
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				return -EINVAL;
140
			}
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			if (!rdev->ddev->agp->cant_use_aperture)
2997 Serge 142
				man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
1404 serge 143
			man->available_caching = TTM_PL_FLAG_UNCACHED |
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						 TTM_PL_FLAG_WC;
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			man->default_caching = TTM_PL_FLAG_WC;
2997 Serge 146
		}
1404 serge 147
#endif
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		break;
149
	case TTM_PL_VRAM:
150
		/* "On-card" video ram */
2997 Serge 151
		man->func = &ttm_bo_manager_func;
152
		man->gpu_offset = rdev->mc.vram_start;
1404 serge 153
		man->flags = TTM_MEMTYPE_FLAG_FIXED |
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			     TTM_MEMTYPE_FLAG_MAPPABLE;
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		man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
156
		man->default_caching = TTM_PL_FLAG_WC;
157
		break;
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	default:
159
		DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
160
		return -EINVAL;
161
	}
162
	return 0;
163
}
164
 
165
static struct ttm_bo_driver radeon_bo_driver = {
166
//   .create_ttm_backend_entry = &radeon_create_ttm_backend_entry,
167
//   .invalidate_caches = &radeon_invalidate_caches,
168
    .init_mem_type = &radeon_init_mem_type,
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//   .evict_flags = &radeon_evict_flags,
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//   .move = &radeon_bo_move,
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//   .verify_access = &radeon_verify_access,
172
//   .sync_obj_signaled = &radeon_sync_obj_signaled,
173
//   .sync_obj_wait = &radeon_sync_obj_wait,
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//   .sync_obj_flush = &radeon_sync_obj_flush,
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//   .sync_obj_unref = &radeon_sync_obj_unref,
176
//   .sync_obj_ref = &radeon_sync_obj_ref,
177
//   .move_notify = &radeon_bo_move_notify,
178
//   .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
179
};
180
 
181
int radeon_ttm_init(struct radeon_device *rdev)
182
{
183
	int r;
184
 
185
	r = radeon_ttm_global_init(rdev);
186
	if (r) {
187
		return r;
188
	}
189
	/* No others user of address space so set it to 0 */
190
	r = ttm_bo_device_init(&rdev->mman.bdev,
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			       rdev->mman.bo_global_ref.ref.object,
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			       &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
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			       rdev->need_dma32);
194
	if (r) {
195
		DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
196
		return r;
197
	}
198
	rdev->mman.initialized = true;
199
	r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
200
				rdev->mc.real_vram_size >> PAGE_SHIFT);
201
	if (r) {
202
		DRM_ERROR("Failed initializing VRAM heap.\n");
203
		return r;
204
	}
205
	r = radeon_bo_create(rdev, NULL, 256 * 1024, true,
206
				RADEON_GEM_DOMAIN_VRAM,
207
				&rdev->stollen_vga_memory);
208
	if (r) {
209
		return r;
210
	}
211
	r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
212
	if (r)
213
		return r;
214
	r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
215
	radeon_bo_unreserve(rdev->stollen_vga_memory);
216
	if (r) {
217
		radeon_bo_unref(&rdev->stollen_vga_memory);
218
		return r;
219
	}
220
	DRM_INFO("radeon: %uM of VRAM memory ready\n",
221
		 (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
222
	r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
223
				rdev->mc.gtt_size >> PAGE_SHIFT);
224
	if (r) {
225
		DRM_ERROR("Failed initializing GTT heap.\n");
226
		return r;
227
	}
228
	DRM_INFO("radeon: %uM of GTT memory ready.\n",
229
		 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
230
	if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
231
		rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
232
	}
233
 
234
	r = radeon_ttm_debugfs_init(rdev);
235
	if (r) {
236
		DRM_ERROR("Failed to init debugfs\n");
237
		return r;
238
	}
239
	return 0;
240
}
241
 
242
static struct vm_operations_struct radeon_ttm_vm_ops;
243
static const struct vm_operations_struct *ttm_vm_ops = NULL;
244