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1404 serge 1
/*
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 * Copyright 2009 Jerome Glisse.
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 * All Rights Reserved.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the
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 * "Software"), to deal in the Software without restriction, including
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * the following conditions:
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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 * USE OR OTHER DEALINGS IN THE SOFTWARE.
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 *
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 * The above copyright notice and this permission notice (including the
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 * next paragraph) shall be included in all copies or substantial portions
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 * of the Software.
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 *
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 */
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/*
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 * Authors:
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 *    Jerome Glisse 
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 *    Thomas Hellstrom 
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 *    Dave Airlie
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 */
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#include 
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#include 
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#include 
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#include 
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#include 
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#include 
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#include 
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#include "radeon_reg.h"
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#include "radeon.h"
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#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
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static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
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static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
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{
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	struct radeon_mman *mman;
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	struct radeon_device *rdev;
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	mman = container_of(bdev, struct radeon_mman, bdev);
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	rdev = container_of(mman, struct radeon_device, mman);
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	return rdev;
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}
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56
 
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/*
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 * Global memory.
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 */
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static int radeon_ttm_mem_global_init(struct ttm_global_reference *ref)
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{
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	return ttm_mem_global_init(ref->object);
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}
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static void radeon_ttm_mem_global_release(struct ttm_global_reference *ref)
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{
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	ttm_mem_global_release(ref->object);
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}
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static int radeon_ttm_global_init(struct radeon_device *rdev)
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{
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	struct ttm_global_reference *global_ref;
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	int r;
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	rdev->mman.mem_global_referenced = false;
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	global_ref = &rdev->mman.mem_global_ref;
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	global_ref->global_type = TTM_GLOBAL_TTM_MEM;
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	global_ref->size = sizeof(struct ttm_mem_global);
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	global_ref->init = &radeon_ttm_mem_global_init;
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	global_ref->release = &radeon_ttm_mem_global_release;
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	r = ttm_global_item_ref(global_ref);
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	if (r != 0) {
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		DRM_ERROR("Failed setting up TTM memory accounting "
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			  "subsystem.\n");
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		return r;
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	}
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	rdev->mman.bo_global_ref.mem_glob =
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		rdev->mman.mem_global_ref.object;
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	global_ref = &rdev->mman.bo_global_ref.ref;
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	global_ref->global_type = TTM_GLOBAL_TTM_BO;
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	global_ref->size = sizeof(struct ttm_bo_global);
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	global_ref->init = &ttm_bo_global_init;
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	global_ref->release = &ttm_bo_global_release;
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	r = ttm_global_item_ref(global_ref);
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	if (r != 0) {
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		DRM_ERROR("Failed setting up TTM BO subsystem.\n");
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		ttm_global_item_unref(&rdev->mman.mem_global_ref);
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		return r;
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	}
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	rdev->mman.mem_global_referenced = true;
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	return 0;
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}
105
 
106
 
107
struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev);
108
 
109
 
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static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
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				struct ttm_mem_type_manager *man)
112
{
113
	struct radeon_device *rdev;
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	rdev = radeon_get_rdev(bdev);
116
 
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	switch (type) {
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	case TTM_PL_SYSTEM:
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		/* System memory */
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		man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
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		man->available_caching = TTM_PL_MASK_CACHING;
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		man->default_caching = TTM_PL_FLAG_CACHED;
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		break;
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	case TTM_PL_TT:
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		man->gpu_offset = rdev->mc.gtt_location;
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		man->available_caching = TTM_PL_MASK_CACHING;
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		man->default_caching = TTM_PL_FLAG_CACHED;
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		man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
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#if __OS_HAS_AGP
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		if (rdev->flags & RADEON_IS_AGP) {
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			if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
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				DRM_ERROR("AGP is not enabled for memory type %u\n",
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					  (unsigned)type);
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				return -EINVAL;
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			}
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			man->io_offset = rdev->mc.agp_base;
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			man->io_size = rdev->mc.gtt_size;
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			man->io_addr = NULL;
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			if (!rdev->ddev->agp->cant_use_aperture)
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				man->flags = TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
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					     TTM_MEMTYPE_FLAG_MAPPABLE;
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			man->available_caching = TTM_PL_FLAG_UNCACHED |
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						 TTM_PL_FLAG_WC;
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			man->default_caching = TTM_PL_FLAG_WC;
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		} else
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#endif
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		{
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			man->io_offset = 0;
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			man->io_size = 0;
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			man->io_addr = NULL;
151
		}
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		break;
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	case TTM_PL_VRAM:
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		/* "On-card" video ram */
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		man->gpu_offset = rdev->mc.vram_location;
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		man->flags = TTM_MEMTYPE_FLAG_FIXED |
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			     TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
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			     TTM_MEMTYPE_FLAG_MAPPABLE;
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		man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
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		man->default_caching = TTM_PL_FLAG_WC;
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		man->io_addr = NULL;
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		man->io_offset = rdev->mc.aper_base;
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		man->io_size = rdev->mc.aper_size;
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		break;
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	default:
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		DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
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		return -EINVAL;
168
	}
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	return 0;
170
}
171
 
172
static struct ttm_bo_driver radeon_bo_driver = {
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//   .create_ttm_backend_entry = &radeon_create_ttm_backend_entry,
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//   .invalidate_caches = &radeon_invalidate_caches,
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    .init_mem_type = &radeon_init_mem_type,
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//   .evict_flags = &radeon_evict_flags,
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//   .move = &radeon_bo_move,
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//   .verify_access = &radeon_verify_access,
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//   .sync_obj_signaled = &radeon_sync_obj_signaled,
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//   .sync_obj_wait = &radeon_sync_obj_wait,
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//   .sync_obj_flush = &radeon_sync_obj_flush,
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//   .sync_obj_unref = &radeon_sync_obj_unref,
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//   .sync_obj_ref = &radeon_sync_obj_ref,
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//   .move_notify = &radeon_bo_move_notify,
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//   .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
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};
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188
int radeon_ttm_init(struct radeon_device *rdev)
189
{
190
	int r;
191
 
192
	r = radeon_ttm_global_init(rdev);
193
	if (r) {
194
		return r;
195
	}
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	/* No others user of address space so set it to 0 */
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	r = ttm_bo_device_init(&rdev->mman.bdev,
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			       rdev->mman.bo_global_ref.ref.object,
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			       &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
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			       rdev->need_dma32);
201
	if (r) {
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		DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
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		return r;
204
	}
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	rdev->mman.initialized = true;
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	r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
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				rdev->mc.real_vram_size >> PAGE_SHIFT);
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	if (r) {
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		DRM_ERROR("Failed initializing VRAM heap.\n");
210
		return r;
211
	}
212
	r = radeon_bo_create(rdev, NULL, 256 * 1024, true,
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				RADEON_GEM_DOMAIN_VRAM,
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				&rdev->stollen_vga_memory);
215
	if (r) {
216
		return r;
217
	}
218
	r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
219
	if (r)
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		return r;
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	r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
222
	radeon_bo_unreserve(rdev->stollen_vga_memory);
223
	if (r) {
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		radeon_bo_unref(&rdev->stollen_vga_memory);
225
		return r;
226
	}
227
	DRM_INFO("radeon: %uM of VRAM memory ready\n",
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		 (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
229
	r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
230
				rdev->mc.gtt_size >> PAGE_SHIFT);
231
	if (r) {
232
		DRM_ERROR("Failed initializing GTT heap.\n");
233
		return r;
234
	}
235
	DRM_INFO("radeon: %uM of GTT memory ready.\n",
236
		 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
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	if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
238
		rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
239
	}
240
 
241
	r = radeon_ttm_debugfs_init(rdev);
242
	if (r) {
243
		DRM_ERROR("Failed to init debugfs\n");
244
		return r;
245
	}
246
	return 0;
247
}
248
 
249
static struct vm_operations_struct radeon_ttm_vm_ops;
250
static const struct vm_operations_struct *ttm_vm_ops = NULL;
251