Rev 2997 | Rev 5078 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1126 | serge | 1 | /* |
| 2 | * Copyright 2008 Advanced Micro Devices, Inc. |
||
| 3 | * Copyright 2008 Red Hat Inc. |
||
| 4 | * Copyright 2009 Jerome Glisse. |
||
| 5 | * |
||
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
||
| 7 | * copy of this software and associated documentation files (the "Software"), |
||
| 8 | * to deal in the Software without restriction, including without limitation |
||
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
||
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
||
| 11 | * Software is furnished to do so, subject to the following conditions: |
||
| 12 | * |
||
| 13 | * The above copyright notice and this permission notice shall be included in |
||
| 14 | * all copies or substantial portions of the Software. |
||
| 15 | * |
||
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
||
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
||
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
||
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
||
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
||
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
||
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
||
| 23 | * |
||
| 24 | * Authors: Dave Airlie |
||
| 25 | * Alex Deucher |
||
| 26 | * Jerome Glisse |
||
| 27 | */ |
||
| 28 | #ifndef __RADEON_OBJECT_H__ |
||
| 29 | #define __RADEON_OBJECT_H__ |
||
| 30 | |||
| 1321 | serge | 31 | #include |
| 32 | #include "radeon.h" |
||
| 1126 | serge | 33 | |
| 2997 | Serge | 34 | struct sg_table; |
| 35 | |||
| 1321 | serge | 36 | /** |
| 37 | * radeon_mem_type_to_domain - return domain corresponding to mem_type |
||
| 38 | * @mem_type: ttm memory type |
||
| 39 | * |
||
| 40 | * Returns corresponding domain of the ttm mem_type |
||
| 1126 | serge | 41 | */ |
| 1321 | serge | 42 | static inline unsigned radeon_mem_type_to_domain(u32 mem_type) |
| 43 | { |
||
| 44 | switch (mem_type) { |
||
| 45 | case TTM_PL_VRAM: |
||
| 46 | return RADEON_GEM_DOMAIN_VRAM; |
||
| 47 | case TTM_PL_TT: |
||
| 48 | return RADEON_GEM_DOMAIN_GTT; |
||
| 49 | case TTM_PL_SYSTEM: |
||
| 50 | return RADEON_GEM_DOMAIN_CPU; |
||
| 51 | default: |
||
| 52 | break; |
||
| 53 | } |
||
| 54 | return 0; |
||
| 55 | } |
||
| 1126 | serge | 56 | |
| 2997 | Serge | 57 | int radeon_bo_reserve(struct radeon_bo *bo, bool no_intr); |
| 1126 | serge | 58 | |
| 1321 | serge | 59 | static inline void radeon_bo_unreserve(struct radeon_bo *bo) |
| 60 | { |
||
| 3764 | Serge | 61 | // ttm_bo_unreserve(&bo->tbo); |
| 1321 | serge | 62 | } |
| 1126 | serge | 63 | |
| 1321 | serge | 64 | /** |
| 65 | * radeon_bo_gpu_offset - return GPU offset of bo |
||
| 66 | * @bo: radeon object for which we query the offset |
||
| 1404 | serge | 67 | * |
| 1321 | serge | 68 | * Returns current GPU offset of the object. |
| 1404 | serge | 69 | * |
| 1321 | serge | 70 | * Note: object should either be pinned or reserved when calling this |
| 1963 | serge | 71 | * function, it might be useful to add check for this for debugging. |
| 1404 | serge | 72 | */ |
| 1321 | serge | 73 | static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo) |
| 74 | { |
||
| 75 | return bo->tbo.offset; |
||
| 76 | } |
||
| 1126 | serge | 77 | |
| 1321 | serge | 78 | static inline unsigned long radeon_bo_size(struct radeon_bo *bo) |
| 79 | { |
||
| 80 | return bo->tbo.num_pages << PAGE_SHIFT; |
||
| 81 | } |
||
| 1126 | serge | 82 | |
| 1321 | serge | 83 | static inline bool radeon_bo_is_reserved(struct radeon_bo *bo) |
| 84 | { |
||
| 3764 | Serge | 85 | #ifdef __TTM__ |
| 86 | return ttm_bo_is_reserved(&bo->tbo); |
||
| 87 | #else |
||
| 1321 | serge | 88 | return !!atomic_read(&bo->tbo.reserved); |
| 3764 | Serge | 89 | #endif |
| 1321 | serge | 90 | } |
| 1126 | serge | 91 | |
| 2997 | Serge | 92 | static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo) |
| 93 | { |
||
| 94 | return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE; |
||
| 95 | } |
||
| 96 | |||
| 97 | static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo) |
||
| 98 | { |
||
| 99 | return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE; |
||
| 100 | } |
||
| 101 | |||
| 1321 | serge | 102 | /** |
| 103 | * radeon_bo_mmap_offset - return mmap offset of bo |
||
| 104 | * @bo: radeon object for which we query the offset |
||
| 1404 | serge | 105 | * |
| 1321 | serge | 106 | * Returns mmap offset of the object. |
| 1404 | serge | 107 | * |
| 1321 | serge | 108 | * Note: addr_space_offset is constant after ttm bo init thus isn't protected |
| 109 | * by any lock. |
||
| 1404 | serge | 110 | */ |
| 1321 | serge | 111 | static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo) |
| 112 | { |
||
| 113 | return bo->tbo.addr_space_offset; |
||
| 114 | } |
||
| 1126 | serge | 115 | |
| 2997 | Serge | 116 | extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, |
| 117 | bool no_wait); |
||
| 1126 | serge | 118 | |
| 1321 | serge | 119 | extern int radeon_bo_create(struct radeon_device *rdev, |
| 1963 | serge | 120 | unsigned long size, int byte_align, |
| 1321 | serge | 121 | bool kernel, u32 domain, |
| 2997 | Serge | 122 | struct sg_table *sg, |
| 1321 | serge | 123 | struct radeon_bo **bo_ptr); |
| 124 | extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr); |
||
| 125 | extern void radeon_bo_kunmap(struct radeon_bo *bo); |
||
| 126 | extern void radeon_bo_unref(struct radeon_bo **bo); |
||
| 127 | extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr); |
||
| 2997 | Serge | 128 | extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, |
| 129 | u64 max_offset, u64 *gpu_addr); |
||
| 1321 | serge | 130 | extern int radeon_bo_unpin(struct radeon_bo *bo); |
| 131 | extern int radeon_bo_evict_vram(struct radeon_device *rdev); |
||
| 132 | extern void radeon_bo_force_delete(struct radeon_device *rdev); |
||
| 133 | extern int radeon_bo_init(struct radeon_device *rdev); |
||
| 134 | extern void radeon_bo_fini(struct radeon_device *rdev); |
||
| 135 | extern void radeon_bo_list_add_object(struct radeon_bo_list *lobj, |
||
| 136 | struct list_head *head); |
||
| 3764 | Serge | 137 | extern int radeon_bo_list_validate(struct list_head *head, int ring); |
| 1321 | serge | 138 | extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo, |
| 139 | struct vm_area_struct *vma); |
||
| 140 | extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo, |
||
| 141 | u32 tiling_flags, u32 pitch); |
||
| 142 | extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo, |
||
| 143 | u32 *tiling_flags, u32 *pitch); |
||
| 144 | extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved, |
||
| 145 | bool force_drop); |
||
| 146 | extern void radeon_bo_move_notify(struct ttm_buffer_object *bo, |
||
| 147 | struct ttm_mem_reg *mem); |
||
| 1963 | serge | 148 | extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo); |
| 1321 | serge | 149 | extern int radeon_bo_get_surface_reg(struct radeon_bo *bo); |
| 2997 | Serge | 150 | |
| 151 | /* |
||
| 152 | * sub allocation |
||
| 153 | */ |
||
| 154 | |||
| 155 | static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo) |
||
| 156 | { |
||
| 157 | return sa_bo->manager->gpu_addr + sa_bo->soffset; |
||
| 158 | } |
||
| 159 | |||
| 160 | static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo) |
||
| 161 | { |
||
| 162 | return sa_bo->manager->cpu_ptr + sa_bo->soffset; |
||
| 163 | } |
||
| 164 | |||
| 165 | extern int radeon_sa_bo_manager_init(struct radeon_device *rdev, |
||
| 166 | struct radeon_sa_manager *sa_manager, |
||
| 167 | unsigned size, u32 domain); |
||
| 168 | extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev, |
||
| 169 | struct radeon_sa_manager *sa_manager); |
||
| 170 | extern int radeon_sa_bo_manager_start(struct radeon_device *rdev, |
||
| 171 | struct radeon_sa_manager *sa_manager); |
||
| 172 | extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev, |
||
| 173 | struct radeon_sa_manager *sa_manager); |
||
| 174 | extern int radeon_sa_bo_new(struct radeon_device *rdev, |
||
| 175 | struct radeon_sa_manager *sa_manager, |
||
| 176 | struct radeon_sa_bo **sa_bo, |
||
| 177 | unsigned size, unsigned align, bool block); |
||
| 178 | extern void radeon_sa_bo_free(struct radeon_device *rdev, |
||
| 179 | struct radeon_sa_bo **sa_bo, |
||
| 180 | struct radeon_fence *fence); |
||
| 181 | #if defined(CONFIG_DEBUG_FS) |
||
| 182 | extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager, |
||
| 183 | struct seq_file *m); |
||
| 1126 | serge | 184 | #endif |
| 2997 | Serge | 185 | |
| 186 | |||
| 187 | #endif |