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1120 serge 1
/*
2
 * Copyright 2008 Advanced Micro Devices, Inc.
3
 * Copyright 2008 Red Hat Inc.
4
 * Copyright 2009 Jerome Glisse.
5
 *
6
 * Permission is hereby granted, free of charge, to any person obtaining a
7
 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
11
 * Software is furnished to do so, subject to the following conditions:
12
 *
13
 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22
 * OTHER DEALINGS IN THE SOFTWARE.
23
 *
24
 * Authors: Dave Airlie
25
 *          Alex Deucher
26
 *          Jerome Glisse
27
 */
1125 serge 28
#include "drmP.h"
1120 serge 29
#include "radeon_drm.h"
30
#include "radeon.h"
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#include "radeon_reg.h"
32
 
33
/*
34
 * Common GART table functions.
35
 */
36
int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
37
{
38
	void *ptr;
39
 
1246 serge 40
    ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size,
41
                  &rdev->gart.table_addr);
1120 serge 42
	if (ptr == NULL) {
43
		return -ENOMEM;
44
	}
45
#ifdef CONFIG_X86
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	if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
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	    rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
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		set_memory_uc((unsigned long)ptr,
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			      rdev->gart.table_size >> PAGE_SHIFT);
50
	}
51
#endif
52
	rdev->gart.table.ram.ptr = ptr;
53
	memset((void *)rdev->gart.table.ram.ptr, 0, rdev->gart.table_size);
54
	return 0;
55
}
56
 
57
void radeon_gart_table_ram_free(struct radeon_device *rdev)
58
{
59
	if (rdev->gart.table.ram.ptr == NULL) {
60
		return;
61
	}
62
#ifdef CONFIG_X86
63
	if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
64
	    rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
65
		set_memory_wb((unsigned long)rdev->gart.table.ram.ptr,
66
			      rdev->gart.table_size >> PAGE_SHIFT);
67
	}
68
#endif
1128 serge 69
//   pci_free_consistent(rdev->pdev, rdev->gart.table_size,
70
//               (void *)rdev->gart.table.ram.ptr,
71
//               rdev->gart.table_addr);
1120 serge 72
	rdev->gart.table.ram.ptr = NULL;
73
	rdev->gart.table_addr = 0;
74
}
75
 
76
int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
77
{
78
    int r;
79
 
80
    if (rdev->gart.table.vram.robj == NULL) {
81
        r = radeon_object_create(rdev, NULL,
82
                     rdev->gart.table_size,
83
                     true,
84
                     RADEON_GEM_DOMAIN_VRAM,
85
                     false, &rdev->gart.table.vram.robj);
86
        if (r) {
87
            return r;
88
        }
89
    }
1179 serge 90
	return 0;
91
}
92
 
93
int radeon_gart_table_vram_pin(struct radeon_device *rdev)
94
{
95
	uint64_t gpu_addr;
96
	int r;
97
 
1120 serge 98
    r = radeon_object_pin(rdev->gart.table.vram.robj,
99
                  RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
100
    if (r) {
101
//        radeon_object_unref(&rdev->gart.table.vram.robj);
102
        return r;
103
    }
104
    r = radeon_object_kmap(rdev->gart.table.vram.robj,
105
                   (void **)&rdev->gart.table.vram.ptr);
106
    if (r) {
107
//        radeon_object_unpin(rdev->gart.table.vram.robj);
108
//        radeon_object_unref(&rdev->gart.table.vram.robj);
109
        DRM_ERROR("radeon: failed to map gart vram table.\n");
110
        return r;
111
    }
112
 
113
    rdev->gart.table_addr = gpu_addr;
114
 
115
    dbgprintf("alloc gart vram:  gpu_base %x lin_addr %x\n",
116
               rdev->gart.table_addr, rdev->gart.table.vram.ptr);
117
 
118
//    gpu_addr = 0x800000;
119
 
120
//    u32_t pci_addr = rdev->mc.aper_base + gpu_addr;
121
 
122
//    rdev->gart.table.vram.ptr = (void*)MapIoMem(pci_addr, rdev->gart.table_size, PG_SW);
123
 
124
 
125
//    dbgprintf("alloc gart vram:\n  gpu_base %x pci_base %x lin_addr %x",
126
//               gpu_addr, pci_addr, rdev->gart.table.vram.ptr);
127
 
128
    return 0;
129
}
130
 
131
void radeon_gart_table_vram_free(struct radeon_device *rdev)
132
{
133
	if (rdev->gart.table.vram.robj == NULL) {
134
		return;
135
	}
136
//   radeon_object_kunmap(rdev->gart.table.vram.robj);
137
//   radeon_object_unpin(rdev->gart.table.vram.robj);
138
//   radeon_object_unref(&rdev->gart.table.vram.robj);
139
}
140
 
141
 
142
 
143
 
144
/*
145
 * Common gart functions.
146
 */
147
void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
148
			int pages)
149
{
150
	unsigned t;
151
	unsigned p;
152
	int i, j;
153
 
154
	if (!rdev->gart.ready) {
155
//       WARN(1, "trying to unbind memory to unitialized GART !\n");
156
		return;
157
	}
1268 serge 158
	t = offset / RADEON_GPU_PAGE_SIZE;
159
	p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
1120 serge 160
	for (i = 0; i < pages; i++, p++) {
161
		if (rdev->gart.pages[p]) {
162
//           pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p],
163
//                      PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
164
			rdev->gart.pages[p] = NULL;
165
			rdev->gart.pages_addr[p] = 0;
1268 serge 166
			for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
1120 serge 167
				radeon_gart_set_page(rdev, t, 0);
168
			}
169
		}
170
	}
171
	mb();
172
	radeon_gart_tlb_flush(rdev);
173
}
174
 
175
int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
176
             int pages, u32_t *pagelist)
177
{
178
    unsigned t;
179
    unsigned p;
180
    uint64_t page_base;
181
    int i, j;
182
 
1179 serge 183
    ENTER();
184
 
1120 serge 185
    dbgprintf("offset %x pages %x list %x\n",
186
               offset, pages, pagelist);
187
 
188
    if (!rdev->gart.ready) {
189
        DRM_ERROR("trying to bind memory to unitialized GART !\n");
190
        return -EINVAL;
191
    }
1268 serge 192
	t = offset / RADEON_GPU_PAGE_SIZE;
193
	p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
1120 serge 194
 
195
    for (i = 0; i < pages; i++, p++) {
196
        /* we need to support large memory configurations */
197
        /* assume that unbind have already been call on the range */
198
 
199
        rdev->gart.pages_addr[p] = pagelist[i] & ~4095;
200
 
201
        //if (pci_dma_mapping_error(rdev->pdev, rdev->gart.pages_addr[p])) {
202
        //    /* FIXME: failed to map page (return -ENOMEM?) */
203
        //    radeon_gart_unbind(rdev, offset, pages);
204
        //    return -ENOMEM;
205
        //}
206
        rdev->gart.pages[p] = pagelist[i];
1268 serge 207
		page_base = rdev->gart.pages_addr[p];
208
		for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
1120 serge 209
            radeon_gart_set_page(rdev, t, page_base);
1268 serge 210
			page_base += RADEON_GPU_PAGE_SIZE;
1120 serge 211
        }
212
    }
213
    mb();
214
    radeon_gart_tlb_flush(rdev);
215
    return 0;
216
}
217
 
218
int radeon_gart_init(struct radeon_device *rdev)
219
{
220
    if (rdev->gart.pages) {
221
        return 0;
222
    }
1268 serge 223
	/* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
224
	if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
1120 serge 225
        DRM_ERROR("Page size is smaller than GPU page size!\n");
226
        return -EINVAL;
227
    }
228
    /* Compute table size */
229
    rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
1268 serge 230
	rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
1120 serge 231
    DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
232
         rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
233
    /* Allocate pages table */
234
    rdev->gart.pages = kzalloc(sizeof(void *) * rdev->gart.num_cpu_pages,
235
                   GFP_KERNEL);
236
    if (rdev->gart.pages == NULL) {
237
//        radeon_gart_fini(rdev);
238
        return -ENOMEM;
239
    }
240
    rdev->gart.pages_addr = kzalloc(sizeof(u32_t) *
241
                    rdev->gart.num_cpu_pages, GFP_KERNEL);
242
    if (rdev->gart.pages_addr == NULL) {
243
//        radeon_gart_fini(rdev);
244
        return -ENOMEM;
245
    }
246
    return 0;
247
}
248
 
249
void radeon_gart_fini(struct radeon_device *rdev)
250
{
251
	if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) {
252
		/* unbind pages */
253
		radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
254
	}
255
	rdev->gart.ready = false;
256
	kfree(rdev->gart.pages);
257
	kfree(rdev->gart.pages_addr);
258
	rdev->gart.pages = NULL;
259
	rdev->gart.pages_addr = NULL;
260
}