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Rev | Author | Line No. | Line |
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2005 | serge | 1 | /* |
2 | * Copyright 2009 Jerome Glisse. |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice shall be included in |
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12 | * all copies or substantial portions of the Software. |
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13 | * |
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14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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20 | * OTHER DEALINGS IN THE SOFTWARE. |
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21 | * |
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22 | * Authors: Jerome Glisse |
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23 | */ |
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24 | #include |
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25 | #include |
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26 | #include "radeon_reg.h" |
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27 | #include "radeon.h" |
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28 | |||
2997 | Serge | 29 | #define RADEON_BENCHMARK_COPY_BLIT 1 |
30 | #define RADEON_BENCHMARK_COPY_DMA 0 |
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31 | |||
32 | #define RADEON_BENCHMARK_ITERATIONS 1024 |
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33 | #define RADEON_BENCHMARK_COMMON_MODES_N 17 |
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34 | |||
35 | static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size, |
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36 | uint64_t saddr, uint64_t daddr, |
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6104 | serge | 37 | int flag, int n, |
38 | struct reservation_object *resv) |
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2005 | serge | 39 | { |
2997 | Serge | 40 | unsigned long start_jiffies; |
41 | unsigned long end_jiffies; |
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42 | struct radeon_fence *fence = NULL; |
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43 | int i, r; |
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2005 | serge | 44 | |
5078 | serge | 45 | start_jiffies = jiffies; |
2997 | Serge | 46 | for (i = 0; i < n; i++) { |
47 | switch (flag) { |
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48 | case RADEON_BENCHMARK_COPY_DMA: |
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5271 | serge | 49 | fence = radeon_copy_dma(rdev, saddr, daddr, |
6104 | serge | 50 | size / RADEON_GPU_PAGE_SIZE, |
51 | resv); |
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2997 | Serge | 52 | break; |
53 | case RADEON_BENCHMARK_COPY_BLIT: |
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5271 | serge | 54 | fence = radeon_copy_blit(rdev, saddr, daddr, |
6104 | serge | 55 | size / RADEON_GPU_PAGE_SIZE, |
56 | resv); |
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2997 | Serge | 57 | break; |
58 | default: |
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59 | DRM_ERROR("Unknown copy method\n"); |
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5271 | serge | 60 | return -EINVAL; |
2997 | Serge | 61 | } |
5271 | serge | 62 | if (IS_ERR(fence)) |
63 | return PTR_ERR(fence); |
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64 | |||
2997 | Serge | 65 | r = radeon_fence_wait(fence, false); |
5271 | serge | 66 | radeon_fence_unref(&fence); |
2997 | Serge | 67 | if (r) |
5271 | serge | 68 | return r; |
2997 | Serge | 69 | } |
5078 | serge | 70 | end_jiffies = jiffies; |
5271 | serge | 71 | return jiffies_to_msecs(end_jiffies - start_jiffies); |
2997 | Serge | 72 | } |
73 | |||
74 | |||
75 | static void radeon_benchmark_log_results(int n, unsigned size, |
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76 | unsigned int time, |
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77 | unsigned sdomain, unsigned ddomain, |
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78 | char *kind) |
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79 | { |
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80 | unsigned int throughput = (n * (size >> 10)) / time; |
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81 | DRM_INFO("radeon: %s %u bo moves of %u kB from" |
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82 | " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n", |
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83 | kind, n, size >> 10, sdomain, ddomain, time, |
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84 | throughput * 8, throughput); |
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85 | } |
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86 | |||
87 | static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, |
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6104 | serge | 88 | unsigned sdomain, unsigned ddomain) |
2005 | serge | 89 | { |
90 | struct radeon_bo *dobj = NULL; |
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91 | struct radeon_bo *sobj = NULL; |
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92 | uint64_t saddr, daddr; |
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2997 | Serge | 93 | int r, n; |
94 | int time; |
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2005 | serge | 95 | |
2997 | Serge | 96 | n = RADEON_BENCHMARK_ITERATIONS; |
5271 | serge | 97 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, 0, NULL, NULL, &sobj); |
2005 | serge | 98 | if (r) { |
99 | goto out_cleanup; |
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100 | } |
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101 | r = radeon_bo_reserve(sobj, false); |
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102 | if (unlikely(r != 0)) |
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103 | goto out_cleanup; |
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104 | r = radeon_bo_pin(sobj, sdomain, &saddr); |
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5078 | serge | 105 | radeon_bo_unreserve(sobj); |
2005 | serge | 106 | if (r) { |
107 | goto out_cleanup; |
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108 | } |
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5271 | serge | 109 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, 0, NULL, NULL, &dobj); |
2005 | serge | 110 | if (r) { |
111 | goto out_cleanup; |
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112 | } |
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113 | r = radeon_bo_reserve(dobj, false); |
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114 | if (unlikely(r != 0)) |
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115 | goto out_cleanup; |
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116 | r = radeon_bo_pin(dobj, ddomain, &daddr); |
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5078 | serge | 117 | radeon_bo_unreserve(dobj); |
2005 | serge | 118 | if (r) { |
119 | goto out_cleanup; |
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120 | } |
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121 | |||
5078 | serge | 122 | if (rdev->asic->copy.dma) { |
2997 | Serge | 123 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
6104 | serge | 124 | RADEON_BENCHMARK_COPY_DMA, n, |
125 | dobj->tbo.resv); |
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2997 | Serge | 126 | if (time < 0) |
2005 | serge | 127 | goto out_cleanup; |
2997 | Serge | 128 | if (time > 0) |
129 | radeon_benchmark_log_results(n, size, time, |
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130 | sdomain, ddomain, "dma"); |
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2007 | serge | 131 | } |
132 | |||
5078 | serge | 133 | if (rdev->asic->copy.blit) { |
6104 | serge | 134 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
135 | RADEON_BENCHMARK_COPY_BLIT, n, |
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136 | dobj->tbo.resv); |
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137 | if (time < 0) |
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138 | goto out_cleanup; |
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139 | if (time > 0) |
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140 | radeon_benchmark_log_results(n, size, time, |
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141 | sdomain, ddomain, "blit"); |
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5078 | serge | 142 | } |
2007 | serge | 143 | |
2005 | serge | 144 | out_cleanup: |
145 | if (sobj) { |
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146 | r = radeon_bo_reserve(sobj, false); |
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147 | if (likely(r == 0)) { |
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148 | radeon_bo_unpin(sobj); |
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149 | radeon_bo_unreserve(sobj); |
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150 | } |
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151 | radeon_bo_unref(&sobj); |
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152 | } |
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153 | if (dobj) { |
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154 | r = radeon_bo_reserve(dobj, false); |
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155 | if (likely(r == 0)) { |
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156 | radeon_bo_unpin(dobj); |
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157 | radeon_bo_unreserve(dobj); |
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158 | } |
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159 | radeon_bo_unref(&dobj); |
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160 | } |
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2997 | Serge | 161 | |
2005 | serge | 162 | if (r) { |
2997 | Serge | 163 | DRM_ERROR("Error while benchmarking BO move.\n"); |
2005 | serge | 164 | } |
165 | } |
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166 | |||
2997 | Serge | 167 | void radeon_benchmark(struct radeon_device *rdev, int test_number) |
2005 | serge | 168 | { |
2997 | Serge | 169 | int i; |
170 | int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = { |
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171 | 640 * 480 * 4, |
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172 | 720 * 480 * 4, |
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173 | 800 * 600 * 4, |
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174 | 848 * 480 * 4, |
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175 | 1024 * 768 * 4, |
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176 | 1152 * 768 * 4, |
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177 | 1280 * 720 * 4, |
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178 | 1280 * 800 * 4, |
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179 | 1280 * 854 * 4, |
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180 | 1280 * 960 * 4, |
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181 | 1280 * 1024 * 4, |
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182 | 1440 * 900 * 4, |
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183 | 1400 * 1050 * 4, |
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184 | 1680 * 1050 * 4, |
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185 | 1600 * 1200 * 4, |
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186 | 1920 * 1080 * 4, |
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187 | 1920 * 1200 * 4 |
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188 | }; |
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189 | |||
190 | switch (test_number) { |
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191 | case 1: |
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192 | /* simple test, VRAM to GTT and GTT to VRAM */ |
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193 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT, |
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194 | RADEON_GEM_DOMAIN_VRAM); |
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195 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
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196 | RADEON_GEM_DOMAIN_GTT); |
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197 | break; |
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198 | case 2: |
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199 | /* simple test, VRAM to VRAM */ |
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200 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
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201 | RADEON_GEM_DOMAIN_VRAM); |
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202 | break; |
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203 | case 3: |
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204 | /* GTT to VRAM, buffer size sweep, powers of 2 */ |
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205 | for (i = 1; i <= 16384; i <<= 1) |
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206 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
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207 | RADEON_GEM_DOMAIN_GTT, |
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208 | RADEON_GEM_DOMAIN_VRAM); |
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209 | break; |
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210 | case 4: |
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211 | /* VRAM to GTT, buffer size sweep, powers of 2 */ |
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212 | for (i = 1; i <= 16384; i <<= 1) |
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213 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
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214 | RADEON_GEM_DOMAIN_VRAM, |
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215 | RADEON_GEM_DOMAIN_GTT); |
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216 | break; |
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217 | case 5: |
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218 | /* VRAM to VRAM, buffer size sweep, powers of 2 */ |
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219 | for (i = 1; i <= 16384; i <<= 1) |
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220 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
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221 | RADEON_GEM_DOMAIN_VRAM, |
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222 | RADEON_GEM_DOMAIN_VRAM); |
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223 | break; |
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224 | case 6: |
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225 | /* GTT to VRAM, buffer size sweep, common modes */ |
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226 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
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227 | radeon_benchmark_move(rdev, common_modes[i], |
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228 | RADEON_GEM_DOMAIN_GTT, |
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6104 | serge | 229 | RADEON_GEM_DOMAIN_VRAM); |
2997 | Serge | 230 | break; |
231 | case 7: |
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232 | /* VRAM to GTT, buffer size sweep, common modes */ |
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233 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
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234 | radeon_benchmark_move(rdev, common_modes[i], |
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235 | RADEON_GEM_DOMAIN_VRAM, |
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6104 | serge | 236 | RADEON_GEM_DOMAIN_GTT); |
2997 | Serge | 237 | break; |
238 | case 8: |
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239 | /* VRAM to VRAM, buffer size sweep, common modes */ |
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240 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
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241 | radeon_benchmark_move(rdev, common_modes[i], |
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242 | RADEON_GEM_DOMAIN_VRAM, |
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6104 | serge | 243 | RADEON_GEM_DOMAIN_VRAM); |
2997 | Serge | 244 | break; |
245 | |||
246 | default: |
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247 | DRM_ERROR("Unknown benchmark\n"); |
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248 | } |
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2005 | serge | 249 | }>>>=><=>=>=><=>=>=><=>=>>>> |