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1128 | serge | 1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. |
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3 | * Copyright 2008 Red Hat Inc. |
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4 | * Copyright 2009 Jerome Glisse. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the "Software"), |
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8 | * to deal in the Software without restriction, including without limitation |
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9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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10 | * and/or sell copies of the Software, and to permit persons to whom the |
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11 | * Software is furnished to do so, subject to the following conditions: |
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12 | * |
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13 | * The above copyright notice and this permission notice shall be included in |
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14 | * all copies or substantial portions of the Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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22 | * OTHER DEALINGS IN THE SOFTWARE. |
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23 | * |
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24 | * Authors: Dave Airlie |
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25 | * Alex Deucher |
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26 | * Jerome Glisse |
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27 | */ |
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28 | #include "drmP.h" |
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29 | #include "radeon_reg.h" |
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30 | #include "radeon.h" |
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31 | |||
32 | /* r600,rv610,rv630,rv620,rv635,rv670 depends on : */ |
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33 | void rs600_mc_disable_clients(struct radeon_device *rdev); |
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34 | |||
35 | /* This files gather functions specifics to: |
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36 | * r600,rv610,rv630,rv620,rv635,rv670 |
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37 | * |
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38 | * Some of these functions might be used by newer ASICs. |
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39 | */ |
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40 | int r600_mc_wait_for_idle(struct radeon_device *rdev); |
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41 | void r600_gpu_init(struct radeon_device *rdev); |
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42 | |||
43 | |||
44 | /* |
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45 | * MC |
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46 | */ |
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47 | int r600_mc_init(struct radeon_device *rdev) |
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48 | { |
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49 | uint32_t tmp; |
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50 | |||
51 | r600_gpu_init(rdev); |
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52 | |||
53 | /* setup the gart before changing location so we can ask to |
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54 | * discard unmapped mc request |
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55 | */ |
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56 | /* FIXME: disable out of gart access */ |
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57 | tmp = rdev->mc.gtt_location / 4096; |
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58 | tmp = REG_SET(R600_LOGICAL_PAGE_NUMBER, tmp); |
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59 | WREG32(R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR, tmp); |
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60 | tmp = (rdev->mc.gtt_location + rdev->mc.gtt_size) / 4096; |
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61 | tmp = REG_SET(R600_LOGICAL_PAGE_NUMBER, tmp); |
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62 | WREG32(R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, tmp); |
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63 | |||
64 | rs600_mc_disable_clients(rdev); |
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65 | if (r600_mc_wait_for_idle(rdev)) { |
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66 | printk(KERN_WARNING "Failed to wait MC idle while " |
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67 | "programming pipes. Bad things might happen.\n"); |
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68 | } |
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69 | |||
1179 | serge | 70 | tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; |
1128 | serge | 71 | tmp = REG_SET(R600_MC_FB_TOP, tmp >> 24); |
72 | tmp |= REG_SET(R600_MC_FB_BASE, rdev->mc.vram_location >> 24); |
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73 | WREG32(R600_MC_VM_FB_LOCATION, tmp); |
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74 | tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 1; |
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75 | tmp = REG_SET(R600_MC_AGP_TOP, tmp >> 22); |
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76 | WREG32(R600_MC_VM_AGP_TOP, tmp); |
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77 | tmp = REG_SET(R600_MC_AGP_BOT, rdev->mc.gtt_location >> 22); |
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78 | WREG32(R600_MC_VM_AGP_BOT, tmp); |
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79 | return 0; |
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80 | } |
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81 | |||
82 | void r600_mc_fini(struct radeon_device *rdev) |
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83 | { |
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84 | /* FIXME: implement */ |
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85 | } |
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86 | |||
87 | |||
88 | /* |
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89 | * Global GPU functions |
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90 | */ |
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91 | void r600_errata(struct radeon_device *rdev) |
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92 | { |
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93 | rdev->pll_errata = 0; |
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94 | } |
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95 | |||
96 | int r600_mc_wait_for_idle(struct radeon_device *rdev) |
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97 | { |
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98 | /* FIXME: implement */ |
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99 | return 0; |
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100 | } |
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101 | |||
102 | void r600_gpu_init(struct radeon_device *rdev) |
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103 | { |
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104 | /* FIXME: implement */ |
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105 | } |
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106 | |||
107 | |||
108 | /* |
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109 | * VRAM info |
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110 | */ |
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111 | void r600_vram_get_type(struct radeon_device *rdev) |
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112 | { |
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113 | uint32_t tmp; |
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114 | int chansize; |
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115 | |||
116 | rdev->mc.vram_width = 128; |
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117 | rdev->mc.vram_is_ddr = true; |
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118 | |||
119 | tmp = RREG32(R600_RAMCFG); |
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120 | if (tmp & R600_CHANSIZE_OVERRIDE) { |
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121 | chansize = 16; |
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122 | } else if (tmp & R600_CHANSIZE) { |
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123 | chansize = 64; |
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124 | } else { |
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125 | chansize = 32; |
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126 | } |
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127 | if (rdev->family == CHIP_R600) { |
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128 | rdev->mc.vram_width = 8 * chansize; |
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129 | } else if (rdev->family == CHIP_RV670) { |
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130 | rdev->mc.vram_width = 4 * chansize; |
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131 | } else if ((rdev->family == CHIP_RV610) || |
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132 | (rdev->family == CHIP_RV620)) { |
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133 | rdev->mc.vram_width = chansize; |
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134 | } else if ((rdev->family == CHIP_RV630) || |
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135 | (rdev->family == CHIP_RV635)) { |
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136 | rdev->mc.vram_width = 2 * chansize; |
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137 | } |
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138 | } |
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139 | |||
140 | void r600_vram_info(struct radeon_device *rdev) |
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141 | { |
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142 | r600_vram_get_type(rdev); |
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1179 | serge | 143 | rdev->mc.real_vram_size = RREG32(R600_CONFIG_MEMSIZE); |
144 | rdev->mc.mc_vram_size = rdev->mc.real_vram_size; |
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1128 | serge | 145 | |
146 | /* Could aper size report 0 ? */ |
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147 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); |
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148 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); |
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149 | } |
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150 | |||
151 | /* |
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152 | * Indirect registers accessor |
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153 | */ |
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154 | uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg) |
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155 | { |
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156 | uint32_t r; |
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157 | |||
158 | WREG32(R600_PCIE_PORT_INDEX, ((reg) & 0xff)); |
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159 | (void)RREG32(R600_PCIE_PORT_INDEX); |
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160 | r = RREG32(R600_PCIE_PORT_DATA); |
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161 | return r; |
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162 | } |
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163 | |||
164 | void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) |
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165 | { |
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166 | WREG32(R600_PCIE_PORT_INDEX, ((reg) & 0xff)); |
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167 | (void)RREG32(R600_PCIE_PORT_INDEX); |
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168 | WREG32(R600_PCIE_PORT_DATA, (v)); |
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169 | (void)RREG32(R600_PCIE_PORT_DATA); |
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170 | } |