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Rev | Author | Line No. | Line |
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5078 | serge | 1 | #include |
2 | #include |
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3 | #include |
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4 | #include "radeon_reg.h" |
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5 | #include "radeon.h" |
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6 | #include "bitmap.h" |
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7 | |||
6938 | serge | 8 | #define DRV_NAME "atikms v4.5.7" |
6104 | serge | 9 | |
5097 | serge | 10 | void __init dmi_scan_machine(void); |
6938 | serge | 11 | int printf ( const char * format, ... ); |
12 | void parse_cmdline(char *cmdline, videomode_t *mode, char *log, int *kms); |
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13 | int kmap_init(); |
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5097 | serge | 14 | |
5078 | serge | 15 | #define KMS_DEV_CLOSE 0 |
16 | #define KMS_DEV_INIT 1 |
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17 | #define KMS_DEV_READY 2 |
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18 | |||
19 | struct drm_device *main_device; |
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20 | struct drm_file *drm_file_handlers[256]; |
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6104 | serge | 21 | int oops_in_progress; |
5078 | serge | 22 | |
23 | videomode_t usermode; |
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24 | |||
5271 | serge | 25 | void cpu_detect1(); |
5078 | serge | 26 | |
27 | int _stdcall display_handler(ioctl_t *io); |
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28 | static char log[256]; |
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29 | |||
30 | unsigned long volatile jiffies; |
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31 | u64 jiffies_64; |
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32 | |||
33 | struct workqueue_struct *system_wq; |
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34 | int driver_wq_state; |
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35 | |||
36 | int x86_clflush_size; |
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37 | |||
38 | void ati_driver_thread() |
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39 | { |
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40 | struct radeon_device *rdev = NULL; |
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41 | struct workqueue_struct *cwq = NULL; |
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42 | // static int dpms = 1; |
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43 | // static int dpms_lock = 0; |
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44 | // oskey_t key; |
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45 | unsigned long irqflags; |
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46 | int tmp; |
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47 | |||
48 | printf("%s\n",__FUNCTION__); |
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49 | |||
50 | while(driver_wq_state == KMS_DEV_INIT) |
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51 | { |
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6104 | serge | 52 | jiffies_64 = GetClockNs() / 10000000; |
53 | jiffies = (unsigned long)jiffies_64; |
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54 | |||
5078 | serge | 55 | delay(1); |
56 | }; |
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57 | |||
58 | rdev = main_device->dev_private; |
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59 | // cwq = rdev->wq; |
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60 | |||
61 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1)); |
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62 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330)); |
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63 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330)); |
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64 | |||
65 | while(driver_wq_state != KMS_DEV_CLOSE) |
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66 | { |
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67 | jiffies = GetTimerTicks(); |
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68 | #if 0 |
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69 | key = get_key(); |
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70 | |||
71 | if( (key.val != 1) && (key.state == 0x02)) |
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72 | { |
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73 | if(key.code == 0x46 && dpms_lock == 0) |
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74 | { |
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75 | dpms_lock = 1; |
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76 | if(dpms == 1) |
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77 | { |
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78 | i915_dpms(main_device, DRM_MODE_DPMS_OFF); |
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79 | printf("dpms off\n"); |
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80 | } |
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81 | else |
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82 | { |
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83 | i915_dpms(main_device, DRM_MODE_DPMS_ON); |
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84 | printf("dpms on\n"); |
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85 | }; |
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86 | dpms ^= 1; |
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87 | } |
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88 | else if(key.code == 0xC6) |
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89 | dpms_lock = 0; |
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90 | }; |
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91 | spin_lock_irqsave(&cwq->lock, irqflags); |
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92 | |||
93 | while (!list_empty(&cwq->worklist)) |
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94 | { |
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95 | struct work_struct *work = list_entry(cwq->worklist.next, |
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96 | struct work_struct, entry); |
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97 | work_func_t f = work->func; |
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98 | list_del_init(cwq->worklist.next); |
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99 | |||
100 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
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101 | f(work); |
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102 | spin_lock_irqsave(&cwq->lock, irqflags); |
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103 | } |
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104 | |||
105 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
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106 | #endif |
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107 | |||
108 | delay(1); |
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109 | }; |
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110 | |||
111 | asm volatile ("int $0x40"::"a"(-1)); |
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112 | } |
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113 | |||
5271 | serge | 114 | u32 __attribute__((externally_visible)) drvEntry(int action, char *cmdline) |
5078 | serge | 115 | { |
116 | struct radeon_device *rdev = NULL; |
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117 | |||
118 | const struct pci_device_id *ent; |
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119 | |||
120 | int err = 0; |
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121 | |||
122 | if(action != 1) |
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123 | { |
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124 | driver_wq_state = KMS_DEV_CLOSE; |
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125 | return 0; |
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126 | }; |
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127 | |||
128 | if( GetService("DISPLAY") != 0 ) |
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129 | return 0; |
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130 | |||
6104 | serge | 131 | printf("%s cmdline %s\n",DRV_NAME, cmdline); |
5078 | serge | 132 | |
133 | if( cmdline && *cmdline ) |
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134 | parse_cmdline(cmdline, &usermode, log, &radeon_modeset); |
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135 | |||
136 | if( *log && !dbg_open(log)) |
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137 | { |
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138 | printf("Can't open %s\nExit\n", log); |
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139 | return 0; |
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140 | } |
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6104 | serge | 141 | else |
142 | { |
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143 | dbgprintf("\nLOG: %s build %s %s\n",DRV_NAME,__DATE__, __TIME__); |
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144 | } |
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5078 | serge | 145 | |
5271 | serge | 146 | cpu_detect1(); |
5078 | serge | 147 | |
148 | err = enum_pci_devices(); |
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149 | if( unlikely(err != 0) ) |
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150 | { |
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151 | dbgprintf("Device enumeration failed\n"); |
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152 | return 0; |
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153 | } |
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154 | |||
6104 | serge | 155 | err = kmap_init(); |
156 | if( unlikely(err != 0) ) |
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157 | { |
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158 | dbgprintf("kmap initialization failed\n"); |
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159 | return 0; |
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160 | } |
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161 | |||
162 | dmi_scan_machine(); |
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163 | |||
164 | |||
5078 | serge | 165 | driver_wq_state = KMS_DEV_INIT; |
166 | CreateKernelThread(ati_driver_thread); |
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167 | |||
168 | err = ati_init(); |
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169 | if(unlikely(err!= 0)) |
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170 | { |
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171 | driver_wq_state = KMS_DEV_CLOSE; |
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172 | dbgprintf("Epic Fail :(\n"); |
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173 | return 0; |
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174 | }; |
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175 | |||
176 | driver_wq_state = KMS_DEV_READY; |
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177 | |||
178 | rdev = main_device->dev_private; |
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179 | printf("current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); |
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180 | printf("current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); |
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181 | |||
182 | err = RegService("DISPLAY", display_handler); |
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183 | |||
184 | if( err != 0) |
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185 | dbgprintf("DISPLAY service installed\n"); |
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186 | |||
187 | |||
188 | return err; |
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189 | }; |
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190 | |||
191 | |||
192 | |||
193 | #define CURRENT_API 0x0200 /* 2.00 */ |
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194 | #define COMPATIBLE_API 0x0100 /* 1.00 */ |
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195 | |||
196 | #define API_VERSION (COMPATIBLE_API << 16) | CURRENT_API |
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197 | |||
198 | #define SRV_GETVERSION 0 |
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199 | #define SRV_ENUM_MODES 1 |
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200 | #define SRV_SET_MODE 2 |
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201 | #define SRV_GET_CAPS 3 |
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202 | |||
203 | #define SRV_CREATE_SURFACE 10 |
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204 | #define SRV_DESTROY_SURFACE 11 |
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205 | #define SRV_LOCK_SURFACE 12 |
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206 | #define SRV_UNLOCK_SURFACE 13 |
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207 | #define SRV_RESIZE_SURFACE 14 |
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208 | #define SRV_BLIT_BITMAP 15 |
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209 | #define SRV_BLIT_TEXTURE 16 |
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210 | #define SRV_BLIT_VIDEO 17 |
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211 | |||
212 | |||
213 | |||
214 | int r600_video_blit(uint64_t src_offset, int x, int y, |
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215 | int w, int h, int pitch); |
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216 | |||
217 | #define check_input(size) \ |
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218 | if( unlikely((inp==NULL)||(io->inp_size != (size))) ) \ |
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219 | break; |
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220 | |||
221 | #define check_output(size) \ |
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222 | if( unlikely((outp==NULL)||(io->out_size != (size))) ) \ |
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223 | break; |
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224 | |||
225 | int _stdcall display_handler(ioctl_t *io) |
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226 | { |
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227 | int retval = -1; |
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5271 | serge | 228 | u32 *inp; |
229 | u32 *outp; |
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5078 | serge | 230 | |
231 | inp = io->input; |
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232 | outp = io->output; |
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233 | |||
234 | switch(io->io_code) |
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235 | { |
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236 | case SRV_GETVERSION: |
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237 | check_output(4); |
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238 | *outp = API_VERSION; |
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239 | retval = 0; |
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240 | break; |
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241 | |||
242 | case SRV_ENUM_MODES: |
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243 | // dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n", |
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244 | // inp, io->inp_size, io->out_size ); |
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245 | check_output(4); |
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246 | if( radeon_modeset) |
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247 | retval = get_videomodes((videomode_t*)inp, outp); |
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248 | break; |
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249 | |||
250 | case SRV_SET_MODE: |
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251 | // dbgprintf("SRV_SET_MODE inp %x inp_size %x\n", |
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252 | // inp, io->inp_size); |
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253 | check_input(sizeof(videomode_t)); |
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254 | if( radeon_modeset ) |
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255 | retval = set_user_mode((videomode_t*)inp); |
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256 | break; |
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257 | /* |
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258 | case SRV_GET_CAPS: |
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259 | retval = get_driver_caps((hwcaps_t*)inp); |
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260 | break; |
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261 | |||
262 | case SRV_CREATE_SURFACE: |
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263 | // check_input(8); |
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264 | retval = create_surface(main_drm_device, (struct io_call_10*)inp); |
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265 | break; |
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266 | |||
267 | case SRV_LOCK_SURFACE: |
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268 | retval = lock_surface((struct io_call_12*)inp); |
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269 | break; |
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270 | |||
271 | case SRV_BLIT_BITMAP: |
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272 | srv_blit_bitmap( inp[0], inp[1], inp[2], |
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273 | inp[3], inp[4], inp[5], inp[6]); |
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274 | */ |
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275 | }; |
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276 | |||
277 | return retval; |
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278 | } |
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279 | |||
280 | |||
281 | #define PCI_CLASS_REVISION 0x08 |
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282 | #define PCI_CLASS_DISPLAY_VGA 0x0300 |
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283 | |||
5271 | serge | 284 | int pci_scan_filter(u32 id, u32 busnr, u32 devfn) |
5078 | serge | 285 | { |
5271 | serge | 286 | u16 vendor, device; |
287 | u32 class; |
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6104 | serge | 288 | int ret = 0; |
5078 | serge | 289 | |
290 | vendor = id & 0xffff; |
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291 | device = (id >> 16) & 0xffff; |
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292 | |||
293 | if(vendor == 0x1002) |
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294 | { |
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295 | class = PciRead32(busnr, devfn, PCI_CLASS_REVISION); |
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5367 | serge | 296 | class >>= 24; |
5078 | serge | 297 | |
5367 | serge | 298 | if( class ==PCI_BASE_CLASS_DISPLAY) |
5078 | serge | 299 | ret = 1; |
300 | } |
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301 | return ret; |
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302 | } |
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303 | |||
304 | |||
305 | int seq_printf(struct seq_file *m, const char *f, ...) |
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306 | { |
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307 | // int ret; |
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308 | // va_list args; |
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309 | |||
310 | // va_start(args, f); |
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311 | // ret = seq_vprintf(m, f, args); |
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312 | // va_end(args); |
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313 | |||
314 | // return ret; |
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315 | return 0; |
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316 | }><> |