Rev 6321 | Rev 6938 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
5078 | serge | 1 | #include |
2 | #include |
||
3 | #include |
||
4 | #include "radeon_reg.h" |
||
5 | #include "radeon.h" |
||
6 | #include "bitmap.h" |
||
7 | |||
6661 | serge | 8 | #define DRV_NAME "atikms v4.4.30" |
6104 | serge | 9 | |
5097 | serge | 10 | void __init dmi_scan_machine(void); |
11 | |||
5078 | serge | 12 | #define KMS_DEV_CLOSE 0 |
13 | #define KMS_DEV_INIT 1 |
||
14 | #define KMS_DEV_READY 2 |
||
15 | |||
16 | struct drm_device *main_device; |
||
17 | struct drm_file *drm_file_handlers[256]; |
||
6104 | serge | 18 | int oops_in_progress; |
5078 | serge | 19 | |
20 | videomode_t usermode; |
||
21 | |||
5271 | serge | 22 | void cpu_detect1(); |
5078 | serge | 23 | |
24 | int _stdcall display_handler(ioctl_t *io); |
||
25 | static char log[256]; |
||
26 | |||
27 | unsigned long volatile jiffies; |
||
28 | u64 jiffies_64; |
||
29 | |||
30 | struct workqueue_struct *system_wq; |
||
31 | int driver_wq_state; |
||
32 | |||
33 | int x86_clflush_size; |
||
34 | |||
35 | void ati_driver_thread() |
||
36 | { |
||
37 | struct radeon_device *rdev = NULL; |
||
38 | struct workqueue_struct *cwq = NULL; |
||
39 | // static int dpms = 1; |
||
40 | // static int dpms_lock = 0; |
||
41 | // oskey_t key; |
||
42 | unsigned long irqflags; |
||
43 | int tmp; |
||
44 | |||
45 | printf("%s\n",__FUNCTION__); |
||
46 | |||
47 | while(driver_wq_state == KMS_DEV_INIT) |
||
48 | { |
||
6104 | serge | 49 | jiffies_64 = GetClockNs() / 10000000; |
50 | jiffies = (unsigned long)jiffies_64; |
||
51 | |||
5078 | serge | 52 | delay(1); |
53 | }; |
||
54 | |||
55 | rdev = main_device->dev_private; |
||
56 | // cwq = rdev->wq; |
||
57 | |||
58 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1)); |
||
59 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330)); |
||
60 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330)); |
||
61 | |||
62 | while(driver_wq_state != KMS_DEV_CLOSE) |
||
63 | { |
||
64 | jiffies = GetTimerTicks(); |
||
65 | #if 0 |
||
66 | key = get_key(); |
||
67 | |||
68 | if( (key.val != 1) && (key.state == 0x02)) |
||
69 | { |
||
70 | if(key.code == 0x46 && dpms_lock == 0) |
||
71 | { |
||
72 | dpms_lock = 1; |
||
73 | if(dpms == 1) |
||
74 | { |
||
75 | i915_dpms(main_device, DRM_MODE_DPMS_OFF); |
||
76 | printf("dpms off\n"); |
||
77 | } |
||
78 | else |
||
79 | { |
||
80 | i915_dpms(main_device, DRM_MODE_DPMS_ON); |
||
81 | printf("dpms on\n"); |
||
82 | }; |
||
83 | dpms ^= 1; |
||
84 | } |
||
85 | else if(key.code == 0xC6) |
||
86 | dpms_lock = 0; |
||
87 | }; |
||
88 | spin_lock_irqsave(&cwq->lock, irqflags); |
||
89 | |||
90 | while (!list_empty(&cwq->worklist)) |
||
91 | { |
||
92 | struct work_struct *work = list_entry(cwq->worklist.next, |
||
93 | struct work_struct, entry); |
||
94 | work_func_t f = work->func; |
||
95 | list_del_init(cwq->worklist.next); |
||
96 | |||
97 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
||
98 | f(work); |
||
99 | spin_lock_irqsave(&cwq->lock, irqflags); |
||
100 | } |
||
101 | |||
102 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
||
103 | #endif |
||
104 | |||
105 | delay(1); |
||
106 | }; |
||
107 | |||
108 | asm volatile ("int $0x40"::"a"(-1)); |
||
109 | } |
||
110 | |||
5271 | serge | 111 | u32 __attribute__((externally_visible)) drvEntry(int action, char *cmdline) |
5078 | serge | 112 | { |
113 | struct radeon_device *rdev = NULL; |
||
114 | |||
115 | const struct pci_device_id *ent; |
||
116 | |||
117 | int err = 0; |
||
118 | |||
119 | if(action != 1) |
||
120 | { |
||
121 | driver_wq_state = KMS_DEV_CLOSE; |
||
122 | return 0; |
||
123 | }; |
||
124 | |||
125 | if( GetService("DISPLAY") != 0 ) |
||
126 | return 0; |
||
127 | |||
6104 | serge | 128 | printf("%s cmdline %s\n",DRV_NAME, cmdline); |
5078 | serge | 129 | |
130 | if( cmdline && *cmdline ) |
||
131 | parse_cmdline(cmdline, &usermode, log, &radeon_modeset); |
||
132 | |||
133 | if( *log && !dbg_open(log)) |
||
134 | { |
||
135 | printf("Can't open %s\nExit\n", log); |
||
136 | return 0; |
||
137 | } |
||
6104 | serge | 138 | else |
139 | { |
||
140 | dbgprintf("\nLOG: %s build %s %s\n",DRV_NAME,__DATE__, __TIME__); |
||
141 | } |
||
5078 | serge | 142 | |
5271 | serge | 143 | cpu_detect1(); |
5078 | serge | 144 | |
145 | err = enum_pci_devices(); |
||
146 | if( unlikely(err != 0) ) |
||
147 | { |
||
148 | dbgprintf("Device enumeration failed\n"); |
||
149 | return 0; |
||
150 | } |
||
151 | |||
6104 | serge | 152 | err = kmap_init(); |
153 | if( unlikely(err != 0) ) |
||
154 | { |
||
155 | dbgprintf("kmap initialization failed\n"); |
||
156 | return 0; |
||
157 | } |
||
158 | |||
159 | dmi_scan_machine(); |
||
160 | |||
161 | |||
5078 | serge | 162 | driver_wq_state = KMS_DEV_INIT; |
163 | CreateKernelThread(ati_driver_thread); |
||
164 | |||
165 | err = ati_init(); |
||
166 | if(unlikely(err!= 0)) |
||
167 | { |
||
168 | driver_wq_state = KMS_DEV_CLOSE; |
||
169 | dbgprintf("Epic Fail :(\n"); |
||
170 | return 0; |
||
171 | }; |
||
172 | |||
173 | driver_wq_state = KMS_DEV_READY; |
||
174 | |||
175 | rdev = main_device->dev_private; |
||
176 | printf("current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); |
||
177 | printf("current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); |
||
178 | |||
179 | err = RegService("DISPLAY", display_handler); |
||
180 | |||
181 | if( err != 0) |
||
182 | dbgprintf("DISPLAY service installed\n"); |
||
183 | |||
184 | |||
185 | return err; |
||
186 | }; |
||
187 | |||
188 | |||
189 | |||
190 | #define CURRENT_API 0x0200 /* 2.00 */ |
||
191 | #define COMPATIBLE_API 0x0100 /* 1.00 */ |
||
192 | |||
193 | #define API_VERSION (COMPATIBLE_API << 16) | CURRENT_API |
||
194 | |||
195 | #define SRV_GETVERSION 0 |
||
196 | #define SRV_ENUM_MODES 1 |
||
197 | #define SRV_SET_MODE 2 |
||
198 | #define SRV_GET_CAPS 3 |
||
199 | |||
200 | #define SRV_CREATE_SURFACE 10 |
||
201 | #define SRV_DESTROY_SURFACE 11 |
||
202 | #define SRV_LOCK_SURFACE 12 |
||
203 | #define SRV_UNLOCK_SURFACE 13 |
||
204 | #define SRV_RESIZE_SURFACE 14 |
||
205 | #define SRV_BLIT_BITMAP 15 |
||
206 | #define SRV_BLIT_TEXTURE 16 |
||
207 | #define SRV_BLIT_VIDEO 17 |
||
208 | |||
209 | |||
210 | |||
211 | int r600_video_blit(uint64_t src_offset, int x, int y, |
||
212 | int w, int h, int pitch); |
||
213 | |||
214 | #define check_input(size) \ |
||
215 | if( unlikely((inp==NULL)||(io->inp_size != (size))) ) \ |
||
216 | break; |
||
217 | |||
218 | #define check_output(size) \ |
||
219 | if( unlikely((outp==NULL)||(io->out_size != (size))) ) \ |
||
220 | break; |
||
221 | |||
222 | int _stdcall display_handler(ioctl_t *io) |
||
223 | { |
||
224 | int retval = -1; |
||
5271 | serge | 225 | u32 *inp; |
226 | u32 *outp; |
||
5078 | serge | 227 | |
228 | inp = io->input; |
||
229 | outp = io->output; |
||
230 | |||
231 | switch(io->io_code) |
||
232 | { |
||
233 | case SRV_GETVERSION: |
||
234 | check_output(4); |
||
235 | *outp = API_VERSION; |
||
236 | retval = 0; |
||
237 | break; |
||
238 | |||
239 | case SRV_ENUM_MODES: |
||
240 | // dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n", |
||
241 | // inp, io->inp_size, io->out_size ); |
||
242 | check_output(4); |
||
243 | if( radeon_modeset) |
||
244 | retval = get_videomodes((videomode_t*)inp, outp); |
||
245 | break; |
||
246 | |||
247 | case SRV_SET_MODE: |
||
248 | // dbgprintf("SRV_SET_MODE inp %x inp_size %x\n", |
||
249 | // inp, io->inp_size); |
||
250 | check_input(sizeof(videomode_t)); |
||
251 | if( radeon_modeset ) |
||
252 | retval = set_user_mode((videomode_t*)inp); |
||
253 | break; |
||
254 | /* |
||
255 | case SRV_GET_CAPS: |
||
256 | retval = get_driver_caps((hwcaps_t*)inp); |
||
257 | break; |
||
258 | |||
259 | case SRV_CREATE_SURFACE: |
||
260 | // check_input(8); |
||
261 | retval = create_surface(main_drm_device, (struct io_call_10*)inp); |
||
262 | break; |
||
263 | |||
264 | case SRV_LOCK_SURFACE: |
||
265 | retval = lock_surface((struct io_call_12*)inp); |
||
266 | break; |
||
267 | |||
268 | case SRV_BLIT_BITMAP: |
||
269 | srv_blit_bitmap( inp[0], inp[1], inp[2], |
||
270 | inp[3], inp[4], inp[5], inp[6]); |
||
271 | */ |
||
272 | }; |
||
273 | |||
274 | return retval; |
||
275 | } |
||
276 | |||
277 | |||
278 | #define PCI_CLASS_REVISION 0x08 |
||
279 | #define PCI_CLASS_DISPLAY_VGA 0x0300 |
||
280 | |||
5271 | serge | 281 | int pci_scan_filter(u32 id, u32 busnr, u32 devfn) |
5078 | serge | 282 | { |
5271 | serge | 283 | u16 vendor, device; |
284 | u32 class; |
||
6104 | serge | 285 | int ret = 0; |
5078 | serge | 286 | |
287 | vendor = id & 0xffff; |
||
288 | device = (id >> 16) & 0xffff; |
||
289 | |||
290 | if(vendor == 0x1002) |
||
291 | { |
||
292 | class = PciRead32(busnr, devfn, PCI_CLASS_REVISION); |
||
5367 | serge | 293 | class >>= 24; |
5078 | serge | 294 | |
5367 | serge | 295 | if( class ==PCI_BASE_CLASS_DISPLAY) |
5078 | serge | 296 | ret = 1; |
297 | } |
||
298 | return ret; |
||
299 | } |
||
300 | |||
301 | |||
302 | int seq_printf(struct seq_file *m, const char *f, ...) |
||
303 | { |
||
304 | // int ret; |
||
305 | // va_list args; |
||
306 | |||
307 | // va_start(args, f); |
||
308 | // ret = seq_vprintf(m, f, args); |
||
309 | // va_end(args); |
||
310 | |||
311 | // return ret; |
||
312 | return 0; |
||
313 | } |
||
314 | |||
315 | s64 div64_s64(s64 dividend, s64 divisor) |
||
316 | { |
||
317 | s64 quot, t; |
||
318 | |||
6104 | serge | 319 | quot = div64_u64(abs(dividend), abs(divisor)); |
5078 | serge | 320 | t = (dividend ^ divisor) >> 63; |
321 | |||
322 | return (quot ^ t) - t; |
||
323 | }><> |
||
324 |