WebSVN – Kolibri OS – Blame – /drivers/video/drm/i915/main.c

Rev	Author	Line No.	Line
3031	serge	1	#include
		2	#include
		3	#include
2338	Serge	4	#include "i915_drv.h"
3031	serge	5	//#include "intel_drv.h"
2338	Serge	6
2325	Serge	7	#include
		8	#include
		9	#include
		10	#include
		11	#include
		12	#include
		13
2342	Serge	14	#include "bitmap.h"
2340	Serge	15
3255	Serge	16	struct pci_device {
		17	uint16_t domain;
		18	uint8_t bus;
		19	uint8_t dev;
		20	uint8_t func;
		21	uint16_t vendor_id;
		22	uint16_t device_id;
		23	uint16_t subvendor_id;
		24	uint16_t subdevice_id;
		25	uint32_t device_class;
		26	uint8_t revision;
		27	};
		28
3033	serge	29	extern struct drm_device *main_device;
3255	Serge	30	extern struct drm_file *drm_file_handlers[256];
3033	serge	31
2344	Serge	32	void cpu_detect();
		33
2340	Serge	34	void parse_cmdline(char cmdline, char log);
2338	Serge	35	int _stdcall display_handler(ioctl_t *io);
2325	Serge	36	int init_agp(void);
		37
3120	serge	38	int srv_blit_bitmap(u32 hbitmap, int dst_x, int dst_y,
2351	Serge	39	int src_x, int src_y, u32 w, u32 h);
2340	Serge	40
2351	Serge	41	int blit_textured(u32 hbitmap, int dst_x, int dst_y,
		42	int src_x, int src_y, u32 w, u32 h);
		43
2361	Serge	44	int blit_tex(u32 hbitmap, int dst_x, int dst_y,
		45	int src_x, int src_y, u32 w, u32 h);
		46
3255	Serge	47	void get_pci_info(struct pci_device *dev);
		48	int gem_getparam(struct drm_device dev, void data);
		49
3277	Serge	50	int i915_mask_update(struct drm_device dev, void data,
		51	struct drm_file *file);
3255	Serge	52
3277	Serge	53
2325	Serge	54	static char log[256];
		55
3482	Serge	56	struct workqueue_struct *system_wq;
3764	Serge	57	int driver_wq_state;
3482	Serge	58
2344	Serge	59	int x86_clflush_size;
3482	Serge	60	unsigned int tsc_khz;
2344	Serge	61
2338	Serge	62	int i915_modeset = 1;
		63
3480	Serge	64	u32_t __attribute__((externally_visible)) drvEntry(int action, char *cmdline)
2325	Serge	65	{
		66
		67	int err = 0;
		68
		69	if(action != 1)
3764	Serge	70	{
		71	driver_wq_state = 0;
2325	Serge	72	return 0;
3764	Serge	73	};
2325	Serge	74
		75	if( GetService("DISPLAY") != 0 )
		76	return 0;
		77
2340	Serge	78	if( cmdline && *cmdline )
		79	parse_cmdline(cmdline, log);
2325	Serge	80
		81	if(!dbg_open(log))
		82	{
3263	Serge	83	strcpy(log, "/tmp1/1/i915.log");
		84	// strcpy(log, "/RD/1/DRIVERS/i915.log");
2325	Serge	85
		86	if(!dbg_open(log))
		87	{
		88	printf("Can't open %s\nExit\n", log);
		89	return 0;
		90	};
		91	}
3764	Serge	92	dbgprintf(" i915 v3.10\n cmdline: %s\n", cmdline);
2325	Serge	93
2351	Serge	94	cpu_detect();
3480	Serge	95	// dbgprintf("\ncache line size %d\n", x86_clflush_size);
2351	Serge	96
2325	Serge	97	enum_pci_devices();
		98
		99	err = i915_init();
		100
2338	Serge	101	if(err)
		102	{
3298	Serge	103	dbgprintf("Epic Fail :(\n");
		104	return 0;
2338	Serge	105	};
2325	Serge	106
2338	Serge	107	err = RegService("DISPLAY", display_handler);
2325	Serge	108
2338	Serge	109	if( err != 0)
		110	dbgprintf("Set DISPLAY handler\n");
		111
3482	Serge	112	struct drm_i915_private *dev_priv = main_device->dev_private;
3764	Serge	113	driver_wq_state = 1;
3482	Serge	114	run_workqueue(dev_priv->wq);
		115
2325	Serge	116	return err;
		117	};
		118
3480	Serge	119
2344	Serge	120	#define CURRENT_API 0x0200 /* 2.00 */
		121	#define COMPATIBLE_API 0x0100 /* 1.00 */
2338	Serge	122
2344	Serge	123	#define API_VERSION (COMPATIBLE_API << 16) \| CURRENT_API
2351	Serge	124	#define DISPLAY_VERSION API_VERSION
2338	Serge	125
		126
2352	Serge	127	#define SRV_GETVERSION 0
		128	#define SRV_ENUM_MODES 1
		129	#define SRV_SET_MODE 2
		130	#define SRV_GET_CAPS 3
2342	Serge	131
2352	Serge	132	#define SRV_CREATE_SURFACE 10
		133	#define SRV_DESTROY_SURFACE 11
		134	#define SRV_LOCK_SURFACE 12
		135	#define SRV_UNLOCK_SURFACE 13
3039	serge	136	#define SRV_RESIZE_SURFACE 14
3120	serge	137	#define SRV_BLIT_BITMAP 15
		138	#define SRV_BLIT_TEXTURE 16
		139	#define SRV_BLIT_VIDEO 17
2344	Serge	140
3290	Serge	141
3260	Serge	142	#define SRV_GET_PCI_INFO 20
3255	Serge	143	#define SRV_GET_PARAM 21
		144	#define SRV_I915_GEM_CREATE 22
		145	#define SRV_DRM_GEM_CLOSE 23
		146	#define SRV_I915_GEM_PIN 24
3260	Serge	147	#define SRV_I915_GEM_SET_CACHEING 25
		148	#define SRV_I915_GEM_GET_APERTURE 26
		149	#define SRV_I915_GEM_PWRITE 27
		150	#define SRV_I915_GEM_BUSY 28
		151	#define SRV_I915_GEM_SET_DOMAIN 29
3263	Serge	152	#define SRV_I915_GEM_MMAP 30
3480	Serge	153	#define SRV_I915_GEM_MMAP_GTT 31
3263	Serge	154	#define SRV_I915_GEM_THROTTLE 32
		155	#define SRV_FBINFO 33
		156	#define SRV_I915_GEM_EXECBUFFER2 34
3290	Serge	157	#define SRV_MASK_UPDATE 35
3260	Serge	158
3263	Serge	159
		160
2338	Serge	161	#define check_input(size) \
		162	if( unlikely((inp==NULL)\|\|(io->inp_size != (size))) ) \
		163	break;
		164
		165	#define check_output(size) \
		166	if( unlikely((outp==NULL)\|\|(io->out_size != (size))) ) \
		167	break;
		168
		169	int _stdcall display_handler(ioctl_t *io)
		170	{
3255	Serge	171	struct drm_file *file;
		172
2338	Serge	173	int retval = -1;
		174	u32_t *inp;
		175	u32_t *outp;
		176
		177	inp = io->input;
		178	outp = io->output;
		179
3255	Serge	180	file = drm_file_handlers[0];
		181
2338	Serge	182	switch(io->io_code)
		183	{
		184	case SRV_GETVERSION:
		185	check_output(4);
2344	Serge	186	*outp = DISPLAY_VERSION;
2338	Serge	187	retval = 0;
		188	break;
		189
		190	case SRV_ENUM_MODES:
3031	serge	191	// dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
		192	// inp, io->inp_size, io->out_size );
2340	Serge	193	check_output(4);
2338	Serge	194	// check_input(outp sizeof(videomode_t));
		195	if( i915_modeset)
		196	retval = get_videomodes((videomode_t*)inp, outp);
		197	break;
		198
		199	case SRV_SET_MODE:
3031	serge	200	// dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
		201	// inp, io->inp_size);
2338	Serge	202	check_input(sizeof(videomode_t));
		203	if( i915_modeset )
		204	retval = set_user_mode((videomode_t*)inp);
		205	break;
3033	serge	206
2351	Serge	207	case SRV_GET_CAPS:
		208	retval = get_driver_caps((hwcaps_t*)inp);
		209	break;
		210
2344	Serge	211	case SRV_CREATE_SURFACE:
		212	// check_input(8);
3243	Serge	213	// retval = create_surface(main_device, (struct io_call_10*)inp);
2338	Serge	214	break;
		215
2352	Serge	216	case SRV_LOCK_SURFACE:
3243	Serge	217	// retval = lock_surface((struct io_call_12*)inp);
2352	Serge	218	break;
2342	Serge	219
3039	serge	220	case SRV_RESIZE_SURFACE:
3243	Serge	221	// retval = resize_surface((struct io_call_14*)inp);
3039	serge	222	break;
		223
3255	Serge	224	case SRV_BLIT_BITMAP:
3243	Serge	225	// srv_blit_bitmap( inp[0], inp[1], inp[2],
		226	// inp[3], inp[4], inp[5], inp[6]);
3033	serge	227
		228	// blit_tex( inp[0], inp[1], inp[2],
2351	Serge	229	// inp[3], inp[4], inp[5], inp[6]);
		230
3255	Serge	231	break;
2338	Serge	232
3260	Serge	233	case SRV_GET_PCI_INFO:
3255	Serge	234	get_pci_info((struct pci_device *)inp);
2338	Serge	235	retval = 0;
		236	break;
3031	serge	237
3255	Serge	238	case SRV_GET_PARAM:
		239	retval = gem_getparam(main_device, inp);
		240	break;
		241
		242	case SRV_I915_GEM_CREATE:
		243	retval = i915_gem_create_ioctl(main_device, inp, file);
		244	break;
		245
		246	case SRV_DRM_GEM_CLOSE:
		247	retval = drm_gem_close_ioctl(main_device, inp, file);
		248	break;
		249
		250	case SRV_I915_GEM_PIN:
		251	retval = i915_gem_pin_ioctl(main_device, inp, file);
		252	break;
3260	Serge	253
		254	case SRV_I915_GEM_SET_CACHEING:
		255	retval = i915_gem_set_caching_ioctl(main_device, inp, file);
		256	break;
		257
		258	case SRV_I915_GEM_GET_APERTURE:
		259	retval = i915_gem_get_aperture_ioctl(main_device, inp, file);
		260	break;
		261
		262	case SRV_I915_GEM_PWRITE:
		263	retval = i915_gem_pwrite_ioctl(main_device, inp, file);
		264	break;
		265
		266	case SRV_I915_GEM_BUSY:
		267	retval = i915_gem_busy_ioctl(main_device, inp, file);
		268	break;
		269
		270	case SRV_I915_GEM_SET_DOMAIN:
		271	retval = i915_gem_set_domain_ioctl(main_device, inp, file);
		272	break;
		273
3263	Serge	274	case SRV_I915_GEM_THROTTLE:
		275	retval = i915_gem_throttle_ioctl(main_device, inp, file);
		276	break;
		277
		278	case SRV_I915_GEM_MMAP:
		279	retval = i915_gem_mmap_ioctl(main_device, inp, file);
		280	break;
		281
3480	Serge	282	case SRV_I915_GEM_MMAP_GTT:
		283	retval = i915_gem_mmap_gtt_ioctl(main_device, inp, file);
		284	break;
		285
		286
3263	Serge	287	case SRV_FBINFO:
		288	retval = i915_fbinfo(inp);
		289	break;
		290
		291	case SRV_I915_GEM_EXECBUFFER2:
		292	retval = i915_gem_execbuffer2(main_device, inp, file);
		293	break;
		294
3290	Serge	295	case SRV_MASK_UPDATE:
		296	retval = i915_mask_update(main_device, inp, file);
		297	break;
		298
2338	Serge	299	};
		300
		301	return retval;
		302	}
		303
		304
2325	Serge	305	#define PCI_CLASS_REVISION 0x08
		306	#define PCI_CLASS_DISPLAY_VGA 0x0300
		307	#define PCI_CLASS_BRIDGE_HOST 0x0600
2326	Serge	308	#define PCI_CLASS_BRIDGE_ISA 0x0601
2325	Serge	309
		310	int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn)
		311	{
		312	u16_t vendor, device;
		313	u32_t class;
		314	int ret = 0;
		315
		316	vendor = id & 0xffff;
		317	device = (id >> 16) & 0xffff;
		318
		319	if(vendor == 0x8086)
		320	{
		321	class = PciRead32(busnr, devfn, PCI_CLASS_REVISION);
		322	class >>= 16;
		323
		324	if( (class == PCI_CLASS_DISPLAY_VGA) \|\|
2326	Serge	325	(class == PCI_CLASS_BRIDGE_HOST) \|\|
		326	(class == PCI_CLASS_BRIDGE_ISA))
2325	Serge	327	ret = 1;
		328	}
		329	return ret;
		330	};
2340	Serge	331
		332
		333	static char* parse_path(char p, char log)
		334	{
		335	char c;
		336
		337	while( (c = *p++) == ' ');
		338	p--;
		339	while( (c = log++ = p++) && (c != ' '));
		340	*log = 0;
		341
		342	return p;
		343	};
		344
		345	void parse_cmdline(char cmdline, char log)
		346	{
		347	char *p = cmdline;
		348
		349	char c = *p++;
		350
		351	while( c )
		352	{
		353	if( c == '-')
		354	{
		355	switch(*p++)
		356	{
		357	case 'l':
		358	p = parse_path(p, log);
		359	break;
		360	};
		361	};
		362	c = *p++;
		363	};
		364	};
		365
2351	Serge	366
2344	Serge	367	static inline void __cpuid(unsigned int eax, unsigned int ebx,
2351	Serge	368	unsigned int ecx, unsigned int edx)
2344	Serge	369	{
		370	/* ecx is often an input as well as an output. */
2351	Serge	371	asm volatile("cpuid"
2344	Serge	372	: "=a" (*eax),
		373	"=b" (*ebx),
		374	"=c" (*ecx),
		375	"=d" (*edx)
2351	Serge	376	: "0" (eax), "2" (ecx)
		377	: "memory");
2344	Serge	378	}
		379
2351	Serge	380
		381
2344	Serge	382	static inline void cpuid(unsigned int op,
		383	unsigned int eax, unsigned int ebx,
		384	unsigned int ecx, unsigned int edx)
		385	{
		386	*eax = op;
		387	*ecx = 0;
		388	__cpuid(eax, ebx, ecx, edx);
		389	}
		390
		391	void cpu_detect()
		392	{
		393	u32 junk, tfms, cap0, misc;
		394
		395	cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
		396
		397	if (cap0 & (1<<19))
		398	{
		399	x86_clflush_size = ((misc >> 8) & 0xff) * 8;
		400	}
3482	Serge	401
		402	tsc_khz = (unsigned int)(GetCpuFreq()/1000);
2344	Serge	403	}
		404
3243	Serge	405
		406	int get_driver_caps(hwcaps_t *caps)
		407	{
		408	int ret = 0;
		409
		410	switch(caps->idx)
		411	{
		412	case 0:
		413	caps->opt[0] = 0;
		414	caps->opt[1] = 0;
		415	break;
		416
		417	case 1:
		418	caps->cap1.max_tex_width = 4096;
		419	caps->cap1.max_tex_height = 4096;
		420	break;
		421	default:
		422	ret = 1;
		423	};
		424	caps->idx = 1;
		425	return ret;
		426	}
		427
3255	Serge	428
		429	void get_pci_info(struct pci_device *dev)
		430	{
		431	struct pci_dev *pdev = main_device->pdev;
		432
		433	memset(dev, sizeof(*dev), 0);
		434
		435	dev->domain = 0;
		436	dev->bus = pdev->busnr;
		437	dev->dev = pdev->devfn >> 3;
		438	dev->func = pdev->devfn & 7;
		439	dev->vendor_id = pdev->vendor;
		440	dev->device_id = pdev->device;
		441	dev->revision = pdev->revision;
		442	};

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(root)/drivers/video/drm/i915/main.c – Rev 3764