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Rev Author Line No. Line
3031 serge 1
#include 
2
#include 
3
#include 
2338 Serge 4
#include "i915_drv.h"
3031 serge 5
//#include "intel_drv.h"
2338 Serge 6
 
2325 Serge 7
#include 
8
#include 
9
#include 
10
#include 
11
#include 
12
#include 
13
 
2342 Serge 14
#include "bitmap.h"
2340 Serge 15
 
3255 Serge 16
struct pci_device {
17
    uint16_t    domain;
18
    uint8_t     bus;
19
    uint8_t     dev;
20
    uint8_t     func;
21
    uint16_t    vendor_id;
22
    uint16_t    device_id;
23
    uint16_t    subvendor_id;
24
    uint16_t    subdevice_id;
25
    uint32_t    device_class;
26
    uint8_t     revision;
27
};
28
 
3033 serge 29
extern struct drm_device *main_device;
3255 Serge 30
extern struct drm_file   *drm_file_handlers[256];
3033 serge 31
 
2344 Serge 32
void cpu_detect();
33
 
2340 Serge 34
void parse_cmdline(char *cmdline, char *log);
2338 Serge 35
int _stdcall display_handler(ioctl_t *io);
2325 Serge 36
int init_agp(void);
37
 
3120 serge 38
int srv_blit_bitmap(u32 hbitmap, int  dst_x, int dst_y,
2351 Serge 39
               int src_x, int src_y, u32 w, u32 h);
2340 Serge 40
 
2351 Serge 41
int blit_textured(u32 hbitmap, int  dst_x, int dst_y,
42
               int src_x, int src_y, u32 w, u32 h);
43
 
2361 Serge 44
int blit_tex(u32 hbitmap, int  dst_x, int dst_y,
45
             int src_x, int src_y, u32 w, u32 h);
46
 
3255 Serge 47
void get_pci_info(struct pci_device *dev);
48
int gem_getparam(struct drm_device *dev, void *data);
49
 
3277 Serge 50
int i915_mask_update(struct drm_device *dev, void *data,
51
            struct drm_file *file);
3255 Serge 52
 
3277 Serge 53
 
2325 Serge 54
static char  log[256];
55
 
2344 Serge 56
int x86_clflush_size;
57
 
2338 Serge 58
int i915_modeset = 1;
59
 
2325 Serge 60
u32_t drvEntry(int action, char *cmdline)
61
{
62
 
63
    int     err = 0;
64
 
65
    if(action != 1)
66
        return 0;
67
 
68
    if( GetService("DISPLAY") != 0 )
69
        return 0;
70
 
2340 Serge 71
    if( cmdline && *cmdline )
72
        parse_cmdline(cmdline, log);
2325 Serge 73
 
74
    if(!dbg_open(log))
75
    {
3263 Serge 76
        strcpy(log, "/tmp1/1/i915.log");
77
//        strcpy(log, "/RD/1/DRIVERS/i915.log");
2325 Serge 78
 
79
        if(!dbg_open(log))
80
        {
81
            printf("Can't open %s\nExit\n", log);
82
            return 0;
83
        };
84
    }
3298 Serge 85
    dbgprintf("i915 RC 10.5\n cmdline: %s\n", cmdline);
2325 Serge 86
 
2351 Serge 87
    cpu_detect();
88
    dbgprintf("\ncache line size %d\n", x86_clflush_size);
89
 
2325 Serge 90
    enum_pci_devices();
91
 
92
    err = i915_init();
93
 
2338 Serge 94
    if(err)
95
    {
3298 Serge 96
        dbgprintf("Epic Fail :(\n");
97
        return 0;
2338 Serge 98
    };
2325 Serge 99
 
2338 Serge 100
    err = RegService("DISPLAY", display_handler);
2325 Serge 101
 
2338 Serge 102
    if( err != 0)
103
        dbgprintf("Set DISPLAY handler\n");
104
 
2325 Serge 105
    return err;
106
};
107
 
2344 Serge 108
#define CURRENT_API     0x0200      /*      2.00     */
109
#define COMPATIBLE_API  0x0100      /*      1.00     */
2338 Serge 110
 
2344 Serge 111
#define API_VERSION     (COMPATIBLE_API << 16) | CURRENT_API
2351 Serge 112
#define DISPLAY_VERSION  API_VERSION
2338 Serge 113
 
114
 
2352 Serge 115
#define SRV_GETVERSION          0
116
#define SRV_ENUM_MODES          1
117
#define SRV_SET_MODE            2
118
#define SRV_GET_CAPS            3
2342 Serge 119
 
2352 Serge 120
#define SRV_CREATE_SURFACE      10
121
#define SRV_DESTROY_SURFACE     11
122
#define SRV_LOCK_SURFACE        12
123
#define SRV_UNLOCK_SURFACE      13
3039 serge 124
#define SRV_RESIZE_SURFACE      14
3120 serge 125
#define SRV_BLIT_BITMAP         15
126
#define SRV_BLIT_TEXTURE        16
127
#define SRV_BLIT_VIDEO          17
2344 Serge 128
 
3290 Serge 129
 
3260 Serge 130
#define SRV_GET_PCI_INFO            20
3255 Serge 131
#define SRV_GET_PARAM           21
132
#define SRV_I915_GEM_CREATE     22
133
#define SRV_DRM_GEM_CLOSE       23
134
#define SRV_I915_GEM_PIN        24
3260 Serge 135
#define SRV_I915_GEM_SET_CACHEING   25
136
#define SRV_I915_GEM_GET_APERTURE   26
137
#define SRV_I915_GEM_PWRITE         27
138
#define SRV_I915_GEM_BUSY           28
139
#define SRV_I915_GEM_SET_DOMAIN     29
3263 Serge 140
#define SRV_I915_GEM_MMAP           30
3255 Serge 141
 
3263 Serge 142
#define SRV_I915_GEM_THROTTLE       32
143
#define SRV_FBINFO                  33
144
#define SRV_I915_GEM_EXECBUFFER2    34
3290 Serge 145
#define SRV_MASK_UPDATE             35
3260 Serge 146
 
3263 Serge 147
 
148
 
2338 Serge 149
#define check_input(size) \
150
    if( unlikely((inp==NULL)||(io->inp_size != (size))) )   \
151
        break;
152
 
153
#define check_output(size) \
154
    if( unlikely((outp==NULL)||(io->out_size != (size))) )   \
155
        break;
156
 
157
int _stdcall display_handler(ioctl_t *io)
158
{
3255 Serge 159
    struct drm_file *file;
160
 
2338 Serge 161
    int    retval = -1;
162
    u32_t *inp;
163
    u32_t *outp;
164
 
165
    inp = io->input;
166
    outp = io->output;
167
 
3255 Serge 168
    file = drm_file_handlers[0];
169
 
2338 Serge 170
    switch(io->io_code)
171
    {
172
        case SRV_GETVERSION:
173
            check_output(4);
2344 Serge 174
            *outp  = DISPLAY_VERSION;
2338 Serge 175
            retval = 0;
176
            break;
177
 
178
        case SRV_ENUM_MODES:
3031 serge 179
//            dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
180
//                       inp, io->inp_size, io->out_size );
2340 Serge 181
            check_output(4);
2338 Serge 182
//            check_input(*outp * sizeof(videomode_t));
183
            if( i915_modeset)
184
                retval = get_videomodes((videomode_t*)inp, outp);
185
            break;
186
 
187
        case SRV_SET_MODE:
3031 serge 188
//            dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
189
//                       inp, io->inp_size);
2338 Serge 190
            check_input(sizeof(videomode_t));
191
            if( i915_modeset )
192
                retval = set_user_mode((videomode_t*)inp);
193
            break;
3033 serge 194
 
2351 Serge 195
        case SRV_GET_CAPS:
196
            retval = get_driver_caps((hwcaps_t*)inp);
197
            break;
198
 
2344 Serge 199
        case SRV_CREATE_SURFACE:
200
//            check_input(8);
3243 Serge 201
//            retval = create_surface(main_device, (struct io_call_10*)inp);
2338 Serge 202
            break;
203
 
2352 Serge 204
        case SRV_LOCK_SURFACE:
3243 Serge 205
//            retval = lock_surface((struct io_call_12*)inp);
2352 Serge 206
            break;
2342 Serge 207
 
3039 serge 208
        case SRV_RESIZE_SURFACE:
3243 Serge 209
//            retval = resize_surface((struct io_call_14*)inp);
3039 serge 210
            break;
211
 
3255 Serge 212
        case SRV_BLIT_BITMAP:
3243 Serge 213
//            srv_blit_bitmap( inp[0], inp[1], inp[2],
214
//                        inp[3], inp[4], inp[5], inp[6]);
3033 serge 215
 
216
//            blit_tex( inp[0], inp[1], inp[2],
2351 Serge 217
//                    inp[3], inp[4], inp[5], inp[6]);
218
 
3255 Serge 219
            break;
2338 Serge 220
 
3260 Serge 221
        case SRV_GET_PCI_INFO:
3255 Serge 222
            get_pci_info((struct pci_device *)inp);
2338 Serge 223
            retval = 0;
224
            break;
3031 serge 225
 
3255 Serge 226
        case SRV_GET_PARAM:
227
            retval = gem_getparam(main_device, inp);
228
            break;
229
 
230
        case SRV_I915_GEM_CREATE:
231
            retval = i915_gem_create_ioctl(main_device, inp, file);
232
            break;
233
 
234
        case SRV_DRM_GEM_CLOSE:
235
            retval = drm_gem_close_ioctl(main_device, inp, file);
236
            break;
237
 
238
        case SRV_I915_GEM_PIN:
239
            retval = i915_gem_pin_ioctl(main_device, inp, file);
240
            break;
3260 Serge 241
 
242
        case SRV_I915_GEM_SET_CACHEING:
243
            retval = i915_gem_set_caching_ioctl(main_device, inp, file);
244
            break;
245
 
246
        case SRV_I915_GEM_GET_APERTURE:
247
            retval = i915_gem_get_aperture_ioctl(main_device, inp, file);
248
            break;
249
 
250
        case SRV_I915_GEM_PWRITE:
251
            retval = i915_gem_pwrite_ioctl(main_device, inp, file);
252
            break;
253
 
254
        case SRV_I915_GEM_BUSY:
255
            retval = i915_gem_busy_ioctl(main_device, inp, file);
256
            break;
257
 
258
        case SRV_I915_GEM_SET_DOMAIN:
259
            retval = i915_gem_set_domain_ioctl(main_device, inp, file);
260
            break;
261
 
3263 Serge 262
        case SRV_I915_GEM_THROTTLE:
263
            retval = i915_gem_throttle_ioctl(main_device, inp, file);
264
            break;
265
 
266
        case SRV_I915_GEM_MMAP:
267
            retval = i915_gem_mmap_ioctl(main_device, inp, file);
268
            break;
269
 
270
        case SRV_FBINFO:
271
            retval = i915_fbinfo(inp);
272
            break;
273
 
274
        case SRV_I915_GEM_EXECBUFFER2:
275
            retval = i915_gem_execbuffer2(main_device, inp, file);
276
            break;
277
 
3290 Serge 278
        case SRV_MASK_UPDATE:
279
            retval = i915_mask_update(main_device, inp, file);
280
            break;
281
 
2338 Serge 282
    };
283
 
284
    return retval;
285
}
286
 
287
 
2325 Serge 288
#define PCI_CLASS_REVISION      0x08
289
#define PCI_CLASS_DISPLAY_VGA   0x0300
290
#define PCI_CLASS_BRIDGE_HOST   0x0600
2326 Serge 291
#define PCI_CLASS_BRIDGE_ISA    0x0601
2325 Serge 292
 
293
int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn)
294
{
295
    u16_t vendor, device;
296
    u32_t class;
297
    int   ret = 0;
298
 
299
    vendor   = id & 0xffff;
300
    device   = (id >> 16) & 0xffff;
301
 
302
    if(vendor == 0x8086)
303
    {
304
        class = PciRead32(busnr, devfn, PCI_CLASS_REVISION);
305
        class >>= 16;
306
 
307
        if( (class == PCI_CLASS_DISPLAY_VGA) ||
2326 Serge 308
            (class == PCI_CLASS_BRIDGE_HOST) ||
309
            (class == PCI_CLASS_BRIDGE_ISA))
2325 Serge 310
            ret = 1;
311
    }
312
    return ret;
313
};
2340 Serge 314
 
315
 
316
static char* parse_path(char *p, char *log)
317
{
318
    char  c;
319
 
320
    while( (c = *p++) == ' ');
321
        p--;
322
    while( (c = *log++ = *p++) && (c != ' '));
323
    *log = 0;
324
 
325
    return p;
326
};
327
 
328
void parse_cmdline(char *cmdline, char *log)
329
{
330
    char *p = cmdline;
331
 
332
    char c = *p++;
333
 
334
    while( c )
335
    {
336
        if( c == '-')
337
        {
338
            switch(*p++)
339
            {
340
                case 'l':
341
                    p = parse_path(p, log);
342
                    break;
343
            };
344
        };
345
        c = *p++;
346
    };
347
};
348
 
2351 Serge 349
 
2344 Serge 350
static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
2351 Serge 351
                unsigned int *ecx, unsigned int *edx)
2344 Serge 352
{
353
    /* ecx is often an input as well as an output. */
2351 Serge 354
    asm volatile("cpuid"
2344 Serge 355
        : "=a" (*eax),
356
          "=b" (*ebx),
357
          "=c" (*ecx),
358
          "=d" (*edx)
2351 Serge 359
        : "0" (*eax), "2" (*ecx)
360
        : "memory");
2344 Serge 361
}
362
 
2351 Serge 363
 
364
 
2344 Serge 365
static inline void cpuid(unsigned int op,
366
                         unsigned int *eax, unsigned int *ebx,
367
                         unsigned int *ecx, unsigned int *edx)
368
{
369
        *eax = op;
370
        *ecx = 0;
371
        __cpuid(eax, ebx, ecx, edx);
372
}
373
 
374
void cpu_detect()
375
{
376
    u32 junk, tfms, cap0, misc;
377
 
378
    cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
379
 
380
    if (cap0 & (1<<19))
381
    {
382
        x86_clflush_size = ((misc >> 8) & 0xff) * 8;
383
    }
384
}
385
 
3243 Serge 386
 
387
int get_driver_caps(hwcaps_t *caps)
388
{
389
    int ret = 0;
390
 
391
    switch(caps->idx)
392
    {
393
        case 0:
394
            caps->opt[0] = 0;
395
            caps->opt[1] = 0;
396
            break;
397
 
398
        case 1:
399
            caps->cap1.max_tex_width  = 4096;
400
            caps->cap1.max_tex_height = 4096;
401
            break;
402
        default:
403
            ret = 1;
404
    };
405
    caps->idx = 1;
406
    return ret;
407
}
408
 
3255 Serge 409
 
410
void get_pci_info(struct pci_device *dev)
411
{
412
    struct pci_dev *pdev = main_device->pdev;
413
 
414
    memset(dev, sizeof(*dev), 0);
415
 
416
    dev->domain     = 0;
417
    dev->bus        = pdev->busnr;
418
    dev->dev        = pdev->devfn >> 3;
419
    dev->func       = pdev->devfn & 7;
420
    dev->vendor_id  = pdev->vendor;
421
    dev->device_id  = pdev->device;
422
    dev->revision   = pdev->revision;
423
};