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Rev Author Line No. Line
3031 serge 1
#include 
2
#include 
3
#include 
2338 Serge 4
#include "i915_drv.h"
3031 serge 5
//#include "intel_drv.h"
2338 Serge 6
 
2325 Serge 7
#include 
8
#include 
9
#include 
10
#include 
11
#include 
12
#include 
13
 
2342 Serge 14
#include "bitmap.h"
2340 Serge 15
 
3255 Serge 16
struct pci_device {
17
    uint16_t    domain;
18
    uint8_t     bus;
19
    uint8_t     dev;
20
    uint8_t     func;
21
    uint16_t    vendor_id;
22
    uint16_t    device_id;
23
    uint16_t    subvendor_id;
24
    uint16_t    subdevice_id;
25
    uint32_t    device_class;
26
    uint8_t     revision;
27
};
28
 
3033 serge 29
extern struct drm_device *main_device;
3255 Serge 30
extern struct drm_file   *drm_file_handlers[256];
3033 serge 31
 
2344 Serge 32
void cpu_detect();
33
 
2340 Serge 34
void parse_cmdline(char *cmdline, char *log);
2338 Serge 35
int _stdcall display_handler(ioctl_t *io);
2325 Serge 36
int init_agp(void);
37
 
3120 serge 38
int srv_blit_bitmap(u32 hbitmap, int  dst_x, int dst_y,
2351 Serge 39
               int src_x, int src_y, u32 w, u32 h);
2340 Serge 40
 
2351 Serge 41
int blit_textured(u32 hbitmap, int  dst_x, int dst_y,
42
               int src_x, int src_y, u32 w, u32 h);
43
 
2361 Serge 44
int blit_tex(u32 hbitmap, int  dst_x, int dst_y,
45
             int src_x, int src_y, u32 w, u32 h);
46
 
3255 Serge 47
void get_pci_info(struct pci_device *dev);
48
int gem_getparam(struct drm_device *dev, void *data);
49
 
3277 Serge 50
int i915_mask_update(struct drm_device *dev, void *data,
51
            struct drm_file *file);
3255 Serge 52
 
3277 Serge 53
 
2325 Serge 54
static char  log[256];
55
 
2344 Serge 56
int x86_clflush_size;
57
 
2338 Serge 58
int i915_modeset = 1;
59
 
2325 Serge 60
u32_t drvEntry(int action, char *cmdline)
61
{
62
 
63
    int     err = 0;
64
 
65
    if(action != 1)
66
        return 0;
67
 
68
    if( GetService("DISPLAY") != 0 )
69
        return 0;
70
 
2340 Serge 71
    if( cmdline && *cmdline )
72
        parse_cmdline(cmdline, log);
2325 Serge 73
 
74
    if(!dbg_open(log))
75
    {
3263 Serge 76
        strcpy(log, "/tmp1/1/i915.log");
77
//        strcpy(log, "/RD/1/DRIVERS/i915.log");
2325 Serge 78
 
79
        if(!dbg_open(log))
80
        {
81
            printf("Can't open %s\nExit\n", log);
82
            return 0;
83
        };
84
    }
3243 Serge 85
    dbgprintf("i915 RC 10\n cmdline: %s\n", cmdline);
2325 Serge 86
 
2351 Serge 87
    cpu_detect();
88
    dbgprintf("\ncache line size %d\n", x86_clflush_size);
89
 
2325 Serge 90
    enum_pci_devices();
91
 
92
    err = i915_init();
93
 
2338 Serge 94
    if(err)
95
    {
96
        dbgprintf("Epic Fail :(/n");
97
    };
2325 Serge 98
 
2338 Serge 99
    err = RegService("DISPLAY", display_handler);
2325 Serge 100
 
2338 Serge 101
    if( err != 0)
102
        dbgprintf("Set DISPLAY handler\n");
103
 
2325 Serge 104
    return err;
105
};
106
 
2344 Serge 107
#define CURRENT_API     0x0200      /*      2.00     */
108
#define COMPATIBLE_API  0x0100      /*      1.00     */
2338 Serge 109
 
2344 Serge 110
#define API_VERSION     (COMPATIBLE_API << 16) | CURRENT_API
2351 Serge 111
#define DISPLAY_VERSION  API_VERSION
2338 Serge 112
 
113
 
2352 Serge 114
#define SRV_GETVERSION          0
115
#define SRV_ENUM_MODES          1
116
#define SRV_SET_MODE            2
117
#define SRV_GET_CAPS            3
2342 Serge 118
 
2352 Serge 119
#define SRV_CREATE_SURFACE      10
120
#define SRV_DESTROY_SURFACE     11
121
#define SRV_LOCK_SURFACE        12
122
#define SRV_UNLOCK_SURFACE      13
3039 serge 123
#define SRV_RESIZE_SURFACE      14
3120 serge 124
#define SRV_BLIT_BITMAP         15
125
#define SRV_BLIT_TEXTURE        16
126
#define SRV_BLIT_VIDEO          17
2344 Serge 127
 
3290 Serge 128
 
3260 Serge 129
#define SRV_GET_PCI_INFO            20
3255 Serge 130
#define SRV_GET_PARAM           21
131
#define SRV_I915_GEM_CREATE     22
132
#define SRV_DRM_GEM_CLOSE       23
133
#define SRV_I915_GEM_PIN        24
3260 Serge 134
#define SRV_I915_GEM_SET_CACHEING   25
135
#define SRV_I915_GEM_GET_APERTURE   26
136
#define SRV_I915_GEM_PWRITE         27
137
#define SRV_I915_GEM_BUSY           28
138
#define SRV_I915_GEM_SET_DOMAIN     29
3263 Serge 139
#define SRV_I915_GEM_MMAP           30
3255 Serge 140
 
3263 Serge 141
#define SRV_I915_GEM_THROTTLE       32
142
#define SRV_FBINFO                  33
143
#define SRV_I915_GEM_EXECBUFFER2    34
3290 Serge 144
#define SRV_MASK_UPDATE             35
3260 Serge 145
 
3263 Serge 146
 
147
 
2338 Serge 148
#define check_input(size) \
149
    if( unlikely((inp==NULL)||(io->inp_size != (size))) )   \
150
        break;
151
 
152
#define check_output(size) \
153
    if( unlikely((outp==NULL)||(io->out_size != (size))) )   \
154
        break;
155
 
156
int _stdcall display_handler(ioctl_t *io)
157
{
3255 Serge 158
    struct drm_file *file;
159
 
2338 Serge 160
    int    retval = -1;
161
    u32_t *inp;
162
    u32_t *outp;
163
 
164
    inp = io->input;
165
    outp = io->output;
166
 
3255 Serge 167
    file = drm_file_handlers[0];
168
 
2338 Serge 169
    switch(io->io_code)
170
    {
171
        case SRV_GETVERSION:
172
            check_output(4);
2344 Serge 173
            *outp  = DISPLAY_VERSION;
2338 Serge 174
            retval = 0;
175
            break;
176
 
177
        case SRV_ENUM_MODES:
3031 serge 178
//            dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n",
179
//                       inp, io->inp_size, io->out_size );
2340 Serge 180
            check_output(4);
2338 Serge 181
//            check_input(*outp * sizeof(videomode_t));
182
            if( i915_modeset)
183
                retval = get_videomodes((videomode_t*)inp, outp);
184
            break;
185
 
186
        case SRV_SET_MODE:
3031 serge 187
//            dbgprintf("SRV_SET_MODE inp %x inp_size %x\n",
188
//                       inp, io->inp_size);
2338 Serge 189
            check_input(sizeof(videomode_t));
190
            if( i915_modeset )
191
                retval = set_user_mode((videomode_t*)inp);
192
            break;
3033 serge 193
 
2351 Serge 194
        case SRV_GET_CAPS:
195
            retval = get_driver_caps((hwcaps_t*)inp);
196
            break;
197
 
2344 Serge 198
        case SRV_CREATE_SURFACE:
199
//            check_input(8);
3243 Serge 200
//            retval = create_surface(main_device, (struct io_call_10*)inp);
2338 Serge 201
            break;
202
 
2352 Serge 203
        case SRV_LOCK_SURFACE:
3243 Serge 204
//            retval = lock_surface((struct io_call_12*)inp);
2352 Serge 205
            break;
2342 Serge 206
 
3039 serge 207
        case SRV_RESIZE_SURFACE:
3243 Serge 208
//            retval = resize_surface((struct io_call_14*)inp);
3039 serge 209
            break;
210
 
3255 Serge 211
        case SRV_BLIT_BITMAP:
3243 Serge 212
//            srv_blit_bitmap( inp[0], inp[1], inp[2],
213
//                        inp[3], inp[4], inp[5], inp[6]);
3033 serge 214
 
215
//            blit_tex( inp[0], inp[1], inp[2],
2351 Serge 216
//                    inp[3], inp[4], inp[5], inp[6]);
217
 
3255 Serge 218
            break;
2338 Serge 219
 
3260 Serge 220
        case SRV_GET_PCI_INFO:
3255 Serge 221
            get_pci_info((struct pci_device *)inp);
2338 Serge 222
            retval = 0;
223
            break;
3031 serge 224
 
3255 Serge 225
        case SRV_GET_PARAM:
226
            retval = gem_getparam(main_device, inp);
227
            break;
228
 
229
        case SRV_I915_GEM_CREATE:
230
            retval = i915_gem_create_ioctl(main_device, inp, file);
231
            break;
232
 
233
        case SRV_DRM_GEM_CLOSE:
234
            retval = drm_gem_close_ioctl(main_device, inp, file);
235
            break;
236
 
237
        case SRV_I915_GEM_PIN:
238
            retval = i915_gem_pin_ioctl(main_device, inp, file);
239
            break;
3260 Serge 240
 
241
        case SRV_I915_GEM_SET_CACHEING:
242
            retval = i915_gem_set_caching_ioctl(main_device, inp, file);
243
            break;
244
 
245
        case SRV_I915_GEM_GET_APERTURE:
246
            retval = i915_gem_get_aperture_ioctl(main_device, inp, file);
247
            break;
248
 
249
        case SRV_I915_GEM_PWRITE:
250
            retval = i915_gem_pwrite_ioctl(main_device, inp, file);
251
            break;
252
 
253
        case SRV_I915_GEM_BUSY:
254
            retval = i915_gem_busy_ioctl(main_device, inp, file);
255
            break;
256
 
257
        case SRV_I915_GEM_SET_DOMAIN:
258
            retval = i915_gem_set_domain_ioctl(main_device, inp, file);
259
            break;
260
 
3263 Serge 261
        case SRV_I915_GEM_THROTTLE:
262
            retval = i915_gem_throttle_ioctl(main_device, inp, file);
263
            break;
264
 
265
        case SRV_I915_GEM_MMAP:
266
            retval = i915_gem_mmap_ioctl(main_device, inp, file);
267
            break;
268
 
269
        case SRV_FBINFO:
270
            retval = i915_fbinfo(inp);
271
            break;
272
 
273
        case SRV_I915_GEM_EXECBUFFER2:
274
            retval = i915_gem_execbuffer2(main_device, inp, file);
275
            break;
276
 
3290 Serge 277
        case SRV_MASK_UPDATE:
278
            retval = i915_mask_update(main_device, inp, file);
279
            break;
280
 
2338 Serge 281
    };
282
 
283
    return retval;
284
}
285
 
286
 
2325 Serge 287
#define PCI_CLASS_REVISION      0x08
288
#define PCI_CLASS_DISPLAY_VGA   0x0300
289
#define PCI_CLASS_BRIDGE_HOST   0x0600
2326 Serge 290
#define PCI_CLASS_BRIDGE_ISA    0x0601
2325 Serge 291
 
292
int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn)
293
{
294
    u16_t vendor, device;
295
    u32_t class;
296
    int   ret = 0;
297
 
298
    vendor   = id & 0xffff;
299
    device   = (id >> 16) & 0xffff;
300
 
301
    if(vendor == 0x8086)
302
    {
303
        class = PciRead32(busnr, devfn, PCI_CLASS_REVISION);
304
        class >>= 16;
305
 
306
        if( (class == PCI_CLASS_DISPLAY_VGA) ||
2326 Serge 307
            (class == PCI_CLASS_BRIDGE_HOST) ||
308
            (class == PCI_CLASS_BRIDGE_ISA))
2325 Serge 309
            ret = 1;
310
    }
311
    return ret;
312
};
2340 Serge 313
 
314
 
315
static char* parse_path(char *p, char *log)
316
{
317
    char  c;
318
 
319
    while( (c = *p++) == ' ');
320
        p--;
321
    while( (c = *log++ = *p++) && (c != ' '));
322
    *log = 0;
323
 
324
    return p;
325
};
326
 
327
void parse_cmdline(char *cmdline, char *log)
328
{
329
    char *p = cmdline;
330
 
331
    char c = *p++;
332
 
333
    while( c )
334
    {
335
        if( c == '-')
336
        {
337
            switch(*p++)
338
            {
339
                case 'l':
340
                    p = parse_path(p, log);
341
                    break;
342
            };
343
        };
344
        c = *p++;
345
    };
346
};
347
 
2351 Serge 348
 
2344 Serge 349
static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
2351 Serge 350
                unsigned int *ecx, unsigned int *edx)
2344 Serge 351
{
352
    /* ecx is often an input as well as an output. */
2351 Serge 353
    asm volatile("cpuid"
2344 Serge 354
        : "=a" (*eax),
355
          "=b" (*ebx),
356
          "=c" (*ecx),
357
          "=d" (*edx)
2351 Serge 358
        : "0" (*eax), "2" (*ecx)
359
        : "memory");
2344 Serge 360
}
361
 
2351 Serge 362
 
363
 
2344 Serge 364
static inline void cpuid(unsigned int op,
365
                         unsigned int *eax, unsigned int *ebx,
366
                         unsigned int *ecx, unsigned int *edx)
367
{
368
        *eax = op;
369
        *ecx = 0;
370
        __cpuid(eax, ebx, ecx, edx);
371
}
372
 
373
void cpu_detect()
374
{
375
    u32 junk, tfms, cap0, misc;
376
 
377
    cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
378
 
379
    if (cap0 & (1<<19))
380
    {
381
        x86_clflush_size = ((misc >> 8) & 0xff) * 8;
382
    }
383
}
384
 
3243 Serge 385
 
386
int get_driver_caps(hwcaps_t *caps)
387
{
388
    int ret = 0;
389
 
390
    switch(caps->idx)
391
    {
392
        case 0:
393
            caps->opt[0] = 0;
394
            caps->opt[1] = 0;
395
            break;
396
 
397
        case 1:
398
            caps->cap1.max_tex_width  = 4096;
399
            caps->cap1.max_tex_height = 4096;
400
            break;
401
        default:
402
            ret = 1;
403
    };
404
    caps->idx = 1;
405
    return ret;
406
}
407
 
3255 Serge 408
 
409
void get_pci_info(struct pci_device *dev)
410
{
411
    struct pci_dev *pdev = main_device->pdev;
412
 
413
    memset(dev, sizeof(*dev), 0);
414
 
415
    dev->domain     = 0;
416
    dev->bus        = pdev->busnr;
417
    dev->dev        = pdev->devfn >> 3;
418
    dev->func       = pdev->devfn & 7;
419
    dev->vendor_id  = pdev->vendor;
420
    dev->device_id  = pdev->device;
421
    dev->revision   = pdev->revision;
422
};