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Rev | Author | Line No. | Line |
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2340 | Serge | 1 | |
2 | |||
3 | |||
2338 | Serge | 4 | #include "drm.h" |
5 | #include "i915_drm.h" |
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6 | #include "i915_drv.h" |
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7 | #include "intel_drv.h" |
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8 | |||
9 | |||
10 | #include |
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11 | #include |
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12 | #include |
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13 | #include |
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14 | |||
15 | |||
16 | |||
17 | |||
2340 | Serge | 18 | |
2338 | Serge | 19 | |
2351 | Serge | 20 | |
2338 | Serge | 21 | |
2351 | Serge | 22 | |
2338 | Serge | 23 | { |
24 | kobj_t header; |
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25 | |||
26 | |||
27 | uint32_t hot_x; |
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28 | uint32_t hot_y; |
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29 | |||
30 | |||
31 | struct drm_i915_gem_object *cobj; |
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32 | }cursor_t; |
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33 | |||
34 | |||
35 | #define CURSOR_HEIGHT 64 |
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36 | |||
37 | |||
38 | |||
39 | { |
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40 | int x; |
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41 | int y; |
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42 | int width; |
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43 | int height; |
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44 | int bpp; |
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45 | int vrefresh; |
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46 | int pitch; |
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47 | int lfb; |
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48 | |||
49 | |||
50 | struct drm_device *ddev; |
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51 | struct drm_connector *connector; |
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52 | struct drm_crtc *crtc; |
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53 | |||
54 | |||
55 | |||
56 | |||
57 | int (*init_cursor)(cursor_t*); |
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58 | cursor_t* (__stdcall *select_cursor)(cursor_t*); |
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59 | void (*show_cursor)(int show); |
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60 | void (__stdcall *move_cursor)(cursor_t *cursor, int x, int y); |
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61 | void (__stdcall *restore_cursor)(int x, int y); |
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62 | void (*disable_mouse)(void); |
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63 | u32 mask_seqno; |
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2361 | Serge | 64 | u32 check_mouse; |
3031 | serge | 65 | u32 check_m_pixel; |
66 | |||
67 | |||
2338 | Serge | 68 | |
69 | |||
70 | |||
71 | |||
72 | |||
2340 | Serge | 73 | u32_t cmd_offset; |
74 | |||
75 | |||
2351 | Serge | 76 | int sna_init(); |
77 | |||
78 | |||
2338 | Serge | 79 | static cursor_t* __stdcall select_cursor_kms(cursor_t *cursor); |
80 | static void __stdcall move_cursor_kms(cursor_t *cursor, int x, int y); |
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81 | |||
82 | |||
83 | {}; |
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84 | |||
85 | |||
86 | {}; |
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87 | |||
88 | |||
3031 | serge | 89 | { |
90 | static char name[4]; |
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91 | |||
92 | |||
93 | name[1] = ((x[0] & 0x03) << 3) + ((x[1] & 0xE0) >> 5) + '@'; |
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94 | name[2] = (x[1] & 0x1F) + '@'; |
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95 | name[3] = 0; |
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96 | |||
97 | |||
98 | } |
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99 | |||
100 | |||
101 | videomode_t *reqmode, bool strict) |
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102 | { |
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103 | drm_i915_private_t *dev_priv = dev->dev_private; |
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104 | struct drm_fb_helper *fb_helper = &dev_priv->fbdev->helper; |
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105 | |||
106 | |||
107 | struct drm_display_mode *mode = NULL, *tmpmode; |
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108 | struct drm_framebuffer *fb = NULL; |
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109 | struct drm_crtc *crtc; |
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110 | struct drm_encoder *encoder; |
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111 | struct drm_mode_set set; |
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112 | char *con_name; |
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113 | char *enc_name; |
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114 | unsigned hdisplay, vdisplay; |
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115 | int ret; |
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116 | |||
117 | |||
118 | |||
119 | |||
120 | { |
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121 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
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122 | (drm_mode_height(tmpmode) == reqmode->height) && |
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123 | (drm_mode_vrefresh(tmpmode) == reqmode->freq) ) |
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124 | { |
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125 | mode = tmpmode; |
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126 | goto do_set; |
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127 | } |
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128 | }; |
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129 | |||
130 | |||
131 | { |
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132 | list_for_each_entry(tmpmode, &connector->modes, head) |
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133 | { |
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134 | if( (drm_mode_width(tmpmode) == reqmode->width) && |
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135 | (drm_mode_height(tmpmode) == reqmode->height) ) |
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136 | { |
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137 | mode = tmpmode; |
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138 | goto do_set; |
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139 | } |
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140 | }; |
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141 | }; |
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142 | |||
143 | |||
144 | |||
145 | |||
146 | |||
147 | |||
148 | |||
149 | |||
150 | |||
151 | crtc = encoder->crtc; |
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152 | |||
153 | |||
154 | enc_name = drm_get_encoder_name(encoder); |
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155 | |||
156 | |||
157 | reqmode->width, reqmode->height, crtc->base.id, |
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158 | con_name, enc_name); |
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159 | |||
160 | |||
161 | |||
162 | |||
163 | vdisplay = mode->vdisplay; |
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164 | |||
165 | |||
166 | swap(hdisplay, vdisplay); |
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167 | |||
168 | |||
169 | |||
170 | |||
171 | fb->height = reqmode->height; |
||
172 | fb->pitches[0] = ALIGN(reqmode->width * 4, 64); |
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173 | fb->pitches[1] = ALIGN(reqmode->width * 4, 64); |
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174 | fb->pitches[2] = ALIGN(reqmode->width * 4, 64); |
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175 | fb->pitches[3] = ALIGN(reqmode->width * 4, 64); |
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176 | |||
177 | |||
178 | fb->depth = 24; |
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179 | |||
180 | |||
181 | crtc->enabled = true; |
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182 | os_display->crtc = crtc; |
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183 | |||
184 | |||
185 | set.x = 0; |
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186 | set.y = 0; |
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187 | set.mode = mode; |
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188 | set.connectors = &connector; |
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189 | set.num_connectors = 1; |
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190 | set.fb = fb; |
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191 | ret = crtc->funcs->set_config(&set); |
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192 | mutex_unlock(&dev->mode_config.mutex); |
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193 | |||
194 | |||
195 | { |
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196 | os_display->width = fb->width; |
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197 | os_display->height = fb->height; |
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198 | os_display->pitch = fb->pitches[0]; |
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199 | os_display->vrefresh = drm_mode_vrefresh(mode); |
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200 | |||
201 | |||
202 | |||
203 | |||
204 | fb->width, fb->height, fb->pitches[0]); |
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205 | } |
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206 | else |
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207 | DRM_ERROR("failed to set mode %d_%d on crtc %p\n", |
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208 | fb->width, fb->height, crtc); |
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209 | |||
210 | |||
211 | |||
212 | } |
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213 | |||
214 | |||
2338 | Serge | 215 | { |
216 | struct drm_display_mode *mode; |
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217 | int count = 0; |
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218 | |||
219 | |||
220 | { |
||
221 | count++; |
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222 | }; |
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223 | return count; |
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224 | }; |
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225 | |||
226 | |||
3031 | serge | 227 | { |
228 | struct drm_connector *connector; |
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229 | struct drm_connector_helper_funcs *connector_funcs; |
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230 | |||
231 | |||
232 | |||
233 | |||
234 | { |
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235 | struct drm_encoder *encoder; |
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236 | struct drm_crtc *crtc; |
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237 | |||
238 | |||
239 | continue; |
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240 | |||
241 | |||
242 | encoder = connector_funcs->best_encoder(connector); |
||
243 | if( encoder == NULL) |
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244 | continue; |
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245 | |||
246 | |||
247 | |||
248 | |||
249 | |||
250 | |||
251 | connector, connector->base.id, |
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252 | connector->status, connector->encoder, |
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253 | crtc); |
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254 | |||
255 | |||
256 | // continue; |
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257 | |||
258 | |||
259 | |||
260 | |||
261 | }; |
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262 | |||
263 | |||
264 | }; |
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265 | |||
266 | |||
267 | |||
2338 | Serge | 268 | { |
269 | struct drm_connector *connector; |
||
270 | struct drm_connector_helper_funcs *connector_funcs; |
||
271 | struct drm_encoder *encoder; |
||
272 | struct drm_crtc *crtc = NULL; |
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273 | struct drm_framebuffer *fb; |
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274 | |||
275 | |||
276 | u32_t ifl; |
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277 | |||
278 | |||
3031 | serge | 279 | |
2338 | Serge | 280 | |
281 | { |
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282 | if( connector->status != connector_status_connected) |
||
283 | continue; |
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284 | |||
285 | |||
286 | encoder = connector_funcs->best_encoder(connector); |
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287 | if( encoder == NULL) |
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288 | { |
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289 | dbgprintf("CONNECTOR %x ID: %d no active encoders\n", |
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290 | connector, connector->base.id); |
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291 | continue; |
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292 | } |
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293 | connector->encoder = encoder; |
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294 | crtc = encoder->crtc; |
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3031 | serge | 295 | |
2338 | Serge | 296 | |
3031 | serge | 297 | connector, connector->base.id, |
2338 | Serge | 298 | connector->status, connector->encoder, |
299 | crtc, crtc->base.id ); |
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3031 | serge | 300 | |
2338 | Serge | 301 | |
302 | }; |
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303 | |||
304 | |||
305 | { |
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306 | dbgprintf("No active connectors!\n"); |
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307 | return -1; |
||
308 | }; |
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309 | |||
310 | |||
311 | { |
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312 | struct drm_crtc *tmp_crtc; |
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313 | int crtc_mask = 1; |
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314 | |||
315 | |||
316 | { |
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317 | if (encoder->possible_crtcs & crtc_mask) |
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318 | { |
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319 | crtc = tmp_crtc; |
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320 | encoder->crtc = crtc; |
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321 | break; |
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322 | }; |
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323 | crtc_mask <<= 1; |
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324 | }; |
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325 | }; |
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326 | |||
327 | |||
328 | { |
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329 | dbgprintf("No CRTC for encoder %d\n", encoder->base.id); |
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330 | return -1; |
||
331 | }; |
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332 | |||
333 | |||
334 | |||
335 | |||
336 | |||
337 | os_display->ddev = dev; |
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338 | os_display->connector = connector; |
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339 | os_display->crtc = crtc; |
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340 | |||
341 | |||
342 | |||
343 | |||
344 | |||
345 | { |
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346 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
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347 | |||
348 | |||
349 | { |
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350 | init_cursor(cursor); |
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351 | }; |
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352 | |||
353 | |||
354 | os_display->init_cursor = init_cursor; |
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355 | os_display->select_cursor = select_cursor_kms; |
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356 | os_display->show_cursor = NULL; |
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357 | os_display->move_cursor = move_cursor_kms; |
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358 | os_display->restore_cursor = restore_cursor; |
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359 | os_display->disable_mouse = disable_mouse; |
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360 | |||
361 | |||
362 | intel_crtc->cursor_y = os_display->height/2; |
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363 | |||
364 | |||
365 | }; |
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366 | safe_sti(ifl); |
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367 | |||
368 | |||
2340 | Serge | 369 | #define BLT_WRITE_ALPHA (1<<21) |
370 | #define BLT_WRITE_RGB (1<<20) |
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371 | |||
2338 | Serge | 372 | |
3031 | serge | 373 | |
374 | |||
2342 | Serge | 375 | { |
376 | |||
377 | |||
2340 | Serge | 378 | struct drm_i915_gem_object *obj; |
379 | struct intel_ring_buffer *ring; |
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380 | |||
381 | |||
382 | i915_gem_object_pin(obj, 4096, true, true); |
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3031 | serge | 383 | |
2340 | Serge | 384 | |
3031 | serge | 385 | cmd_offset = obj->gtt_offset; |
2340 | Serge | 386 | }; |
2342 | Serge | 387 | #endif |
388 | |||
2340 | Serge | 389 | |
2351 | Serge | 390 | |
391 | |||
2342 | Serge | 392 | |
2340 | Serge | 393 | |
2342 | Serge | 394 | if( !err ) |
395 | { |
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396 | printf("Initialize bitmap manager\n"); |
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397 | }; |
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2340 | Serge | 398 | |
399 | |||
2351 | Serge | 400 | #endif |
3031 | serge | 401 | |
2351 | Serge | 402 | |
3031 | serge | 403 | |
2338 | Serge | 404 | |
405 | }; |
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406 | |||
407 | |||
408 | |||
409 | { |
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410 | int err = -1; |
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411 | |||
412 | |||
3031 | serge | 413 | |
2338 | Serge | 414 | |
3031 | serge | 415 | |
2338 | Serge | 416 | |
417 | { |
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418 | *count = os_display->supported_modes; |
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419 | err = 0; |
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420 | } |
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421 | else if( mode != NULL ) |
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422 | { |
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423 | struct drm_display_mode *drmmode; |
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424 | int i = 0; |
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425 | |||
426 | |||
427 | *count = os_display->supported_modes; |
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428 | |||
429 | |||
430 | { |
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431 | if( i < *count) |
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432 | { |
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433 | mode->width = drm_mode_width(drmmode); |
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434 | mode->height = drm_mode_height(drmmode); |
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435 | mode->bpp = 32; |
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436 | mode->freq = drm_mode_vrefresh(drmmode); |
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437 | i++; |
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438 | mode++; |
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439 | } |
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440 | else break; |
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441 | }; |
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442 | *count = i; |
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443 | err = 0; |
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444 | }; |
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445 | // LEAVE(); |
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3031 | serge | 446 | return err; |
2338 | Serge | 447 | }; |
448 | |||
449 | |||
450 | { |
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451 | int err = -1; |
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452 | |||
453 | |||
3031 | serge | 454 | |
2338 | Serge | 455 | |
3031 | serge | 456 | // mode->width, mode->height, mode->freq); |
457 | |||
2338 | Serge | 458 | |
459 | (mode->height != 0) && |
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460 | (mode->freq != 0 ) && |
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461 | ( (mode->width != os_display->width) || |
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462 | (mode->height != os_display->height) || |
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463 | (mode->freq != os_display->vrefresh) ) ) |
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464 | { |
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465 | if( set_mode(os_display->ddev, os_display->connector, mode, true) ) |
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466 | err = 0; |
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467 | }; |
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468 | |||
469 | |||
3031 | serge | 470 | return err; |
2338 | Serge | 471 | }; |
472 | |||
473 | |||
474 | { |
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475 | /* FIXME synchronization */ |
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2342 | Serge | 476 | |
477 | |||
2338 | Serge | 478 | // radeon_bo_unpin(cursor->robj); |
479 | // KernelFree(cursor->data); |
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480 | __DestroyObject(cursor); |
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481 | }; |
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482 | |||
483 | |||
484 | { |
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485 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
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486 | struct drm_i915_gem_object *obj; |
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487 | uint32_t *bits; |
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488 | uint32_t *src; |
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489 | |||
490 | |||
491 | int ret; |
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492 | |||
493 | |||
3031 | serge | 494 | |
2338 | Serge | 495 | |
496 | { |
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497 | bits = (uint32_t*)KernelAlloc(CURSOR_WIDTH*CURSOR_HEIGHT*4); |
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498 | if (unlikely(bits == NULL)) |
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499 | return ENOMEM; |
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500 | cursor->cobj = (struct drm_i915_gem_object *)GetPgAddr(bits); |
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501 | } |
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502 | else |
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503 | { |
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504 | obj = i915_gem_alloc_object(os_display->ddev, CURSOR_WIDTH*CURSOR_HEIGHT*4); |
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505 | if (unlikely(obj == NULL)) |
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506 | return -ENOMEM; |
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507 | |||
508 | |||
3031 | serge | 509 | if (ret) { |
2338 | Serge | 510 | drm_gem_object_unreference(&obj->base); |
2344 | Serge | 511 | return ret; |
2338 | Serge | 512 | } |
513 | |||
514 | |||
515 | * GTT space is continuous. I guarantee it. */ |
||
516 | |||
517 | |||
3031 | serge | 518 | CURSOR_WIDTH*CURSOR_HEIGHT*4, PG_SW); |
2338 | Serge | 519 | |
520 | |||
521 | { |
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522 | i915_gem_object_unpin(obj); |
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2344 | Serge | 523 | drm_gem_object_unreference(&obj->base); |
524 | return -ENOMEM; |
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2338 | Serge | 525 | }; |
526 | cursor->cobj = obj; |
||
527 | }; |
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528 | |||
529 | |||
530 | |||
531 | |||
532 | { |
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533 | for(j = 0; j < 32; j++) |
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534 | *bits++ = *src++; |
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535 | for(j = 32; j < CURSOR_WIDTH; j++) |
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536 | *bits++ = 0; |
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537 | } |
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538 | for(i = 0; i < CURSOR_WIDTH*(CURSOR_HEIGHT-32); i++) |
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539 | *bits++ = 0; |
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540 | |||
541 | |||
542 | |||
543 | |||
2340 | Serge | 544 | |
2338 | Serge | 545 | |
546 | |||
547 | |||
548 | // LEAVE(); |
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3031 | serge | 549 | |
2338 | Serge | 550 | |
551 | } |
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552 | |||
553 | |||
554 | |||
555 | { |
||
556 | struct drm_device *dev = crtc->dev; |
||
557 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
558 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
||
559 | int pipe = intel_crtc->pipe; |
||
560 | bool visible = base != 0; |
||
561 | |||
562 | |||
563 | uint32_t cntl = I915_READ(CURCNTR(pipe)); |
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564 | if (base) { |
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565 | cntl &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT); |
||
566 | cntl |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE; |
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567 | cntl |= pipe << 28; /* Connect to correct pipe */ |
||
568 | } else { |
||
569 | cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE); |
||
570 | cntl |= CURSOR_MODE_DISABLE; |
||
571 | } |
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572 | I915_WRITE(CURCNTR(pipe), cntl); |
||
573 | |||
574 | |||
575 | } |
||
576 | /* and commit changes on next vblank */ |
||
577 | I915_WRITE(CURBASE(pipe), base); |
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578 | } |
||
579 | |||
580 | |||
581 | { |
||
582 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
583 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
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584 | u32 base, pos; |
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585 | bool visible; |
||
586 | |||
587 | |||
588 | |||
589 | |||
590 | intel_crtc->cursor_y = y; |
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591 | |||
592 | |||
593 | y = y - cursor->hot_y; |
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594 | |||
595 | |||
596 | |||
597 | |||
598 | |||
599 | if (x >= os_display->width) |
||
600 | base = 0; |
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601 | |||
602 | |||
603 | base = 0; |
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604 | |||
605 | |||
606 | { |
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607 | if (x + intel_crtc->cursor_width < 0) |
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608 | base = 0; |
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609 | |||
610 | |||
611 | x = -x; |
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612 | } |
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613 | pos |= x << CURSOR_X_SHIFT; |
||
614 | |||
615 | |||
616 | { |
||
617 | if (y + intel_crtc->cursor_height < 0) |
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618 | base = 0; |
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619 | |||
620 | |||
621 | y = -y; |
||
622 | } |
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623 | pos |= y << CURSOR_Y_SHIFT; |
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624 | |||
625 | |||
626 | if (!visible && !intel_crtc->cursor_visible) |
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627 | return; |
||
628 | |||
629 | |||
630 | // if (IS_845G(dev) || IS_I865G(dev)) |
||
631 | // i845_update_cursor(crtc, base); |
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632 | // else |
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633 | i9xx_update_cursor(os_display->crtc, base); |
||
634 | |||
635 | |||
636 | |||
637 | |||
638 | |||
639 | { |
||
640 | struct drm_i915_private *dev_priv = os_display->ddev->dev_private; |
||
641 | struct intel_crtc *intel_crtc = to_intel_crtc(os_display->crtc); |
||
642 | cursor_t *old; |
||
643 | |||
644 | |||
645 | os_display->cursor = cursor; |
||
646 | |||
647 | |||
648 | intel_crtc->cursor_addr = cursor->cobj->gtt_offset; |
||
649 | else |
||
650 | intel_crtc->cursor_addr = (addr_t)cursor->cobj; |
||
2352 | Serge | 651 | |
2338 | Serge | 652 | |
653 | intel_crtc->cursor_height = 32; |
||
654 | |||
655 | |||
656 | return old; |
||
657 | }; |
||
658 | |||
659 | |||
3031 | serge | 660 | |
2340 | Serge | 661 | |
662 | |||
663 | |||
2342 | Serge | 664 | |
665 | { |
||
2338 | Serge | 666 | int left; |
2342 | Serge | 667 | int top; |
668 | int right; |
||
669 | int bottom; |
||
670 | }rect_t; |
||
671 | |||
2338 | Serge | 672 | |
2342 | Serge | 673 | |
674 | |||
675 | |||
676 | |||
677 | |||
678 | |||
679 | |||
680 | { |
||
681 | u32_t addr; |
||
682 | |||
683 | |||
684 | addr+= sizeof(display_t); /* shoot me */ |
||
685 | return *(u32_t*)addr; |
||
686 | } |
||
687 | |||
688 | |||
689 | #define ROP_COPY_SRC 0xCC |
||
690 | #define FORMAT8888 3 |
||
691 | |||
692 | |||
693 | |||
694 | |||
695 | |||
696 | int src_x, int src_y, u32 w, u32 h) |
||
697 | { |
||
698 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
2340 | Serge | 699 | struct intel_ring_buffer *ring; |
700 | |||
2338 | Serge | 701 | |
2342 | Serge | 702 | rect_t winrc; |
703 | clip_t dst_clip; |
||
704 | clip_t src_clip; |
||
705 | u32_t width; |
||
706 | u32_t height; |
||
707 | |||
2338 | Serge | 708 | |
2342 | Serge | 709 | u32_t offset; |
710 | u8 slot; |
||
711 | int n=0; |
||
2340 | Serge | 712 | |
2338 | Serge | 713 | |
2342 | Serge | 714 | return -1; |
715 | |||
2338 | Serge | 716 | |
2342 | Serge | 717 | |
2338 | Serge | 718 | |
2342 | Serge | 719 | return -1; |
720 | |||
2338 | Serge | 721 | |
722 | |||
2342 | Serge | 723 | |
2338 | Serge | 724 | |
2342 | Serge | 725 | dst_clip.ymin = 0; |
726 | dst_clip.xmax = winrc.right-winrc.left-1; |
||
727 | dst_clip.ymax = winrc.bottom -winrc.top -1; |
||
728 | |||
2338 | Serge | 729 | |
2342 | Serge | 730 | src_clip.ymin = 0; |
731 | src_clip.xmax = bitmap->width - 1; |
||
732 | src_clip.ymax = bitmap->height - 1; |
||
733 | |||
2338 | Serge | 734 | |
2342 | Serge | 735 | height = h; |
736 | |||
2338 | Serge | 737 | |
2342 | Serge | 738 | &src_clip, &src_x, &src_y, |
739 | &width, &height) ) |
||
740 | return 0; |
||
741 | |||
2340 | Serge | 742 | |
2342 | Serge | 743 | dst_y+= winrc.top; |
744 | |||
2340 | Serge | 745 | |
2342 | Serge | 746 | |
2340 | Serge | 747 | |
2342 | Serge | 748 | |
2340 | Serge | 749 | |
2342 | Serge | 750 | #if 0 |
751 | static v4si write_mask = {0xFF000000, 0xFF000000, |
||
752 | 0xFF000000, 0xFF000000}; |
||
753 | |||
2340 | Serge | 754 | |
2342 | Serge | 755 | u8* dst_offset; |
756 | |||
2340 | Serge | 757 | |
2342 | Serge | 758 | src_offset += (u32)bitmap->uaddr; |
759 | |||
2340 | Serge | 760 | |
2342 | Serge | 761 | dst_offset+= get_display_map(); |
762 | |||
2340 | Serge | 763 | |
2342 | Serge | 764 | |
2340 | Serge | 765 | |
2342 | Serge | 766 | "movdqa %[write_mask], %%xmm7 \n" |
767 | "movd %[slot_mask], %%xmm6 \n" |
||
768 | "punpckldq %%xmm6, %%xmm6 \n" |
||
769 | "punpcklqdq %%xmm6, %%xmm6 \n" |
||
770 | :: [write_mask] "m" (write_mask), |
||
771 | [slot_mask] "g" (slot_mask) |
||
772 | :"xmm7", "xmm6"); |
||
773 | |||
2340 | Serge | 774 | |
2342 | Serge | 775 | { |
776 | u32_t tmp_w = width; |
||
777 | |||
2340 | Serge | 778 | |
2342 | Serge | 779 | u8* tmp_dst = dst_offset; |
780 | |||
2340 | Serge | 781 | |
2342 | Serge | 782 | dst_offset+= os_display->width; |
783 | |||
2340 | Serge | 784 | |
2342 | Serge | 785 | { |
786 | __asm__ __volatile__ ( |
||
787 | "movq (%0), %%xmm0 \n" |
||
788 | "punpcklbw %%xmm0, %%xmm0 \n" |
||
789 | "movdqa %%xmm0, %%xmm1 \n" |
||
790 | "punpcklwd %%xmm0, %%xmm0 \n" |
||
791 | "punpckhwd %%xmm1, %%xmm1 \n" |
||
792 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
793 | "pcmpeqb %%xmm6, %%xmm1 \n" |
||
794 | "maskmovdqu %%xmm7, %%xmm0 \n" |
||
795 | "addl $16, %%edi \n" |
||
796 | "maskmovdqu %%xmm7, %%xmm1 \n" |
||
797 | :: "r" (tmp_dst), "D" (tmp_src) |
||
798 | :"xmm0", "xmm1"); |
||
799 | __asm__ __volatile__ ("":::"edi"); |
||
800 | tmp_w -= 8; |
||
801 | tmp_src += 32; |
||
802 | tmp_dst += 8; |
||
803 | }; |
||
804 | |||
2340 | Serge | 805 | |
2342 | Serge | 806 | { |
807 | __asm__ __volatile__ ( |
||
808 | "movd (%0), %%xmm0 \n" |
||
809 | "punpcklbw %%xmm0, %%xmm0 \n" |
||
810 | "punpcklwd %%xmm0, %%xmm0 \n" |
||
811 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
812 | "maskmovdqu %%xmm7, %%xmm0 \n" |
||
813 | :: "r" (tmp_dst), "D" (tmp_src) |
||
814 | :"xmm0"); |
||
815 | tmp_w -= 4; |
||
816 | tmp_src += 16; |
||
817 | tmp_dst += 4; |
||
818 | }; |
||
819 | |||
2340 | Serge | 820 | |
2342 | Serge | 821 | { |
822 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
||
823 | tmp_src+=4; |
||
824 | tmp_dst++; |
||
825 | }; |
||
826 | }; |
||
827 | #else |
||
828 | u8* src_offset; |
||
829 | u8* dst_offset; |
||
830 | u32 ifl; |
||
2351 | Serge | 831 | |
2340 | Serge | 832 | |
2342 | Serge | 833 | src_offset += (u32)bitmap->uaddr; |
834 | |||
2340 | Serge | 835 | |
2342 | Serge | 836 | dst_offset+= get_display_map(); |
837 | |||
838 | |||
839 | |||
840 | |||
2351 | Serge | 841 | while( tmp_h--) |
2342 | Serge | 842 | { |
843 | u32_t tmp_w = width; |
||
844 | |||
845 | |||
846 | u8* tmp_dst = dst_offset; |
||
847 | |||
848 | |||
849 | dst_offset+= os_display->width; |
||
850 | |||
851 | |||
852 | { |
||
853 | *(tmp_src+3) = (*tmp_dst==slot)?0xFF:0x00; |
||
854 | tmp_src+=4; |
||
855 | tmp_dst++; |
||
856 | }; |
||
857 | }; |
||
858 | safe_sti(ifl); |
||
2351 | Serge | 859 | } |
2342 | Serge | 860 | #endif |
861 | |||
862 | |||
863 | cmd_buffer&= 0xFFFFF000; |
||
864 | |||
865 | |||
866 | |||
867 | |||
868 | |||
869 | |||
870 | cmd |= 3 << 17; |
||
871 | |||
872 | |||
2340 | Serge | 873 | br13|= ROP_COPY_SRC << 16; |
2342 | Serge | 874 | br13|= FORMAT8888 << 24; |
875 | |||
2340 | Serge | 876 | |
877 | b[n++] = br13; |
||
878 | b[n++] = (dst_y << 16) | dst_x; // left, top |
||
2342 | Serge | 879 | b[n++] = ((dst_y+height-1)<< 16)|(dst_x+width-1); // bottom, right |
880 | b[n++] = 0; // destination |
||
881 | b[n++] = (src_y << 16) | src_x; // source left & top |
||
882 | b[n++] = bitmap->pitch; // source pitch |
||
883 | b[n++] = bitmap->gaddr; // source |
||
884 | |||
2340 | Serge | 885 | |
2342 | Serge | 886 | b[n++] = 0x00FFFFFF; // Transparency Color High |
887 | |||
2340 | Serge | 888 | |
889 | if( n & 1) |
||
890 | b[n++] = MI_NOOP; |
||
891 | |||
892 | |||
2344 | Serge | 893 | |
2340 | Serge | 894 | |
2342 | Serge | 895 | { |
2351 | Serge | 896 | int ret; |
897 | |||
898 | |||
2342 | Serge | 899 | ring->dispatch_execbuffer(ring, cmd_offset, n*4); |
2351 | Serge | 900 | |
901 | |||
902 | if (ret) |
||
903 | return ret; |
||
904 | |||
905 | |||
906 | intel_ring_emit(ring, 0); |
||
907 | intel_ring_emit(ring, 0); |
||
908 | intel_ring_emit(ring, MI_NOOP); |
||
909 | intel_ring_advance(ring); |
||
910 | } |
||
911 | else |
||
2342 | Serge | 912 | { |
2351 | Serge | 913 | ring = &dev_priv->ring[RCS]; |
2342 | Serge | 914 | ring->dispatch_execbuffer(ring, cmd_offset, n*4); |
2351 | Serge | 915 | ring->flush(ring, 0, I915_GEM_DOMAIN_RENDER); |
916 | }; |
||
917 | |||
2342 | Serge | 918 | |
2351 | Serge | 919 | bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU; |
920 | |||
2340 | Serge | 921 | |
2351 | Serge | 922 | fail: |
923 | return -1; |
||
924 | }; |
||
925 | |||
2340 | Serge | 926 | |
2344 | Serge | 927 | |
2351 | Serge | 928 | static void |
929 | ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask) |
||
930 | { |
||
931 | if ((dev_priv->irq_mask & mask) != 0) { |
||
932 | dev_priv->irq_mask &= ~mask; |
||
933 | I915_WRITE(DEIMR, dev_priv->irq_mask); |
||
934 | POSTING_READ(DEIMR); |
||
935 | } |
||
936 | } |
||
937 | |||
2340 | Serge | 938 | |
2351 | Serge | 939 | { |
940 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
||
941 | unsigned long irqflags; |
||
942 | |||
943 | |||
944 | // return -EINVAL; |
||
945 | |||
946 | |||
947 | ironlake_enable_display_irq(dev_priv, (pipe == 0) ? |
||
948 | DE_PIPEA_VBLANK : DE_PIPEB_VBLANK); |
||
949 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); |
||
950 | |||
951 | |||
2340 | Serge | 952 | } |
2351 | Serge | 953 | |
954 | |||
955 | |||
956 | |||
957 | { |
||
958 | drm_i915_private_t *dev_priv = dev->dev_private; |
||
959 | int ret, i, pipe; |
||
960 | |||
961 | |||
962 | dbgprintf("Interrupt enable: %08x\n", |
||
963 | I915_READ(IER)); |
||
964 | dbgprintf("Interrupt identity: %08x\n", |
||
965 | I915_READ(IIR)); |
||
966 | dbgprintf("Interrupt mask: %08x\n", |
||
967 | I915_READ(IMR)); |
||
968 | for_each_pipe(pipe) |
||
969 | dbgprintf("Pipe %c stat: %08x\n", |
||
970 | pipe_name(pipe), |
||
971 | I915_READ(PIPESTAT(pipe))); |
||
972 | } else { |
||
973 | dbgprintf("North Display Interrupt enable: %08x\n", |
||
974 | I915_READ(DEIER)); |
||
975 | dbgprintf("North Display Interrupt identity: %08x\n", |
||
976 | I915_READ(DEIIR)); |
||
977 | dbgprintf("North Display Interrupt mask: %08x\n", |
||
978 | I915_READ(DEIMR)); |
||
979 | dbgprintf("South Display Interrupt enable: %08x\n", |
||
980 | I915_READ(SDEIER)); |
||
981 | dbgprintf("South Display Interrupt identity: %08x\n", |
||
982 | I915_READ(SDEIIR)); |
||
983 | dbgprintf("South Display Interrupt mask: %08x\n", |
||
984 | I915_READ(SDEIMR)); |
||
985 | dbgprintf("Graphics Interrupt enable: %08x\n", |
||
986 | I915_READ(GTIER)); |
||
987 | dbgprintf("Graphics Interrupt identity: %08x\n", |
||
988 | I915_READ(GTIIR)); |
||
989 | dbgprintf("Graphics Interrupt mask: %08x\n", |
||
990 | I915_READ(GTIMR)); |
||
991 | } |
||
992 | dbgprintf("Interrupts received: %d\n", |
||
993 | atomic_read(&dev_priv->irq_received)); |
||
994 | for (i = 0; i < I915_NUM_RINGS; i++) { |
||
995 | if (IS_GEN6(dev) || IS_GEN7(dev)) { |
||
996 | printf("Graphics Interrupt mask (%s): %08x\n", |
||
997 | dev_priv->ring[i].name, |
||
998 | I915_READ_IMR(&dev_priv->ring[i])); |
||
999 | } |
||
1000 | // i915_ring_seqno_info(m, &dev_priv->ring[i]); |
||
1001 | } |
||
1002 | |||
1003 | |||
1004 | } |
||
1005 | |||
1006 | |||
1007 | int size) |
||
1008 | { |
||
1009 | struct intel_ring_buffer *ring; |
||
1010 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
1011 | u32 invalidate; |
||
1012 | u32 seqno = 2; |
||
1013 | |||
1014 | |||
1015 | // dbgprintf("execute %x size %d\n", offset, size); |
||
1016 | |||
1017 | |||
1018 | // "mfence \n" |
||
1019 | // "wbinvd \n" |
||
1020 | // "mfence \n" |
||
1021 | // :::"memory"); |
||
1022 | |||
1023 | |||
1024 | ring->dispatch_execbuffer(ring, offset, size); |
||
1025 | |||
1026 | |||
1027 | if (INTEL_INFO(main_device)->gen >= 4) |
||
1028 | invalidate |= I915_GEM_DOMAIN_SAMPLER; |
||
1029 | if (ring->flush(ring, invalidate, 0)) |
||
1030 | i915_gem_next_request_seqno(ring); |
||
1031 | |||
1032 | |||
1033 | |||
1034 | |||
1035 | |||
1036 | |||
1037 | |||
1038 | |||
2340 | Serge | 1039 | |
2351 | Serge | 1040 | |
1041 | |||
1042 | int src_x, int src_y, u32 w, u32 h) |
||
1043 | { |
||
1044 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
1045 | |||
1046 | |||
1047 | bitmap_t screen; |
||
1048 | |||
1049 | |||
1050 | |||
1051 | |||
1052 | // hbitmap, dst_x, dst_y, src_x, src_y, w, h); |
||
1053 | |||
1054 | |||
1055 | return -1; |
||
1056 | |||
1057 | |||
1058 | // dbgprintf("bitmap %x\n", src_bitmap); |
||
1059 | |||
1060 | |||
1061 | return -1; |
||
1062 | |||
1063 | |||
1064 | |||
1065 | |||
1066 | screen.gaddr = 0; |
||
1067 | screen.width = os_display->width; |
||
1068 | screen.height = os_display->height; |
||
1069 | screen.obj = (void*)-1; |
||
1070 | |||
1071 | |||
1072 | |||
1073 | |||
1074 | dst_y+= winrc.top; |
||
1075 | |||
1076 | |||
1077 | |||
1078 | |||
1079 | |||
1080 | |||
2361 | Serge | 1081 | int w, int h, bitmap_t *src_bitmap, int src_x, int src_y, |
1082 | bitmap_t *mask_bitmap); |
||
1083 | |||
2360 | Serge | 1084 | |
2361 | Serge | 1085 | struct context *get_context(); |
1086 | |||
1087 | |||
1088 | int src_x, int src_y, u32 w, u32 h) |
||
1089 | { |
||
1090 | drm_i915_private_t *dev_priv = main_device->dev_private; |
||
1091 | struct context *ctx; |
||
1092 | |||
1093 | |||
1094 | bitmap_t screen; |
||
1095 | int ret; |
||
1096 | |||
1097 | |||
1098 | rect_t winrc; |
||
1099 | |||
1100 | |||
1101 | // hbitmap, dst_x, dst_y, src_x, src_y, w, h); |
||
1102 | |||
1103 | |||
1104 | return -1; |
||
1105 | |||
1106 | |||
1107 | // dbgprintf("bitmap %x\n", src_bitmap); |
||
1108 | |||
1109 | |||
1110 | return -1; |
||
1111 | |||
1112 | |||
1113 | if(unlikely(ctx==NULL)) |
||
1114 | { |
||
1115 | ret = create_context(); |
||
1116 | if(ret!=0) |
||
1117 | return -1; |
||
1118 | |||
1119 | |||
1120 | }; |
||
1121 | |||
1122 | |||
1123 | |||
1124 | |||
1125 | dst_x+= winrc.left; |
||
1126 | dst_y+= winrc.top; |
||
1127 | |||
1128 | |||
1129 | |||
1130 | { |
||
1131 | u8* src_offset; |
||
1132 | u8* dst_offset; |
||
1133 | u32 slot; |
||
3031 | serge | 1134 | u32 ifl; |
2361 | Serge | 1135 | |
1136 | |||
1137 | if(ret !=0 ) |
||
1138 | { |
||
1139 | dbgprintf("%s fail\n", __FUNCTION__); |
||
1140 | return ret; |
||
1141 | }; |
||
1142 | |||
1143 | |||
3031 | serge | 1144 | |
2361 | Serge | 1145 | |
1146 | mask_bitmap->height = winrc.bottom; |
||
1147 | mask_bitmap->pitch = ALIGN(w,64); |
||
1148 | |||
1149 | |||
3031 | serge | 1150 | // slot = 0x01; |
1151 | |||
1152 | |||
2361 | Serge | 1153 | |
1154 | |||
1155 | |||
1156 | "movd %[slot], %%xmm6 \n" |
||
1157 | "punpckldq %%xmm6, %%xmm6 \n" |
||
1158 | "punpcklqdq %%xmm6, %%xmm6 \n" |
||
1159 | :: [slot] "m" (slot) |
||
3031 | serge | 1160 | :"xmm6"); |
2361 | Serge | 1161 | |
1162 | |||
1163 | |||
1164 | |||
1165 | dst_offset+= get_display_map(); |
||
1166 | |||
1167 | |||
1168 | |||
1169 | |||
1170 | while( tmp_h--) |
||
1171 | { |
||
1172 | int tmp_w = mask_bitmap->width; |
||
1173 | |||
1174 | |||
1175 | u8* tmp_dst = dst_offset; |
||
1176 | |||
1177 | |||
1178 | dst_offset+= os_display->width; |
||
1179 | |||
1180 | |||
1181 | // { |
||
1182 | // *(tmp_src) = (*tmp_dst==slot)?0x1:0x00; |
||
1183 | // tmp_src++; |
||
1184 | // tmp_dst++; |
||
1185 | // }; |
||
1186 | while(tmp_w >= 64) |
||
1187 | { |
||
1188 | __asm__ __volatile__ ( |
||
1189 | "movdqu (%0), %%xmm0 \n" |
||
1190 | "movdqu 16(%0), %%xmm1 \n" |
||
1191 | "movdqu 32(%0), %%xmm2 \n" |
||
1192 | "movdqu 48(%0), %%xmm3 \n" |
||
1193 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
1194 | "pcmpeqb %%xmm6, %%xmm1 \n" |
||
1195 | "pcmpeqb %%xmm6, %%xmm2 \n" |
||
1196 | "pcmpeqb %%xmm6, %%xmm3 \n" |
||
1197 | "movdqa %%xmm0, (%%edi) \n" |
||
1198 | "movdqa %%xmm1, 16(%%edi) \n" |
||
1199 | "movdqa %%xmm2, 32(%%edi) \n" |
||
1200 | "movdqa %%xmm3, 48(%%edi) \n" |
||
1201 | |||
1202 | |||
1203 | :"xmm0","xmm1","xmm2","xmm3"); |
||
1204 | tmp_w -= 64; |
||
1205 | tmp_src += 64; |
||
1206 | tmp_dst += 64; |
||
1207 | } |
||
1208 | |||
1209 | |||
1210 | { |
||
1211 | __asm__ __volatile__ ( |
||
1212 | "movdqu (%0), %%xmm0 \n" |
||
1213 | "movdqu 16(%0), %%xmm1 \n" |
||
1214 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
1215 | "pcmpeqb %%xmm6, %%xmm1 \n" |
||
1216 | "movdqa %%xmm0, (%%edi) \n" |
||
1217 | "movdqa %%xmm1, 16(%%edi) \n" |
||
1218 | |||
1219 | |||
1220 | :"xmm0","xmm1"); |
||
1221 | tmp_w -= 32; |
||
1222 | tmp_src += 32; |
||
1223 | tmp_dst += 32; |
||
1224 | } |
||
1225 | |||
1226 | |||
1227 | { |
||
1228 | __asm__ __volatile__ ( |
||
1229 | "movdqu (%0), %%xmm0 \n" |
||
1230 | "pcmpeqb %%xmm6, %%xmm0 \n" |
||
1231 | "movdqa %%xmm0, (%%edi) \n" |
||
1232 | :: "r" (tmp_dst), "D" (tmp_src) |
||
1233 | :"xmm0"); |
||
1234 | tmp_w -= 16; |
||
1235 | tmp_src += 16; |
||
1236 | tmp_dst += 16; |
||
1237 | } |
||
1238 | }; |
||
1239 | safe_sti(ifl); |
||
1240 | ctx->seqno = os_display->mask_seqno; |
||
1241 | } |
||
1242 | |||
1243 | |||
1244 | screen.gaddr = 0; |
||
1245 | screen.width = os_display->width; |
||
1246 | screen.height = os_display->height; |
||
1247 | screen.obj = (void*)-1; |
||
1248 | |||
1249 | |||
1250 | |||
1251 | |||
1252 | |||
1253 | mask_bitmap); |
||
1254 | |||
1255 | |||
1256 | }; |
||
1257 | |||
1258 | |||
1259 | |||
1260 | |||
1261 | |||
1262 | { |
||
1263 | printf("destroy context %x\n", context); |
||
1264 | |||
1265 | |||
1266 | __DestroyObject(context); |
||
1267 | }; |
||
1268 | |||
1269 | |||
1270 | |||
1271 | { |
||
1272 | struct context *context; |
||
1273 | |||
1274 | |||
1275 | int slot; |
||
1276 | |||
1277 | |||
1278 | int ret; |
||
1279 | |||
1280 | |||
1281 | |||
1282 | |||
1283 | return 0; |
||
1284 | |||
1285 | |||
1286 | // printf("context %x\n", coontext); |
||
1287 | if( context == NULL) |
||
1288 | goto err1; |
||
1289 | context->header.destroy = destroy_context; |
||
1290 | |||
1291 | |||
1292 | |||
1293 | |||
1294 | io_10.height = os_display->height+1; |
||
1295 | io_10.max_width = os_display->width/4; |
||
1296 | io_10.max_height = os_display->height+1; |
||
1297 | |||
1298 | |||
1299 | if(ret) |
||
1300 | goto err2; |
||
1301 | |||
1302 | |||
1303 | if(unlikely(mask == NULL)) /* something really terrible happend */ |
||
1304 | goto err2; |
||
1305 | dbgprintf("done\n"); |
||
1306 | |||
1307 | |||
1308 | context->seqno = os_display->mask_seqno-1; |
||
1309 | context->slot = slot; |
||
1310 | |||
1311 | |||
1312 | return 0; |
||
1313 | |||
1314 | |||
1315 | __DestroyObject(context); |
||
1316 | err1: |
||
1317 | return -1; |
||
1318 | }; |
||
1319 | |||
1320 | |||
1321 | { |
||
1322 | |||
1323 | |||
1324 | |||
1325 | |||
1326 | } |
||
1327 | |||
1328 | |||
3031 | serge | 1329 | |
2361 | Serge | 1330 | |
1331 | |||
1332 | |||
1333 | |||
1334 | |||
1335 | |||
1336 | |||
1337 | |||
2360 | Serge | 1338 | { |
1339 | unsigned long irqflags; |
||
1340 | |||
1341 | |||
1342 | // cwq, &cwq->worklist, cwq->worklist.next); |
||
1343 | |||
1344 | |||
1345 | |||
1346 | |||
1347 | { |
||
1348 | struct work_struct *work = list_entry(cwq->worklist.next, |
||
1349 | struct work_struct, entry); |
||
1350 | work_func_t f = work->func; |
||
1351 | list_del_init(cwq->worklist.next); |
||
1352 | // dbgprintf("head %x, next %x\n", |
||
1353 | // &cwq->worklist, cwq->worklist.next); |
||
1354 | |||
1355 | |||
1356 | f(work); |
||
1357 | spin_lock_irqsave(&cwq->lock, irqflags); |
||
1358 | } |
||
1359 | |||
1360 | |||
1361 | } |
||
1362 | |||
1363 | |||
1364 | |||
1365 | int __queue_work(struct workqueue_struct *wq, |
||
1366 | struct work_struct *work) |
||
1367 | { |
||
1368 | unsigned long flags; |
||
1369 | // ENTER(); |
||
1370 | |||
1371 | |||
1372 | // wq, work ); |
||
1373 | |||
1374 | |||
1375 | return 0; |
||
1376 | |||
1377 | |||
1378 | |||
1379 | |||
1380 | TimerHs(0,0, run_workqueue, wq); |
||
1381 | |||
1382 | |||
1383 | |||
1384 | |||
1385 | // dbgprintf("wq: %x head %x, next %x\n", |
||
1386 | // wq, &wq->worklist, wq->worklist.next); |
||
1387 | |||
1388 | |||
1389 | return 1; |
||
1390 | }; |
||
1391 | |||
1392 | |||
1393 | { |
||
1394 | // ENTER(); |
||
1395 | struct delayed_work *dwork = (struct delayed_work *)__data; |
||
1396 | struct workqueue_struct *wq = dwork->work.data; |
||
1397 | |||
1398 | |||
1399 | // wq, &dwork->work ); |
||
1400 | |||
1401 | |||
1402 | // LEAVE(); |
||
1403 | } |
||
1404 | |||
1405 | |||
1406 | |||
1407 | struct delayed_work *dwork, unsigned long delay) |
||
1408 | { |
||
1409 | struct work_struct *work = &dwork->work; |
||
1410 | |||
1411 | |||
1412 | TimerHs(0,0, delayed_work_timer_fn, dwork); |
||
1413 | return 1; |
||
1414 | } |
||
1415 | |||
1416 | |||
1417 | struct delayed_work *dwork, unsigned long delay) |
||
1418 | { |
||
1419 | u32 flags; |
||
1420 | // ENTER(); |
||
1421 | |||
1422 | |||
1423 | // wq, &dwork->work ); |
||
1424 | |||
1425 | |||
1426 | return __queue_work(wq, &dwork->work); |
||
1427 | |||
1428 | |||
1429 | } |
||
1430 | |||
1431 | |||
1432 | |||
1433 | unsigned int flags, |
||
1434 | int max_active) |
||
1435 | { |
||
1436 | struct workqueue_struct *wq; |
||
1437 | |||
1438 | |||
1439 | if (!wq) |
||
1440 | goto err; |
||
1441 | |||
1442 | |||
1443 | |||
1444 | |||
1445 | err: |
||
1446 | return NULL; |
||
1447 | } |
||
1448 | |||
1449 | |||
3031 | serge | 1450 | |
2360 | Serge | 1451 | |
3031 | serge | 1452 | { |
1453 | u32 tmp = GetTimerTicks(); |
||
1454 | |||
2360 | Serge | 1455 | |
3031 | serge | 1456 | ts->tv_nsec = (tmp - ts->tv_sec*100)*10000000; |
1457 | } |
||
1458 | |||
2360 | Serge | 1459 | |
3031 | serge | 1460 | { |
1461 | while (nsec >= NSEC_PER_SEC) { |
||
1462 | nsec -= NSEC_PER_SEC; |
||
1463 | ++sec; |
||
1464 | } |
||
1465 | while (nsec < 0) { |
||
1466 | nsec += NSEC_PER_SEC; |
||
1467 | --sec; |
||
1468 | } |
||
1469 | ts->tv_sec = sec; |
||
1470 | ts->tv_nsec = nsec; |
||
1471 | }>24); |
||
1472 | |||
2360 | Serge | 1473 | |
3031 | serge | 1474 | |
1475 |