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Rev | Author | Line No. | Line |
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2330 | Serge | 1 | /* |
2 | * Copyright © 2006-2007 Intel Corporation |
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3 | * Copyright (c) 2006 Dave Airlie |
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4 | * |
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5 | * Permission is hereby granted, free of charge, to any person obtaining a |
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6 | * copy of this software and associated documentation files (the "Software"), |
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7 | * to deal in the Software without restriction, including without limitation |
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8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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9 | * and/or sell copies of the Software, and to permit persons to whom the |
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10 | * Software is furnished to do so, subject to the following conditions: |
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11 | * |
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12 | * The above copyright notice and this permission notice (including the next |
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13 | * paragraph) shall be included in all copies or substantial portions of the |
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14 | * Software. |
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15 | * |
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16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
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22 | * DEALINGS IN THE SOFTWARE. |
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23 | * |
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24 | * Authors: |
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25 | * Eric Anholt |
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26 | * Dave Airlie |
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27 | * Jesse Barnes |
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28 | */ |
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29 | |||
30 | //#include |
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31 | //#include |
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32 | #include |
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33 | #include |
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3031 | serge | 34 | #include |
35 | #include |
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36 | #include |
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2330 | Serge | 37 | #include "intel_drv.h" |
3031 | serge | 38 | #include |
2330 | Serge | 39 | #include "i915_drv.h" |
40 | //#include |
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41 | |||
42 | /* Private structure for the integrated LVDS support */ |
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43 | struct intel_lvds { |
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44 | struct intel_encoder base; |
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45 | |||
46 | struct edid *edid; |
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47 | |||
48 | int fitting_mode; |
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49 | u32 pfit_control; |
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50 | u32 pfit_pgm_ratios; |
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51 | bool pfit_dirty; |
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52 | |||
53 | struct drm_display_mode *fixed_mode; |
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54 | }; |
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55 | |||
56 | static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder) |
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57 | { |
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58 | return container_of(encoder, struct intel_lvds, base.base); |
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59 | } |
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60 | |||
61 | static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector) |
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62 | { |
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63 | return container_of(intel_attached_encoder(connector), |
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64 | struct intel_lvds, base); |
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65 | } |
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66 | |||
3031 | serge | 67 | static bool intel_lvds_get_hw_state(struct intel_encoder *encoder, |
68 | enum pipe *pipe) |
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69 | { |
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70 | struct drm_device *dev = encoder->base.dev; |
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71 | struct drm_i915_private *dev_priv = dev->dev_private; |
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72 | u32 lvds_reg, tmp; |
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73 | |||
74 | if (HAS_PCH_SPLIT(dev)) { |
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75 | lvds_reg = PCH_LVDS; |
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76 | } else { |
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77 | lvds_reg = LVDS; |
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78 | } |
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79 | |||
80 | tmp = I915_READ(lvds_reg); |
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81 | |||
82 | if (!(tmp & LVDS_PORT_EN)) |
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83 | return false; |
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84 | |||
85 | if (HAS_PCH_CPT(dev)) |
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86 | *pipe = PORT_TO_PIPE_CPT(tmp); |
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87 | else |
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88 | *pipe = PORT_TO_PIPE(tmp); |
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89 | |||
90 | return true; |
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91 | } |
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92 | |||
2330 | Serge | 93 | /** |
94 | * Sets the power state for the panel. |
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95 | */ |
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3031 | serge | 96 | static void intel_enable_lvds(struct intel_encoder *encoder) |
2330 | Serge | 97 | { |
3031 | serge | 98 | struct drm_device *dev = encoder->base.dev; |
99 | struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base); |
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100 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); |
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2330 | Serge | 101 | struct drm_i915_private *dev_priv = dev->dev_private; |
102 | u32 ctl_reg, lvds_reg, stat_reg; |
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103 | |||
104 | if (HAS_PCH_SPLIT(dev)) { |
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105 | ctl_reg = PCH_PP_CONTROL; |
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106 | lvds_reg = PCH_LVDS; |
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107 | stat_reg = PCH_PP_STATUS; |
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108 | } else { |
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109 | ctl_reg = PP_CONTROL; |
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110 | lvds_reg = LVDS; |
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111 | stat_reg = PP_STATUS; |
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112 | } |
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113 | |||
114 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); |
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115 | |||
116 | if (intel_lvds->pfit_dirty) { |
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117 | /* |
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118 | * Enable automatic panel scaling so that non-native modes |
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119 | * fill the screen. The panel fitter should only be |
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120 | * adjusted whilst the pipe is disabled, according to |
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121 | * register description and PRM. |
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122 | */ |
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123 | DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", |
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124 | intel_lvds->pfit_control, |
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125 | intel_lvds->pfit_pgm_ratios); |
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126 | |||
127 | I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios); |
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128 | I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control); |
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129 | intel_lvds->pfit_dirty = false; |
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130 | } |
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131 | |||
132 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); |
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133 | POSTING_READ(lvds_reg); |
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134 | if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000)) |
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135 | DRM_ERROR("timed out waiting for panel to power on\n"); |
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136 | |||
3031 | serge | 137 | intel_panel_enable_backlight(dev, intel_crtc->pipe); |
2330 | Serge | 138 | } |
139 | |||
3031 | serge | 140 | static void intel_disable_lvds(struct intel_encoder *encoder) |
2330 | Serge | 141 | { |
3031 | serge | 142 | struct drm_device *dev = encoder->base.dev; |
143 | struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base); |
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2330 | Serge | 144 | struct drm_i915_private *dev_priv = dev->dev_private; |
145 | u32 ctl_reg, lvds_reg, stat_reg; |
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146 | |||
147 | if (HAS_PCH_SPLIT(dev)) { |
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148 | ctl_reg = PCH_PP_CONTROL; |
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149 | lvds_reg = PCH_LVDS; |
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150 | stat_reg = PCH_PP_STATUS; |
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151 | } else { |
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152 | ctl_reg = PP_CONTROL; |
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153 | lvds_reg = LVDS; |
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154 | stat_reg = PP_STATUS; |
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155 | } |
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156 | |||
157 | intel_panel_disable_backlight(dev); |
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158 | |||
159 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); |
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160 | if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000)) |
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161 | DRM_ERROR("timed out waiting for panel to power off\n"); |
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162 | |||
163 | if (intel_lvds->pfit_control) { |
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164 | I915_WRITE(PFIT_CONTROL, 0); |
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165 | intel_lvds->pfit_dirty = true; |
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166 | } |
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167 | |||
168 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); |
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169 | POSTING_READ(lvds_reg); |
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170 | } |
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171 | |||
172 | static int intel_lvds_mode_valid(struct drm_connector *connector, |
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173 | struct drm_display_mode *mode) |
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174 | { |
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175 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); |
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176 | struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode; |
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177 | |||
178 | if (mode->hdisplay > fixed_mode->hdisplay) |
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179 | return MODE_PANEL; |
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180 | if (mode->vdisplay > fixed_mode->vdisplay) |
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181 | return MODE_PANEL; |
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182 | |||
183 | return MODE_OK; |
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184 | } |
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185 | |||
186 | static void |
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187 | centre_horizontally(struct drm_display_mode *mode, |
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188 | int width) |
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189 | { |
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190 | u32 border, sync_pos, blank_width, sync_width; |
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191 | |||
192 | /* keep the hsync and hblank widths constant */ |
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193 | sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; |
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194 | blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; |
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195 | sync_pos = (blank_width - sync_width + 1) / 2; |
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196 | |||
197 | border = (mode->hdisplay - width + 1) / 2; |
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198 | border += border & 1; /* make the border even */ |
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199 | |||
200 | mode->crtc_hdisplay = width; |
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201 | mode->crtc_hblank_start = width + border; |
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202 | mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; |
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203 | |||
204 | mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; |
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205 | mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; |
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3031 | serge | 206 | |
207 | mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET; |
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2330 | Serge | 208 | } |
209 | |||
210 | static void |
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211 | centre_vertically(struct drm_display_mode *mode, |
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212 | int height) |
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213 | { |
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214 | u32 border, sync_pos, blank_width, sync_width; |
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215 | |||
216 | /* keep the vsync and vblank widths constant */ |
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217 | sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; |
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218 | blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; |
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219 | sync_pos = (blank_width - sync_width + 1) / 2; |
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220 | |||
221 | border = (mode->vdisplay - height + 1) / 2; |
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222 | |||
223 | mode->crtc_vdisplay = height; |
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224 | mode->crtc_vblank_start = height + border; |
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225 | mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; |
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226 | |||
227 | mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; |
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228 | mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; |
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3031 | serge | 229 | |
230 | mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET; |
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2330 | Serge | 231 | } |
232 | |||
233 | static inline u32 panel_fitter_scaling(u32 source, u32 target) |
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234 | { |
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235 | /* |
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236 | * Floating point operation is not supported. So the FACTOR |
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237 | * is defined, which can avoid the floating point computation |
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238 | * when calculating the panel ratio. |
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239 | */ |
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240 | #define ACCURACY 12 |
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241 | #define FACTOR (1 << ACCURACY) |
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242 | u32 ratio = source * FACTOR / target; |
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243 | return (FACTOR * ratio + FACTOR/2) / FACTOR; |
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244 | } |
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245 | |||
246 | static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, |
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3031 | serge | 247 | const struct drm_display_mode *mode, |
2330 | Serge | 248 | struct drm_display_mode *adjusted_mode) |
249 | { |
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250 | struct drm_device *dev = encoder->dev; |
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251 | struct drm_i915_private *dev_priv = dev->dev_private; |
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252 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
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3031 | serge | 253 | struct intel_crtc *intel_crtc = intel_lvds->base.new_crtc; |
2330 | Serge | 254 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; |
255 | int pipe; |
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256 | |||
257 | /* Should never happen!! */ |
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258 | if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { |
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259 | DRM_ERROR("Can't support LVDS on pipe A\n"); |
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260 | return false; |
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261 | } |
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262 | |||
3031 | serge | 263 | if (intel_encoder_check_is_cloned(&intel_lvds->base)) |
2330 | Serge | 264 | return false; |
265 | |||
266 | /* |
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267 | * We have timings from the BIOS for the panel, put them in |
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268 | * to the adjusted mode. The CRTC will be set up for this mode, |
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269 | * with the panel scaling set up to source from the H/VDisplay |
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270 | * of the original mode. |
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271 | */ |
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272 | intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode); |
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273 | |||
274 | if (HAS_PCH_SPLIT(dev)) { |
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275 | intel_pch_panel_fitting(dev, intel_lvds->fitting_mode, |
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276 | mode, adjusted_mode); |
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277 | return true; |
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278 | } |
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279 | |||
280 | /* Native modes don't need fitting */ |
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281 | if (adjusted_mode->hdisplay == mode->hdisplay && |
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282 | adjusted_mode->vdisplay == mode->vdisplay) |
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283 | goto out; |
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284 | |||
285 | /* 965+ wants fuzzy fitting */ |
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286 | if (INTEL_INFO(dev)->gen >= 4) |
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287 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | |
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288 | PFIT_FILTER_FUZZY); |
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289 | |||
290 | /* |
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291 | * Enable automatic panel scaling for non-native modes so that they fill |
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292 | * the screen. Should be enabled before the pipe is enabled, according |
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293 | * to register description and PRM. |
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294 | * Change the value here to see the borders for debugging |
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295 | */ |
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296 | for_each_pipe(pipe) |
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297 | I915_WRITE(BCLRPAT(pipe), 0); |
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298 | |||
3031 | serge | 299 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
300 | |||
2330 | Serge | 301 | switch (intel_lvds->fitting_mode) { |
302 | case DRM_MODE_SCALE_CENTER: |
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303 | /* |
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304 | * For centered modes, we have to calculate border widths & |
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305 | * heights and modify the values programmed into the CRTC. |
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306 | */ |
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307 | centre_horizontally(adjusted_mode, mode->hdisplay); |
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308 | centre_vertically(adjusted_mode, mode->vdisplay); |
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309 | border = LVDS_BORDER_ENABLE; |
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310 | break; |
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311 | |||
312 | case DRM_MODE_SCALE_ASPECT: |
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313 | /* Scale but preserve the aspect ratio */ |
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314 | if (INTEL_INFO(dev)->gen >= 4) { |
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315 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; |
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316 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; |
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317 | |||
318 | /* 965+ is easy, it does everything in hw */ |
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319 | if (scaled_width > scaled_height) |
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320 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR; |
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321 | else if (scaled_width < scaled_height) |
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322 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER; |
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323 | else if (adjusted_mode->hdisplay != mode->hdisplay) |
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324 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; |
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325 | } else { |
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326 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; |
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327 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; |
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328 | /* |
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329 | * For earlier chips we have to calculate the scaling |
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330 | * ratio by hand and program it into the |
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331 | * PFIT_PGM_RATIO register |
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332 | */ |
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333 | if (scaled_width > scaled_height) { /* pillar */ |
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334 | centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay); |
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335 | |||
336 | border = LVDS_BORDER_ENABLE; |
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337 | if (mode->vdisplay != adjusted_mode->vdisplay) { |
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338 | u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay); |
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339 | pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | |
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340 | bits << PFIT_VERT_SCALE_SHIFT); |
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341 | pfit_control |= (PFIT_ENABLE | |
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342 | VERT_INTERP_BILINEAR | |
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343 | HORIZ_INTERP_BILINEAR); |
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344 | } |
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345 | } else if (scaled_width < scaled_height) { /* letter */ |
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346 | centre_vertically(adjusted_mode, scaled_width / mode->hdisplay); |
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347 | |||
348 | border = LVDS_BORDER_ENABLE; |
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349 | if (mode->hdisplay != adjusted_mode->hdisplay) { |
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350 | u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay); |
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351 | pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | |
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352 | bits << PFIT_VERT_SCALE_SHIFT); |
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353 | pfit_control |= (PFIT_ENABLE | |
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354 | VERT_INTERP_BILINEAR | |
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355 | HORIZ_INTERP_BILINEAR); |
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356 | } |
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357 | } else |
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358 | /* Aspects match, Let hw scale both directions */ |
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359 | pfit_control |= (PFIT_ENABLE | |
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360 | VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | |
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361 | VERT_INTERP_BILINEAR | |
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362 | HORIZ_INTERP_BILINEAR); |
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363 | } |
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364 | break; |
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365 | |||
366 | case DRM_MODE_SCALE_FULLSCREEN: |
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367 | /* |
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368 | * Full scaling, even if it changes the aspect ratio. |
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369 | * Fortunately this is all done for us in hw. |
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370 | */ |
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371 | if (mode->vdisplay != adjusted_mode->vdisplay || |
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372 | mode->hdisplay != adjusted_mode->hdisplay) { |
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373 | pfit_control |= PFIT_ENABLE; |
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374 | if (INTEL_INFO(dev)->gen >= 4) |
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375 | pfit_control |= PFIT_SCALING_AUTO; |
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376 | else |
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377 | pfit_control |= (VERT_AUTO_SCALE | |
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378 | VERT_INTERP_BILINEAR | |
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379 | HORIZ_AUTO_SCALE | |
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380 | HORIZ_INTERP_BILINEAR); |
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381 | } |
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382 | break; |
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383 | |||
384 | default: |
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385 | break; |
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386 | } |
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387 | |||
388 | out: |
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389 | /* If not enabling scaling, be consistent and always use 0. */ |
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390 | if ((pfit_control & PFIT_ENABLE) == 0) { |
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391 | pfit_control = 0; |
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392 | pfit_pgm_ratios = 0; |
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393 | } |
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394 | |||
395 | /* Make sure pre-965 set dither correctly */ |
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396 | if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither) |
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397 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; |
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398 | |||
399 | if (pfit_control != intel_lvds->pfit_control || |
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400 | pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) { |
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401 | intel_lvds->pfit_control = pfit_control; |
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402 | intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios; |
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403 | intel_lvds->pfit_dirty = true; |
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404 | } |
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405 | dev_priv->lvds_border_bits = border; |
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406 | |||
407 | /* |
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408 | * XXX: It would be nice to support lower refresh rates on the |
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409 | * panels to reduce power consumption, and perhaps match the |
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410 | * user's requested refresh rate. |
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411 | */ |
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412 | |||
413 | return true; |
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414 | } |
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415 | |||
416 | static void intel_lvds_mode_set(struct drm_encoder *encoder, |
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417 | struct drm_display_mode *mode, |
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418 | struct drm_display_mode *adjusted_mode) |
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419 | { |
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420 | /* |
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421 | * The LVDS pin pair will already have been turned on in the |
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422 | * intel_crtc_mode_set since it has a large impact on the DPLL |
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423 | * settings. |
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424 | */ |
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425 | } |
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426 | |||
427 | /** |
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428 | * Detect the LVDS connection. |
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429 | * |
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430 | * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means |
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431 | * connected and closed means disconnected. We also send hotplug events as |
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432 | * needed, using lid status notification from the input layer. |
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433 | */ |
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434 | static enum drm_connector_status |
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435 | intel_lvds_detect(struct drm_connector *connector, bool force) |
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436 | { |
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437 | struct drm_device *dev = connector->dev; |
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438 | enum drm_connector_status status; |
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439 | |||
440 | status = intel_panel_detect(dev); |
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441 | if (status != connector_status_unknown) |
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442 | return status; |
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443 | |||
444 | return connector_status_connected; |
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445 | } |
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446 | |||
447 | /** |
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448 | * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. |
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449 | */ |
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450 | static int intel_lvds_get_modes(struct drm_connector *connector) |
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451 | { |
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452 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); |
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453 | struct drm_device *dev = connector->dev; |
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454 | struct drm_display_mode *mode; |
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455 | |||
456 | if (intel_lvds->edid) |
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457 | return drm_add_edid_modes(connector, intel_lvds->edid); |
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458 | |||
459 | mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode); |
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460 | if (mode == NULL) |
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461 | return 0; |
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462 | |||
463 | drm_mode_probed_add(connector, mode); |
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464 | return 1; |
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465 | } |
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466 | |||
467 | static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) |
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468 | { |
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3031 | serge | 469 | DRM_INFO("Skipping forced modeset for %s\n", id->ident); |
2330 | Serge | 470 | return 1; |
471 | } |
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472 | |||
473 | /* The GPU hangs up on these systems if modeset is performed on LID open */ |
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474 | static const struct dmi_system_id intel_no_modeset_on_lid[] = { |
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475 | { |
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476 | .callback = intel_no_modeset_on_lid_dmi_callback, |
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477 | .ident = "Toshiba Tecra A11", |
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478 | .matches = { |
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479 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
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480 | DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), |
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481 | }, |
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482 | }, |
||
483 | |||
484 | { } /* terminating entry */ |
||
485 | }; |
||
486 | |||
487 | #if 0 |
||
488 | /* |
||
489 | * Lid events. Note the use of 'modeset_on_lid': |
||
490 | * - we set it on lid close, and reset it on open |
||
491 | * - we use it as a "only once" bit (ie we ignore |
||
492 | * duplicate events where it was already properly |
||
493 | * set/reset) |
||
494 | * - the suspend/resume paths will also set it to |
||
495 | * zero, since they restore the mode ("lid open"). |
||
496 | */ |
||
497 | static int intel_lid_notify(struct notifier_block *nb, unsigned long val, |
||
498 | void *unused) |
||
499 | { |
||
500 | struct drm_i915_private *dev_priv = |
||
501 | container_of(nb, struct drm_i915_private, lid_notifier); |
||
502 | struct drm_device *dev = dev_priv->dev; |
||
503 | struct drm_connector *connector = dev_priv->int_lvds_connector; |
||
504 | |||
505 | if (dev->switch_power_state != DRM_SWITCH_POWER_ON) |
||
506 | return NOTIFY_OK; |
||
507 | |||
508 | /* |
||
509 | * check and update the status of LVDS connector after receiving |
||
510 | * the LID nofication event. |
||
511 | */ |
||
512 | if (connector) |
||
513 | connector->status = connector->funcs->detect(connector, |
||
514 | false); |
||
515 | |||
516 | /* Don't force modeset on machines where it causes a GPU lockup */ |
||
517 | if (dmi_check_system(intel_no_modeset_on_lid)) |
||
518 | return NOTIFY_OK; |
||
519 | if (!acpi_lid_open()) { |
||
520 | dev_priv->modeset_on_lid = 1; |
||
521 | return NOTIFY_OK; |
||
522 | } |
||
523 | |||
524 | if (!dev_priv->modeset_on_lid) |
||
525 | return NOTIFY_OK; |
||
526 | |||
527 | dev_priv->modeset_on_lid = 0; |
||
528 | |||
529 | mutex_lock(&dev->mode_config.mutex); |
||
3031 | serge | 530 | intel_modeset_check_state(dev); |
2330 | Serge | 531 | mutex_unlock(&dev->mode_config.mutex); |
532 | |||
533 | return NOTIFY_OK; |
||
534 | } |
||
535 | #endif |
||
536 | |||
537 | /** |
||
538 | * intel_lvds_destroy - unregister and free LVDS structures |
||
539 | * @connector: connector to free |
||
540 | * |
||
541 | * Unregister the DDC bus for this connector then free the driver private |
||
542 | * structure. |
||
543 | */ |
||
544 | static void intel_lvds_destroy(struct drm_connector *connector) |
||
545 | { |
||
546 | struct drm_device *dev = connector->dev; |
||
547 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
548 | |||
549 | intel_panel_destroy_backlight(dev); |
||
550 | |||
551 | // if (dev_priv->lid_notifier.notifier_call) |
||
552 | // acpi_lid_notifier_unregister(&dev_priv->lid_notifier); |
||
553 | drm_sysfs_connector_remove(connector); |
||
554 | drm_connector_cleanup(connector); |
||
555 | kfree(connector); |
||
556 | } |
||
557 | |||
558 | static int intel_lvds_set_property(struct drm_connector *connector, |
||
559 | struct drm_property *property, |
||
560 | uint64_t value) |
||
561 | { |
||
562 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); |
||
563 | struct drm_device *dev = connector->dev; |
||
564 | |||
565 | if (property == dev->mode_config.scaling_mode_property) { |
||
566 | struct drm_crtc *crtc = intel_lvds->base.base.crtc; |
||
567 | |||
568 | if (value == DRM_MODE_SCALE_NONE) { |
||
569 | DRM_DEBUG_KMS("no scaling not supported\n"); |
||
570 | return -EINVAL; |
||
571 | } |
||
572 | |||
573 | if (intel_lvds->fitting_mode == value) { |
||
574 | /* the LVDS scaling property is not changed */ |
||
575 | return 0; |
||
576 | } |
||
577 | intel_lvds->fitting_mode = value; |
||
578 | if (crtc && crtc->enabled) { |
||
579 | /* |
||
580 | * If the CRTC is enabled, the display will be changed |
||
581 | * according to the new panel fitting mode. |
||
582 | */ |
||
3031 | serge | 583 | intel_set_mode(crtc, &crtc->mode, |
2330 | Serge | 584 | crtc->x, crtc->y, crtc->fb); |
585 | } |
||
586 | } |
||
587 | |||
588 | return 0; |
||
589 | } |
||
590 | |||
591 | static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = { |
||
592 | .mode_fixup = intel_lvds_mode_fixup, |
||
593 | .mode_set = intel_lvds_mode_set, |
||
3031 | serge | 594 | .disable = intel_encoder_noop, |
2330 | Serge | 595 | }; |
596 | |||
597 | static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { |
||
598 | .get_modes = intel_lvds_get_modes, |
||
599 | .mode_valid = intel_lvds_mode_valid, |
||
600 | .best_encoder = intel_best_encoder, |
||
601 | }; |
||
602 | |||
603 | static const struct drm_connector_funcs intel_lvds_connector_funcs = { |
||
3031 | serge | 604 | .dpms = intel_connector_dpms, |
2330 | Serge | 605 | .detect = intel_lvds_detect, |
606 | .fill_modes = drm_helper_probe_single_connector_modes, |
||
607 | .set_property = intel_lvds_set_property, |
||
608 | .destroy = intel_lvds_destroy, |
||
609 | }; |
||
610 | |||
611 | static const struct drm_encoder_funcs intel_lvds_enc_funcs = { |
||
612 | .destroy = intel_encoder_destroy, |
||
613 | }; |
||
614 | |||
2351 | Serge | 615 | static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) |
2330 | Serge | 616 | { |
3031 | serge | 617 | DRM_INFO("Skipping LVDS initialization for %s\n", id->ident); |
2330 | Serge | 618 | return 1; |
619 | } |
||
620 | |||
621 | /* These systems claim to have LVDS, but really don't */ |
||
622 | static const struct dmi_system_id intel_no_lvds[] = { |
||
623 | { |
||
624 | .callback = intel_no_lvds_dmi_callback, |
||
625 | .ident = "Apple Mac Mini (Core series)", |
||
626 | .matches = { |
||
627 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
||
628 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), |
||
629 | }, |
||
630 | }, |
||
631 | { |
||
632 | .callback = intel_no_lvds_dmi_callback, |
||
633 | .ident = "Apple Mac Mini (Core 2 series)", |
||
634 | .matches = { |
||
635 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
||
636 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), |
||
637 | }, |
||
638 | }, |
||
639 | { |
||
640 | .callback = intel_no_lvds_dmi_callback, |
||
641 | .ident = "MSI IM-945GSE-A", |
||
642 | .matches = { |
||
643 | DMI_MATCH(DMI_SYS_VENDOR, "MSI"), |
||
644 | DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), |
||
645 | }, |
||
646 | }, |
||
647 | { |
||
648 | .callback = intel_no_lvds_dmi_callback, |
||
649 | .ident = "Dell Studio Hybrid", |
||
650 | .matches = { |
||
651 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
||
652 | DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), |
||
653 | }, |
||
654 | }, |
||
655 | { |
||
656 | .callback = intel_no_lvds_dmi_callback, |
||
657 | .ident = "Dell OptiPlex FX170", |
||
658 | .matches = { |
||
659 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
||
660 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"), |
||
661 | }, |
||
662 | }, |
||
663 | { |
||
664 | .callback = intel_no_lvds_dmi_callback, |
||
665 | .ident = "AOpen Mini PC", |
||
666 | .matches = { |
||
667 | DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), |
||
668 | DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), |
||
669 | }, |
||
670 | }, |
||
671 | { |
||
672 | .callback = intel_no_lvds_dmi_callback, |
||
673 | .ident = "AOpen Mini PC MP915", |
||
674 | .matches = { |
||
675 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
||
676 | DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), |
||
677 | }, |
||
678 | }, |
||
679 | { |
||
680 | .callback = intel_no_lvds_dmi_callback, |
||
681 | .ident = "AOpen i915GMm-HFS", |
||
682 | .matches = { |
||
683 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
||
684 | DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), |
||
685 | }, |
||
686 | }, |
||
687 | { |
||
688 | .callback = intel_no_lvds_dmi_callback, |
||
2351 | Serge | 689 | .ident = "AOpen i45GMx-I", |
690 | .matches = { |
||
691 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
||
692 | DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"), |
||
693 | }, |
||
694 | }, |
||
695 | { |
||
696 | .callback = intel_no_lvds_dmi_callback, |
||
2330 | Serge | 697 | .ident = "Aopen i945GTt-VFA", |
698 | .matches = { |
||
699 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), |
||
700 | }, |
||
701 | }, |
||
702 | { |
||
703 | .callback = intel_no_lvds_dmi_callback, |
||
704 | .ident = "Clientron U800", |
||
705 | .matches = { |
||
706 | DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), |
||
707 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), |
||
708 | }, |
||
709 | }, |
||
710 | { |
||
711 | .callback = intel_no_lvds_dmi_callback, |
||
2342 | Serge | 712 | .ident = "Clientron E830", |
713 | .matches = { |
||
714 | DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), |
||
715 | DMI_MATCH(DMI_PRODUCT_NAME, "E830"), |
||
716 | }, |
||
717 | }, |
||
718 | { |
||
719 | .callback = intel_no_lvds_dmi_callback, |
||
2330 | Serge | 720 | .ident = "Asus EeeBox PC EB1007", |
721 | .matches = { |
||
722 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), |
||
723 | DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), |
||
724 | }, |
||
725 | }, |
||
2342 | Serge | 726 | { |
727 | .callback = intel_no_lvds_dmi_callback, |
||
728 | .ident = "Asus AT5NM10T-I", |
||
729 | .matches = { |
||
730 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
||
731 | DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"), |
||
732 | }, |
||
733 | }, |
||
3031 | serge | 734 | { |
735 | .callback = intel_no_lvds_dmi_callback, |
||
736 | .ident = "Hewlett-Packard HP t5740e Thin Client", |
||
737 | .matches = { |
||
738 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
||
739 | DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"), |
||
740 | }, |
||
741 | }, |
||
742 | { |
||
743 | .callback = intel_no_lvds_dmi_callback, |
||
744 | .ident = "Hewlett-Packard t5745", |
||
745 | .matches = { |
||
746 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
||
747 | DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"), |
||
748 | }, |
||
749 | }, |
||
750 | { |
||
751 | .callback = intel_no_lvds_dmi_callback, |
||
752 | .ident = "Hewlett-Packard st5747", |
||
753 | .matches = { |
||
754 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
||
755 | DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"), |
||
756 | }, |
||
757 | }, |
||
758 | { |
||
759 | .callback = intel_no_lvds_dmi_callback, |
||
760 | .ident = "MSI Wind Box DC500", |
||
761 | .matches = { |
||
762 | DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), |
||
763 | DMI_MATCH(DMI_BOARD_NAME, "MS-7469"), |
||
764 | }, |
||
765 | }, |
||
766 | { |
||
767 | .callback = intel_no_lvds_dmi_callback, |
||
768 | .ident = "ZOTAC ZBOXSD-ID12/ID13", |
||
769 | .matches = { |
||
770 | DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"), |
||
771 | DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"), |
||
772 | }, |
||
773 | }, |
||
774 | { |
||
775 | .callback = intel_no_lvds_dmi_callback, |
||
776 | .ident = "Gigabyte GA-D525TUD", |
||
777 | .matches = { |
||
778 | DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."), |
||
779 | DMI_MATCH(DMI_BOARD_NAME, "D525TUD"), |
||
780 | }, |
||
781 | }, |
||
782 | { |
||
783 | .callback = intel_no_lvds_dmi_callback, |
||
784 | .ident = "Supermicro X7SPA-H", |
||
785 | .matches = { |
||
786 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), |
||
787 | DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"), |
||
788 | }, |
||
789 | }, |
||
2330 | Serge | 790 | |
791 | { } /* terminating entry */ |
||
792 | }; |
||
793 | |||
794 | /** |
||
795 | * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID |
||
796 | * @dev: drm device |
||
797 | * @connector: LVDS connector |
||
798 | * |
||
799 | * Find the reduced downclock for LVDS in EDID. |
||
800 | */ |
||
801 | static void intel_find_lvds_downclock(struct drm_device *dev, |
||
802 | struct drm_display_mode *fixed_mode, |
||
803 | struct drm_connector *connector) |
||
804 | { |
||
805 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
806 | struct drm_display_mode *scan; |
||
807 | int temp_downclock; |
||
808 | |||
809 | temp_downclock = fixed_mode->clock; |
||
810 | list_for_each_entry(scan, &connector->probed_modes, head) { |
||
811 | /* |
||
812 | * If one mode has the same resolution with the fixed_panel |
||
813 | * mode while they have the different refresh rate, it means |
||
814 | * that the reduced downclock is found for the LVDS. In such |
||
815 | * case we can set the different FPx0/1 to dynamically select |
||
816 | * between low and high frequency. |
||
817 | */ |
||
818 | if (scan->hdisplay == fixed_mode->hdisplay && |
||
819 | scan->hsync_start == fixed_mode->hsync_start && |
||
820 | scan->hsync_end == fixed_mode->hsync_end && |
||
821 | scan->htotal == fixed_mode->htotal && |
||
822 | scan->vdisplay == fixed_mode->vdisplay && |
||
823 | scan->vsync_start == fixed_mode->vsync_start && |
||
824 | scan->vsync_end == fixed_mode->vsync_end && |
||
825 | scan->vtotal == fixed_mode->vtotal) { |
||
826 | if (scan->clock < temp_downclock) { |
||
827 | /* |
||
828 | * The downclock is already found. But we |
||
829 | * expect to find the lower downclock. |
||
830 | */ |
||
831 | temp_downclock = scan->clock; |
||
832 | } |
||
833 | } |
||
834 | } |
||
835 | if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) { |
||
836 | /* We found the downclock for LVDS. */ |
||
837 | dev_priv->lvds_downclock_avail = 1; |
||
838 | dev_priv->lvds_downclock = temp_downclock; |
||
839 | DRM_DEBUG_KMS("LVDS downclock is found in EDID. " |
||
840 | "Normal clock %dKhz, downclock %dKhz\n", |
||
841 | fixed_mode->clock, temp_downclock); |
||
842 | } |
||
843 | } |
||
844 | |||
845 | /* |
||
846 | * Enumerate the child dev array parsed from VBT to check whether |
||
847 | * the LVDS is present. |
||
848 | * If it is present, return 1. |
||
849 | * If it is not present, return false. |
||
850 | * If no child dev is parsed from VBT, it assumes that the LVDS is present. |
||
851 | */ |
||
852 | static bool lvds_is_present_in_vbt(struct drm_device *dev, |
||
853 | u8 *i2c_pin) |
||
854 | { |
||
855 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
856 | int i; |
||
857 | |||
858 | if (!dev_priv->child_dev_num) |
||
859 | return true; |
||
860 | |||
861 | for (i = 0; i < dev_priv->child_dev_num; i++) { |
||
862 | struct child_device_config *child = dev_priv->child_dev + i; |
||
863 | |||
864 | /* If the device type is not LFP, continue. |
||
865 | * We have to check both the new identifiers as well as the |
||
866 | * old for compatibility with some BIOSes. |
||
867 | */ |
||
868 | if (child->device_type != DEVICE_TYPE_INT_LFP && |
||
869 | child->device_type != DEVICE_TYPE_LFP) |
||
870 | continue; |
||
871 | |||
3031 | serge | 872 | if (intel_gmbus_is_port_valid(child->i2c_pin)) |
2330 | Serge | 873 | *i2c_pin = child->i2c_pin; |
874 | |||
875 | /* However, we cannot trust the BIOS writers to populate |
||
876 | * the VBT correctly. Since LVDS requires additional |
||
877 | * information from AIM blocks, a non-zero addin offset is |
||
878 | * a good indicator that the LVDS is actually present. |
||
879 | */ |
||
880 | if (child->addin_offset) |
||
881 | return true; |
||
882 | |||
883 | /* But even then some BIOS writers perform some black magic |
||
884 | * and instantiate the device without reference to any |
||
885 | * additional data. Trust that if the VBT was written into |
||
886 | * the OpRegion then they have validated the LVDS's existence. |
||
887 | */ |
||
888 | if (dev_priv->opregion.vbt) |
||
889 | return true; |
||
890 | } |
||
891 | |||
892 | return false; |
||
893 | } |
||
894 | |||
3031 | serge | 895 | static bool intel_lvds_supported(struct drm_device *dev) |
896 | { |
||
897 | /* With the introduction of the PCH we gained a dedicated |
||
898 | * LVDS presence pin, use it. */ |
||
899 | if (HAS_PCH_SPLIT(dev)) |
||
900 | return true; |
||
901 | |||
902 | /* Otherwise LVDS was only attached to mobile products, |
||
903 | * except for the inglorious 830gm */ |
||
904 | return IS_MOBILE(dev) && !IS_I830(dev); |
||
905 | } |
||
906 | |||
2330 | Serge | 907 | /** |
908 | * intel_lvds_init - setup LVDS connectors on this device |
||
909 | * @dev: drm device |
||
910 | * |
||
911 | * Create the connector, register the LVDS DDC bus, and try to figure out what |
||
912 | * modes we can display on the LVDS panel (if present). |
||
913 | */ |
||
914 | bool intel_lvds_init(struct drm_device *dev) |
||
915 | { |
||
916 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
917 | struct intel_lvds *intel_lvds; |
||
918 | struct intel_encoder *intel_encoder; |
||
919 | struct intel_connector *intel_connector; |
||
920 | struct drm_connector *connector; |
||
921 | struct drm_encoder *encoder; |
||
922 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
||
923 | struct drm_crtc *crtc; |
||
924 | u32 lvds; |
||
925 | int pipe; |
||
926 | u8 pin; |
||
927 | |||
3031 | serge | 928 | if (!intel_lvds_supported(dev)) |
929 | return false; |
||
930 | |||
2330 | Serge | 931 | /* Skip init on machines we know falsely report LVDS */ |
932 | // if (dmi_check_system(intel_no_lvds)) |
||
933 | // return false; |
||
934 | |||
935 | pin = GMBUS_PORT_PANEL; |
||
936 | if (!lvds_is_present_in_vbt(dev, &pin)) { |
||
937 | DRM_DEBUG_KMS("LVDS is not present in VBT\n"); |
||
938 | return false; |
||
939 | } |
||
940 | |||
941 | if (HAS_PCH_SPLIT(dev)) { |
||
942 | if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) |
||
943 | return false; |
||
944 | if (dev_priv->edp.support) { |
||
945 | DRM_DEBUG_KMS("disable LVDS for eDP support\n"); |
||
946 | return false; |
||
947 | } |
||
948 | } |
||
949 | |||
950 | intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL); |
||
951 | if (!intel_lvds) { |
||
952 | return false; |
||
953 | } |
||
954 | |||
955 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); |
||
956 | if (!intel_connector) { |
||
957 | kfree(intel_lvds); |
||
958 | return false; |
||
959 | } |
||
960 | |||
961 | if (!HAS_PCH_SPLIT(dev)) { |
||
962 | intel_lvds->pfit_control = I915_READ(PFIT_CONTROL); |
||
963 | } |
||
964 | |||
965 | intel_encoder = &intel_lvds->base; |
||
966 | encoder = &intel_encoder->base; |
||
967 | connector = &intel_connector->base; |
||
968 | drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, |
||
969 | DRM_MODE_CONNECTOR_LVDS); |
||
970 | |||
971 | drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, |
||
972 | DRM_MODE_ENCODER_LVDS); |
||
973 | |||
3031 | serge | 974 | intel_encoder->enable = intel_enable_lvds; |
975 | intel_encoder->disable = intel_disable_lvds; |
||
976 | intel_encoder->get_hw_state = intel_lvds_get_hw_state; |
||
977 | intel_connector->get_hw_state = intel_connector_get_hw_state; |
||
978 | |||
2330 | Serge | 979 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
980 | intel_encoder->type = INTEL_OUTPUT_LVDS; |
||
981 | |||
3031 | serge | 982 | intel_encoder->cloneable = false; |
2342 | Serge | 983 | if (HAS_PCH_SPLIT(dev)) |
984 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
||
3031 | serge | 985 | else if (IS_GEN4(dev)) |
986 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
||
2342 | Serge | 987 | else |
2330 | Serge | 988 | intel_encoder->crtc_mask = (1 << 1); |
2342 | Serge | 989 | |
2330 | Serge | 990 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); |
991 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); |
||
992 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
||
993 | connector->interlace_allowed = false; |
||
994 | connector->doublescan_allowed = false; |
||
995 | |||
996 | /* create the scaling mode property */ |
||
997 | drm_mode_create_scaling_mode_property(dev); |
||
998 | /* |
||
999 | * the initial panel fitting mode will be FULL_SCREEN. |
||
1000 | */ |
||
1001 | |||
1002 | drm_connector_attach_property(&intel_connector->base, |
||
1003 | dev->mode_config.scaling_mode_property, |
||
1004 | DRM_MODE_SCALE_ASPECT); |
||
1005 | intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT; |
||
1006 | /* |
||
1007 | * LVDS discovery: |
||
1008 | * 1) check for EDID on DDC |
||
1009 | * 2) check for VBT data |
||
1010 | * 3) check to see if LVDS is already on |
||
1011 | * if none of the above, no panel |
||
1012 | * 4) make sure lid is open |
||
1013 | * if closed, act like it's not there for now |
||
1014 | */ |
||
1015 | |||
1016 | /* |
||
1017 | * Attempt to get the fixed panel mode from DDC. Assume that the |
||
1018 | * preferred mode is the right one. |
||
1019 | */ |
||
1020 | intel_lvds->edid = drm_get_edid(connector, |
||
3031 | serge | 1021 | intel_gmbus_get_adapter(dev_priv, |
1022 | pin)); |
||
2330 | Serge | 1023 | if (intel_lvds->edid) { |
1024 | if (drm_add_edid_modes(connector, |
||
1025 | intel_lvds->edid)) { |
||
1026 | drm_mode_connector_update_edid_property(connector, |
||
1027 | intel_lvds->edid); |
||
1028 | } else { |
||
1029 | kfree(intel_lvds->edid); |
||
1030 | intel_lvds->edid = NULL; |
||
1031 | } |
||
1032 | } |
||
1033 | if (!intel_lvds->edid) { |
||
1034 | /* Didn't get an EDID, so |
||
1035 | * Set wide sync ranges so we get all modes |
||
1036 | * handed to valid_mode for checking |
||
1037 | */ |
||
1038 | connector->display_info.min_vfreq = 0; |
||
1039 | connector->display_info.max_vfreq = 200; |
||
1040 | connector->display_info.min_hfreq = 0; |
||
1041 | connector->display_info.max_hfreq = 200; |
||
1042 | } |
||
1043 | |||
1044 | list_for_each_entry(scan, &connector->probed_modes, head) { |
||
1045 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { |
||
1046 | intel_lvds->fixed_mode = |
||
1047 | drm_mode_duplicate(dev, scan); |
||
1048 | intel_find_lvds_downclock(dev, |
||
1049 | intel_lvds->fixed_mode, |
||
1050 | connector); |
||
1051 | goto out; |
||
1052 | } |
||
1053 | } |
||
1054 | |||
1055 | /* Failed to get EDID, what about VBT? */ |
||
1056 | if (dev_priv->lfp_lvds_vbt_mode) { |
||
1057 | intel_lvds->fixed_mode = |
||
1058 | drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); |
||
1059 | if (intel_lvds->fixed_mode) { |
||
1060 | intel_lvds->fixed_mode->type |= |
||
1061 | DRM_MODE_TYPE_PREFERRED; |
||
1062 | goto out; |
||
1063 | } |
||
1064 | } |
||
1065 | |||
1066 | /* |
||
1067 | * If we didn't get EDID, try checking if the panel is already turned |
||
1068 | * on. If so, assume that whatever is currently programmed is the |
||
1069 | * correct mode. |
||
1070 | */ |
||
1071 | |||
1072 | /* Ironlake: FIXME if still fail, not try pipe mode now */ |
||
1073 | if (HAS_PCH_SPLIT(dev)) |
||
1074 | goto failed; |
||
1075 | |||
1076 | lvds = I915_READ(LVDS); |
||
1077 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; |
||
1078 | crtc = intel_get_crtc_for_pipe(dev, pipe); |
||
1079 | |||
1080 | if (crtc && (lvds & LVDS_PORT_EN)) { |
||
1081 | intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc); |
||
1082 | if (intel_lvds->fixed_mode) { |
||
1083 | intel_lvds->fixed_mode->type |= |
||
1084 | DRM_MODE_TYPE_PREFERRED; |
||
1085 | goto out; |
||
1086 | } |
||
1087 | } |
||
1088 | |||
1089 | /* If we still don't have a mode after all that, give up. */ |
||
1090 | if (!intel_lvds->fixed_mode) |
||
1091 | goto failed; |
||
1092 | |||
1093 | out: |
||
1094 | /* |
||
1095 | * Unlock registers and just |
||
1096 | * leave them unlocked |
||
1097 | */ |
||
3031 | serge | 1098 | if (HAS_PCH_SPLIT(dev)) { |
2330 | Serge | 1099 | I915_WRITE(PCH_PP_CONTROL, |
1100 | I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); |
||
1101 | } else { |
||
1102 | I915_WRITE(PP_CONTROL, |
||
1103 | I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); |
||
1104 | } |
||
1105 | // dev_priv->lid_notifier.notifier_call = intel_lid_notify; |
||
1106 | // if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) { |
||
1107 | // DRM_DEBUG_KMS("lid notifier registration failed\n"); |
||
1108 | // dev_priv->lid_notifier.notifier_call = NULL; |
||
1109 | // } |
||
1110 | /* keep the LVDS connector */ |
||
1111 | dev_priv->int_lvds_connector = connector; |
||
1112 | drm_sysfs_connector_add(connector); |
||
1113 | |||
1114 | intel_panel_setup_backlight(dev); |
||
1115 | |||
1116 | return true; |
||
1117 | |||
1118 | failed: |
||
1119 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); |
||
1120 | drm_connector_cleanup(connector); |
||
1121 | drm_encoder_cleanup(encoder); |
||
1122 | kfree(intel_lvds); |
||
1123 | kfree(intel_connector); |
||
1124 | return false; |
||
1125 | }><>><>><>><>><>><>>>>>><>><>>><>><>>><>>><> |