Subversion Repositories Kolibri OS

/*

 * Copyright © 2006-2007 Intel Corporation

 * Copyright (c) 2006 Dave Airlie 

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice (including the next

 * paragraph) shall be included in all copies or substantial portions of the

 * Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER

 * DEALINGS IN THE SOFTWARE.

 *

 * Authors:

 *	Eric Anholt 

 *      Dave Airlie 

 *      Jesse Barnes 

 */

//#include 

//#include 

#include 

#include 

#include "drmP.h"

#include "drm.h"

#include "drm_crtc.h"

#include "drm_edid.h"

#include "intel_drv.h"

#include "i915_drm.h"

#include "i915_drv.h"

//#include 

/* Private structure for the integrated LVDS support */

struct intel_lvds {

	struct intel_encoder base;

	struct edid *edid;

	int fitting_mode;

	u32 pfit_control;

	u32 pfit_pgm_ratios;

	bool pfit_dirty;

	struct drm_display_mode *fixed_mode;

};

static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)

{

	return container_of(encoder, struct intel_lvds, base.base);

}

static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)

{

	return container_of(intel_attached_encoder(connector),

			    struct intel_lvds, base);

}

/**

 * Sets the power state for the panel.

 */

static void intel_lvds_enable(struct intel_lvds *intel_lvds)

{

	struct drm_device *dev = intel_lvds->base.base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	u32 ctl_reg, lvds_reg, stat_reg;

	if (HAS_PCH_SPLIT(dev)) {

		ctl_reg = PCH_PP_CONTROL;

		lvds_reg = PCH_LVDS;

		stat_reg = PCH_PP_STATUS;

	} else {

		ctl_reg = PP_CONTROL;

		lvds_reg = LVDS;

		stat_reg = PP_STATUS;

	}

	I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);

	if (intel_lvds->pfit_dirty) {

		/*

		 * Enable automatic panel scaling so that non-native modes

		 * fill the screen.  The panel fitter should only be

		 * adjusted whilst the pipe is disabled, according to

		 * register description and PRM.

		 */

		DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",

			      intel_lvds->pfit_control,

			      intel_lvds->pfit_pgm_ratios);

		I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);

		I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);

		intel_lvds->pfit_dirty = false;

	}

	I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);

	POSTING_READ(lvds_reg);

	if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))

		DRM_ERROR("timed out waiting for panel to power on\n");

	intel_panel_enable_backlight(dev);

}

static void intel_lvds_disable(struct intel_lvds *intel_lvds)

{

	struct drm_device *dev = intel_lvds->base.base.dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	u32 ctl_reg, lvds_reg, stat_reg;

	if (HAS_PCH_SPLIT(dev)) {

		ctl_reg = PCH_PP_CONTROL;

		lvds_reg = PCH_LVDS;

		stat_reg = PCH_PP_STATUS;

	} else {

		ctl_reg = PP_CONTROL;

		lvds_reg = LVDS;

		stat_reg = PP_STATUS;

	}

	intel_panel_disable_backlight(dev);

	I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);

	if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))

		DRM_ERROR("timed out waiting for panel to power off\n");

	if (intel_lvds->pfit_control) {

		I915_WRITE(PFIT_CONTROL, 0);

		intel_lvds->pfit_dirty = true;

	}

	I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);

	POSTING_READ(lvds_reg);

}

static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)

{

	struct intel_lvds *intel_lvds = to_intel_lvds(encoder);

	if (mode == DRM_MODE_DPMS_ON)

		intel_lvds_enable(intel_lvds);

	else

		intel_lvds_disable(intel_lvds);

	/* XXX: We never power down the LVDS pairs. */

}

static int intel_lvds_mode_valid(struct drm_connector *connector,

				 struct drm_display_mode *mode)

{

	struct intel_lvds *intel_lvds = intel_attached_lvds(connector);

	struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;

	if (mode->hdisplay > fixed_mode->hdisplay)

		return MODE_PANEL;

	if (mode->vdisplay > fixed_mode->vdisplay)

		return MODE_PANEL;

	return MODE_OK;

}

static void

centre_horizontally(struct drm_display_mode *mode,

		    int width)

{

	u32 border, sync_pos, blank_width, sync_width;

	/* keep the hsync and hblank widths constant */

	sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;

	blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;

	sync_pos = (blank_width - sync_width + 1) / 2;

	border = (mode->hdisplay - width + 1) / 2;

	border += border & 1; /* make the border even */

	mode->crtc_hdisplay = width;

	mode->crtc_hblank_start = width + border;

	mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;

	mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;

	mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;

}

static void

centre_vertically(struct drm_display_mode *mode,

		  int height)

{

	u32 border, sync_pos, blank_width, sync_width;

	/* keep the vsync and vblank widths constant */

	sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;

	blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;

	sync_pos = (blank_width - sync_width + 1) / 2;

	border = (mode->vdisplay - height + 1) / 2;

	mode->crtc_vdisplay = height;

	mode->crtc_vblank_start = height + border;

	mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;

	mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;

	mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;

}

static inline u32 panel_fitter_scaling(u32 source, u32 target)

{

	/*

	 * Floating point operation is not supported. So the FACTOR

	 * is defined, which can avoid the floating point computation

	 * when calculating the panel ratio.

	 */

#define ACCURACY 12

#define FACTOR (1 << ACCURACY)

	u32 ratio = source * FACTOR / target;

	return (FACTOR * ratio + FACTOR/2) / FACTOR;

}

static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,

				  struct drm_display_mode *mode,

				  struct drm_display_mode *adjusted_mode)

{

	struct drm_device *dev = encoder->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);

	struct intel_lvds *intel_lvds = to_intel_lvds(encoder);

	struct drm_encoder *tmp_encoder;

	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;

	int pipe;

	/* Should never happen!! */

	if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {

		DRM_ERROR("Can't support LVDS on pipe A\n");

		return false;

	}

	/* Should never happen!! */

	list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {

		if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {

			DRM_ERROR("Can't enable LVDS and another "

			       "encoder on the same pipe\n");

			return false;

		}

	}

	/*

	 * We have timings from the BIOS for the panel, put them in

	 * to the adjusted mode.  The CRTC will be set up for this mode,

	 * with the panel scaling set up to source from the H/VDisplay

	 * of the original mode.

	 */

	intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);

	if (HAS_PCH_SPLIT(dev)) {

		intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,

					mode, adjusted_mode);

		return true;

	}

	/* Native modes don't need fitting */