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5354 | serge | 1 | /* |
2 | * Copyright © 2014 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
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21 | * DEALINGS IN THE SOFTWARE. |
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22 | */ |
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23 | |||
24 | #ifndef _INTEL_LRC_H_ |
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25 | #define _INTEL_LRC_H_ |
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26 | |||
27 | #define GEN8_LR_CONTEXT_ALIGN 4096 |
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28 | |||
29 | /* Execlists regs */ |
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30 | #define RING_ELSP(ring) ((ring)->mmio_base+0x230) |
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31 | #define RING_EXECLIST_STATUS(ring) ((ring)->mmio_base+0x234) |
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32 | #define RING_CONTEXT_CONTROL(ring) ((ring)->mmio_base+0x244) |
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33 | #define RING_CONTEXT_STATUS_BUF(ring) ((ring)->mmio_base+0x370) |
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34 | #define RING_CONTEXT_STATUS_PTR(ring) ((ring)->mmio_base+0x3a0) |
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35 | |||
36 | /* Logical Rings */ |
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37 | void intel_logical_ring_stop(struct intel_engine_cs *ring); |
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38 | void intel_logical_ring_cleanup(struct intel_engine_cs *ring); |
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39 | int intel_logical_rings_init(struct drm_device *dev); |
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40 | |||
41 | int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf); |
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42 | void intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf); |
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43 | /** |
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44 | * intel_logical_ring_advance() - advance the ringbuffer tail |
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45 | * @ringbuf: Ringbuffer to advance. |
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46 | * |
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47 | * The tail is only updated in our logical ringbuffer struct. |
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48 | */ |
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49 | static inline void intel_logical_ring_advance(struct intel_ringbuffer *ringbuf) |
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50 | { |
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51 | ringbuf->tail &= ringbuf->size - 1; |
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52 | } |
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53 | /** |
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54 | * intel_logical_ring_emit() - write a DWORD to the ringbuffer. |
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55 | * @ringbuf: Ringbuffer to write to. |
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56 | * @data: DWORD to write. |
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57 | */ |
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58 | static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf, |
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59 | u32 data) |
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60 | { |
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61 | iowrite32(data, ringbuf->virtual_start + ringbuf->tail); |
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62 | ringbuf->tail += 4; |
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63 | } |
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64 | int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords); |
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65 | |||
66 | /* Logical Ring Contexts */ |
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67 | int intel_lr_context_render_state_init(struct intel_engine_cs *ring, |
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68 | struct intel_context *ctx); |
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69 | void intel_lr_context_free(struct intel_context *ctx); |
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70 | int intel_lr_context_deferred_create(struct intel_context *ctx, |
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71 | struct intel_engine_cs *ring); |
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72 | void intel_lr_context_unpin(struct intel_engine_cs *ring, |
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73 | struct intel_context *ctx); |
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74 | |||
75 | /* Execlists */ |
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76 | int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists); |
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77 | int intel_execlists_submission(struct drm_device *dev, struct drm_file *file, |
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78 | struct intel_engine_cs *ring, |
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79 | struct intel_context *ctx, |
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80 | struct drm_i915_gem_execbuffer2 *args, |
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81 | struct list_head *vmas, |
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82 | struct drm_i915_gem_object *batch_obj, |
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83 | u64 exec_start, u32 flags); |
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84 | u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj); |
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85 | |||
86 | /** |
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87 | * struct intel_ctx_submit_request - queued context submission request |
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88 | * @ctx: Context to submit to the ELSP. |
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89 | * @ring: Engine to submit it to. |
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90 | * @tail: how far in the context's ringbuffer this request goes to. |
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91 | * @execlist_link: link in the submission queue. |
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92 | * @work: workqueue for processing this request in a bottom half. |
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93 | * @elsp_submitted: no. of times this request has been sent to the ELSP. |
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94 | * |
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95 | * The ELSP only accepts two elements at a time, so we queue context/tail |
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96 | * pairs on a given queue (ring->execlist_queue) until the hardware is |
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97 | * available. The queue serves a double purpose: we also use it to keep track |
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98 | * of the up to 2 contexts currently in the hardware (usually one in execution |
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99 | * and the other queued up by the GPU): We only remove elements from the head |
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100 | * of the queue when the hardware informs us that an element has been |
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101 | * completed. |
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102 | * |
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103 | * All accesses to the queue are mediated by a spinlock (ring->execlist_lock). |
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104 | */ |
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105 | struct intel_ctx_submit_request { |
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106 | struct intel_context *ctx; |
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107 | struct intel_engine_cs *ring; |
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108 | u32 tail; |
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109 | |||
110 | struct list_head execlist_link; |
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111 | |||
112 | int elsp_submitted; |
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113 | }; |
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114 | |||
115 | void intel_execlists_handle_ctx_events(struct intel_engine_cs *ring); |
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116 | void intel_execlists_retire_requests(struct intel_engine_cs *ring); |
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117 | |||
118 | #endif /* _INTEL_LRC_H_ */ |