WebSVN – Kolibri OS – Blame – /drivers/video/drm/i915/intel_guc.h

Rev	Author	Line No.	Line
6084	serge	1	/*
		2	* Copyright © 2014 Intel Corporation
		3	*
		4	* Permission is hereby granted, free of charge, to any person obtaining a
		5	* copy of this software and associated documentation files (the "Software"),
		6	* to deal in the Software without restriction, including without limitation
		7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
		8	* and/or sell copies of the Software, and to permit persons to whom the
		9	* Software is furnished to do so, subject to the following conditions:
		10	*
		11	* The above copyright notice and this permission notice (including the next
		12	* paragraph) shall be included in all copies or substantial portions of the
		13	* Software.
		14	*
		15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
		16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
		17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
		18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
		19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
		21	* IN THE SOFTWARE.
		22	*
		23	*/
		24	#ifndef _INTEL_GUC_H_
		25	#define _INTEL_GUC_H_
		26
		27	#include "intel_guc_fwif.h"
		28	#include "i915_guc_reg.h"
		29
		30	struct i915_guc_client {
		31	struct drm_i915_gem_object *client_obj;
		32	struct intel_context *owner;
		33	struct intel_guc *guc;
		34	uint32_t priority;
		35	uint32_t ctx_index;
		36
		37	uint32_t proc_desc_offset;
		38	uint32_t doorbell_offset;
		39	uint32_t cookie;
		40	uint16_t doorbell_id;
		41	uint16_t padding; /* Maintain alignment */
		42
		43	uint32_t wq_offset;
		44	uint32_t wq_size;
		45	uint32_t wq_tail;
		46
		47	/* GuC submission statistics & status */
		48	uint64_t submissions[I915_NUM_RINGS];
		49	uint32_t q_fail;
		50	uint32_t b_fail;
		51	int retcode;
		52	};
		53
		54	enum intel_guc_fw_status {
		55	GUC_FIRMWARE_FAIL = -1,
		56	GUC_FIRMWARE_NONE = 0,
		57	GUC_FIRMWARE_PENDING,
		58	GUC_FIRMWARE_SUCCESS
		59	};
		60
		61	/*
		62	* This structure encapsulates all the data needed during the process
		63	* of fetching, caching, and loading the firmware image into the GuC.
		64	*/
		65	struct intel_guc_fw {
		66	struct drm_device * guc_dev;
		67	const char * guc_fw_path;
		68	size_t guc_fw_size;
		69	struct drm_i915_gem_object * guc_fw_obj;
		70	enum intel_guc_fw_status guc_fw_fetch_status;
		71	enum intel_guc_fw_status guc_fw_load_status;
		72
		73	uint16_t guc_fw_major_wanted;
		74	uint16_t guc_fw_minor_wanted;
		75	uint16_t guc_fw_major_found;
		76	uint16_t guc_fw_minor_found;
6937	serge	77
		78	uint32_t header_size;
		79	uint32_t header_offset;
		80	uint32_t rsa_size;
		81	uint32_t rsa_offset;
		82	uint32_t ucode_size;
		83	uint32_t ucode_offset;
6084	serge	84	};
		85
		86	struct intel_guc {
		87	struct intel_guc_fw guc_fw;
		88	uint32_t log_flags;
		89	struct drm_i915_gem_object *log_obj;
		90
		91	struct drm_i915_gem_object *ctx_pool_obj;
		92	struct ida ctx_ids;
		93
		94	struct i915_guc_client *execbuf_client;
		95
		96	DECLARE_BITMAP(doorbell_bitmap, GUC_MAX_DOORBELLS);
		97	uint32_t db_cacheline; /* Cyclic counter mod pagesize */
		98
		99	/* Action status & statistics */
		100	uint64_t action_count; /* Total commands issued */
		101	uint32_t action_cmd; /* Last command word */
		102	uint32_t action_status; /* Last return status */
		103	uint32_t action_fail; /* Total number of failures */
		104	int32_t action_err; /* Last error code */
		105
		106	uint64_t submissions[I915_NUM_RINGS];
		107	uint32_t last_seqno[I915_NUM_RINGS];
		108	};
		109
		110	/* intel_guc_loader.c */
		111	extern void intel_guc_ucode_init(struct drm_device *dev);
		112	extern int intel_guc_ucode_load(struct drm_device *dev);
		113	extern void intel_guc_ucode_fini(struct drm_device *dev);
		114	extern const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status);
		115	extern int intel_guc_suspend(struct drm_device *dev);
		116	extern int intel_guc_resume(struct drm_device *dev);
		117
		118	/* i915_guc_submission.c */
		119	int i915_guc_submission_init(struct drm_device *dev);
		120	int i915_guc_submission_enable(struct drm_device *dev);
		121	int i915_guc_submit(struct i915_guc_client *client,
		122	struct drm_i915_gem_request *rq);
		123	void i915_guc_submission_disable(struct drm_device *dev);
		124	void i915_guc_submission_fini(struct drm_device *dev);
		125
		126	#endif

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(root)/drivers/video/drm/i915/intel_guc.h – Rev 6937