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2330 Serge 1
/*
2
 * Copyright 2006 Dave Airlie 
3
 * Copyright © 2006-2007 Intel Corporation
4
 *
5
 * Permission is hereby granted, free of charge, to any person obtaining a
6
 * copy of this software and associated documentation files (the "Software"),
7
 * to deal in the Software without restriction, including without limitation
8
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9
 * and/or sell copies of the Software, and to permit persons to whom the
10
 * Software is furnished to do so, subject to the following conditions:
11
 *
12
 * The above copyright notice and this permission notice (including the next
13
 * paragraph) shall be included in all copies or substantial portions of the
14
 * Software.
15
 *
16
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22
 * DEALINGS IN THE SOFTWARE.
23
 *
24
 * Authors:
25
 *	Eric Anholt 
26
 */
27
#include 
28
#include 
3031 serge 29
#include 
30
#include 
2330 Serge 31
#include "intel_drv.h"
3031 serge 32
#include 
2330 Serge 33
#include "i915_drv.h"
34
#include "dvo.h"
35
 
36
#define SIL164_ADDR	0x38
37
#define CH7xxx_ADDR	0x76
38
#define TFP410_ADDR	0x38
3031 serge 39
#define NS2501_ADDR     0x38
2330 Serge 40
 
41
static const struct intel_dvo_device intel_dvo_devices[] = {
42
	{
43
		.type = INTEL_DVO_CHIP_TMDS,
44
		.name = "sil164",
45
		.dvo_reg = DVOC,
46
		.slave_addr = SIL164_ADDR,
47
		.dev_ops = &sil164_ops,
48
	},
49
	{
50
		.type = INTEL_DVO_CHIP_TMDS,
51
		.name = "ch7xxx",
52
		.dvo_reg = DVOC,
53
		.slave_addr = CH7xxx_ADDR,
54
		.dev_ops = &ch7xxx_ops,
55
	},
56
	{
4104 Serge 57
		.type = INTEL_DVO_CHIP_TMDS,
58
		.name = "ch7xxx",
59
		.dvo_reg = DVOC,
60
		.slave_addr = 0x75, /* For some ch7010 */
61
		.dev_ops = &ch7xxx_ops,
62
	},
63
	{
2330 Serge 64
		.type = INTEL_DVO_CHIP_LVDS,
65
		.name = "ivch",
66
		.dvo_reg = DVOA,
67
		.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
68
		.dev_ops = &ivch_ops,
69
	},
70
	{
71
		.type = INTEL_DVO_CHIP_TMDS,
72
		.name = "tfp410",
73
		.dvo_reg = DVOC,
74
		.slave_addr = TFP410_ADDR,
75
		.dev_ops = &tfp410_ops,
76
	},
77
	{
78
		.type = INTEL_DVO_CHIP_LVDS,
79
		.name = "ch7017",
80
		.dvo_reg = DVOC,
81
		.slave_addr = 0x75,
82
		.gpio = GMBUS_PORT_DPB,
83
		.dev_ops = &ch7017_ops,
3031 serge 84
	},
85
	{
86
	        .type = INTEL_DVO_CHIP_TMDS,
87
		.name = "ns2501",
88
		.dvo_reg = DVOC,
89
		.slave_addr = NS2501_ADDR,
90
		.dev_ops = &ns2501_ops,
2330 Serge 91
	}
92
};
93
 
94
struct intel_dvo {
95
	struct intel_encoder base;
96
 
97
	struct intel_dvo_device dev;
98
 
99
	struct drm_display_mode *panel_fixed_mode;
100
	bool panel_wants_dither;
101
};
102
 
4104 Serge 103
static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
2330 Serge 104
{
4104 Serge 105
	return container_of(encoder, struct intel_dvo, base);
2330 Serge 106
}
107
 
108
static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
109
{
4104 Serge 110
	return enc_to_dvo(intel_attached_encoder(connector));
2330 Serge 111
}
112
 
3031 serge 113
static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
2330 Serge 114
{
3031 serge 115
	struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
116
 
117
	return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
118
}
119
 
120
static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
121
				   enum pipe *pipe)
122
{
123
	struct drm_device *dev = encoder->base.dev;
124
	struct drm_i915_private *dev_priv = dev->dev_private;
4104 Serge 125
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
3031 serge 126
	u32 tmp;
127
 
128
	tmp = I915_READ(intel_dvo->dev.dvo_reg);
129
 
130
	if (!(tmp & DVO_ENABLE))
131
		return false;
132
 
133
	*pipe = PORT_TO_PIPE(tmp);
134
 
135
	return true;
136
}
137
 
4104 Serge 138
static void intel_dvo_get_config(struct intel_encoder *encoder,
139
				 struct intel_crtc_config *pipe_config)
140
{
141
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
142
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
143
	u32 tmp, flags = 0;
144
 
145
	tmp = I915_READ(intel_dvo->dev.dvo_reg);
146
	if (tmp & DVO_HSYNC_ACTIVE_HIGH)
147
		flags |= DRM_MODE_FLAG_PHSYNC;
148
	else
149
		flags |= DRM_MODE_FLAG_NHSYNC;
150
	if (tmp & DVO_VSYNC_ACTIVE_HIGH)
151
		flags |= DRM_MODE_FLAG_PVSYNC;
152
	else
153
		flags |= DRM_MODE_FLAG_NVSYNC;
154
 
155
	pipe_config->adjusted_mode.flags |= flags;
156
}
157
 
3031 serge 158
static void intel_disable_dvo(struct intel_encoder *encoder)
159
{
160
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
4104 Serge 161
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
2330 Serge 162
	u32 dvo_reg = intel_dvo->dev.dvo_reg;
163
	u32 temp = I915_READ(dvo_reg);
164
 
3031 serge 165
	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
166
	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
167
	I915_READ(dvo_reg);
168
}
169
 
170
static void intel_enable_dvo(struct intel_encoder *encoder)
171
{
172
	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
4104 Serge 173
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
4398 Serge 174
	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
3031 serge 175
	u32 dvo_reg = intel_dvo->dev.dvo_reg;
176
	u32 temp = I915_READ(dvo_reg);
177
 
2330 Serge 178
		I915_WRITE(dvo_reg, temp | DVO_ENABLE);
179
		I915_READ(dvo_reg);
4398 Serge 180
	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
181
					 &crtc->config.requested_mode,
182
					 &crtc->config.adjusted_mode);
183
 
3031 serge 184
	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
185
}
186
 
4104 Serge 187
/* Special dpms function to support cloning between dvo/sdvo/crt. */
3031 serge 188
static void intel_dvo_dpms(struct drm_connector *connector, int mode)
189
{
190
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
191
	struct drm_crtc *crtc;
4398 Serge 192
	struct intel_crtc_config *config;
3031 serge 193
 
194
	/* dvo supports only 2 dpms states. */
195
	if (mode != DRM_MODE_DPMS_ON)
196
		mode = DRM_MODE_DPMS_OFF;
197
 
198
	if (mode == connector->dpms)
199
		return;
200
 
201
	connector->dpms = mode;
202
 
203
	/* Only need to change hw state when actually enabled */
204
	crtc = intel_dvo->base.base.crtc;
205
	if (!crtc) {
206
		intel_dvo->base.connectors_active = false;
207
		return;
208
	}
209
 
4104 Serge 210
	/* We call connector dpms manually below in case pipe dpms doesn't
211
	 * change due to cloning. */
3031 serge 212
	if (mode == DRM_MODE_DPMS_ON) {
4398 Serge 213
		config = &to_intel_crtc(crtc)->config;
214
 
3031 serge 215
		intel_dvo->base.connectors_active = true;
216
 
217
		intel_crtc_update_dpms(crtc);
218
 
4398 Serge 219
		intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
220
						 &config->requested_mode,
221
						 &config->adjusted_mode);
222
 
3031 serge 223
		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
2330 Serge 224
	} else {
3031 serge 225
		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
226
 
227
		intel_dvo->base.connectors_active = false;
228
 
229
		intel_crtc_update_dpms(crtc);
2330 Serge 230
	}
3031 serge 231
 
232
	intel_modeset_check_state(connector->dev);
2330 Serge 233
}
234
 
235
static int intel_dvo_mode_valid(struct drm_connector *connector,
236
				struct drm_display_mode *mode)
237
{
238
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
239
 
240
	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
241
		return MODE_NO_DBLESCAN;
242
 
243
	/* XXX: Validate clock range */
244
 
245
	if (intel_dvo->panel_fixed_mode) {
246
		if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
247
			return MODE_PANEL;
248
		if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
249
			return MODE_PANEL;
250
	}
251
 
252
	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
253
}
254
 
4104 Serge 255
static bool intel_dvo_compute_config(struct intel_encoder *encoder,
256
				     struct intel_crtc_config *pipe_config)
2330 Serge 257
{
4104 Serge 258
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
259
	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
2330 Serge 260
 
261
	/* If we have timings from the BIOS for the panel, put them in
262
	 * to the adjusted mode.  The CRTC will be set up for this mode,
263
	 * with the panel scaling set up to source from the H/VDisplay
264
	 * of the original mode.
265
	 */
266
	if (intel_dvo->panel_fixed_mode != NULL) {
267
#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
268
		C(hdisplay);
269
		C(hsync_start);
270
		C(hsync_end);
271
		C(htotal);
272
		C(vdisplay);
273
		C(vsync_start);
274
		C(vsync_end);
275
		C(vtotal);
276
		C(clock);
277
#undef C
4104 Serge 278
 
279
		drm_mode_set_crtcinfo(adjusted_mode, 0);
2330 Serge 280
	}
281
 
282
	if (intel_dvo->dev.dev_ops->mode_fixup)
4104 Serge 283
		return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev,
284
							  &pipe_config->requested_mode,
285
							  adjusted_mode);
2330 Serge 286
 
287
	return true;
288
}
289
 
4104 Serge 290
static void intel_dvo_mode_set(struct intel_encoder *encoder)
2330 Serge 291
{
4104 Serge 292
	struct drm_device *dev = encoder->base.dev;
2330 Serge 293
	struct drm_i915_private *dev_priv = dev->dev_private;
4104 Serge 294
	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
295
	struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
296
	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
297
	int pipe = crtc->pipe;
2330 Serge 298
	u32 dvo_val;
299
	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
300
 
301
	switch (dvo_reg) {
302
	case DVOA:
303
	default:
304
		dvo_srcdim_reg = DVOA_SRCDIM;
305
		break;
306
	case DVOB:
307
		dvo_srcdim_reg = DVOB_SRCDIM;
308
		break;
309
	case DVOC:
310
		dvo_srcdim_reg = DVOC_SRCDIM;
311
		break;
312
	}
313
 
314
	/* Save the data order, since I don't know what it should be set to. */
315
	dvo_val = I915_READ(dvo_reg) &
316
		  (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
317
	dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
318
		   DVO_BLANK_ACTIVE_HIGH;
319
 
320
	if (pipe == 1)
321
		dvo_val |= DVO_PIPE_B_SELECT;
322
	dvo_val |= DVO_PIPE_STALL;
323
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
324
		dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
325
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
326
		dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
327
 
328
	/*I915_WRITE(DVOB_SRCDIM,
329
	  (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
330
	  (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
331
	I915_WRITE(dvo_srcdim_reg,
332
		   (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
333
		   (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
334
	/*I915_WRITE(DVOB, dvo_val);*/
335
	I915_WRITE(dvo_reg, dvo_val);
336
}
337
 
338
/**
339
 * Detect the output connection on our DVO device.
340
 *
341
 * Unimplemented.
342
 */
343
static enum drm_connector_status
344
intel_dvo_detect(struct drm_connector *connector, bool force)
345
{
346
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
4104 Serge 347
	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
348
		      connector->base.id, drm_get_connector_name(connector));
2330 Serge 349
	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
350
}
351
 
352
static int intel_dvo_get_modes(struct drm_connector *connector)
353
{
354
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
355
	struct drm_i915_private *dev_priv = connector->dev->dev_private;
356
 
357
	/* We should probably have an i2c driver get_modes function for those
358
	 * devices which will have a fixed set of modes determined by the chip
359
	 * (TV-out, for example), but for now with just TMDS and LVDS,
360
	 * that's not the case.
361
	 */
362
	intel_ddc_get_modes(connector,
3031 serge 363
			    intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
2330 Serge 364
	if (!list_empty(&connector->probed_modes))
365
		return 1;
366
 
367
	if (intel_dvo->panel_fixed_mode != NULL) {
368
		struct drm_display_mode *mode;
369
		mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
370
		if (mode) {
371
			drm_mode_probed_add(connector, mode);
372
			return 1;
373
		}
374
	}
375
 
376
	return 0;
377
}
378
 
379
static void intel_dvo_destroy(struct drm_connector *connector)
380
{
381
	drm_sysfs_connector_remove(connector);
382
	drm_connector_cleanup(connector);
383
	kfree(connector);
384
}
385
 
386
static const struct drm_connector_funcs intel_dvo_connector_funcs = {
3031 serge 387
	.dpms = intel_dvo_dpms,
2330 Serge 388
	.detect = intel_dvo_detect,
389
	.destroy = intel_dvo_destroy,
390
	.fill_modes = drm_helper_probe_single_connector_modes,
391
};
392
 
393
static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
394
	.mode_valid = intel_dvo_mode_valid,
395
	.get_modes = intel_dvo_get_modes,
396
	.best_encoder = intel_best_encoder,
397
};
398
 
399
static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
400
{
4104 Serge 401
	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
2330 Serge 402
 
403
	if (intel_dvo->dev.dev_ops->destroy)
404
		intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
405
 
406
	kfree(intel_dvo->panel_fixed_mode);
407
 
408
	intel_encoder_destroy(encoder);
409
}
410
 
411
static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
412
	.destroy = intel_dvo_enc_destroy,
413
};
414
 
415
/**
416
 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
417
 *
418
 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
419
 * chip being on DVOB/C and having multiple pipes.
420
 */
421
static struct drm_display_mode *
422
intel_dvo_get_current_mode(struct drm_connector *connector)
423
{
424
	struct drm_device *dev = connector->dev;
425
	struct drm_i915_private *dev_priv = dev->dev_private;
426
	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
427
	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
428
	struct drm_display_mode *mode = NULL;
429
 
430
	/* If the DVO port is active, that'll be the LVDS, so we can pull out
431
	 * its timings to get how the BIOS set up the panel.
432
	 */
433
	if (dvo_val & DVO_ENABLE) {
434
		struct drm_crtc *crtc;
435
		int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
436
 
437
		crtc = intel_get_crtc_for_pipe(dev, pipe);
438
		if (crtc) {
439
			mode = intel_crtc_mode_get(dev, crtc);
440
			if (mode) {
441
				mode->type |= DRM_MODE_TYPE_PREFERRED;
442
				if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
443
					mode->flags |= DRM_MODE_FLAG_PHSYNC;
444
				if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
445
					mode->flags |= DRM_MODE_FLAG_PVSYNC;
446
			}
447
		}
448
	}
449
 
450
	return mode;
451
}
452
 
453
void intel_dvo_init(struct drm_device *dev)
454
{
455
	struct drm_i915_private *dev_priv = dev->dev_private;
456
	struct intel_encoder *intel_encoder;
457
	struct intel_dvo *intel_dvo;
458
	struct intel_connector *intel_connector;
459
	int i;
460
	int encoder_type = DRM_MODE_ENCODER_NONE;
461
 
462
	intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
463
	if (!intel_dvo)
464
		return;
465
 
466
	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
467
	if (!intel_connector) {
468
		kfree(intel_dvo);
469
		return;
470
	}
471
 
472
	intel_encoder = &intel_dvo->base;
473
	drm_encoder_init(dev, &intel_encoder->base,
474
			 &intel_dvo_enc_funcs, encoder_type);
475
 
3031 serge 476
	intel_encoder->disable = intel_disable_dvo;
477
	intel_encoder->enable = intel_enable_dvo;
478
	intel_encoder->get_hw_state = intel_dvo_get_hw_state;
4104 Serge 479
	intel_encoder->get_config = intel_dvo_get_config;
480
	intel_encoder->compute_config = intel_dvo_compute_config;
481
	intel_encoder->mode_set = intel_dvo_mode_set;
3031 serge 482
	intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
483
 
2330 Serge 484
	/* Now, try to find a controller */
485
	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
486
		struct drm_connector *connector = &intel_connector->base;
487
		const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
488
		struct i2c_adapter *i2c;
489
		int gpio;
3746 Serge 490
		bool dvoinit;
2330 Serge 491
 
492
		/* Allow the I2C driver info to specify the GPIO to be used in
493
		 * special cases, but otherwise default to what's defined
494
		 * in the spec.
495
		 */
3031 serge 496
		if (intel_gmbus_is_port_valid(dvo->gpio))
2330 Serge 497
			gpio = dvo->gpio;
498
		else if (dvo->type == INTEL_DVO_CHIP_LVDS)
499
			gpio = GMBUS_PORT_SSC;
500
		else
501
			gpio = GMBUS_PORT_DPB;
502
 
503
		/* Set up the I2C bus necessary for the chip we're probing.
504
		 * It appears that everything is on GPIOE except for panels
505
		 * on i830 laptops, which are on GPIOB (DVOA).
506
		 */
3031 serge 507
		i2c = intel_gmbus_get_adapter(dev_priv, gpio);
2330 Serge 508
 
509
		intel_dvo->dev = *dvo;
3746 Serge 510
 
511
		/* GMBUS NAK handling seems to be unstable, hence let the
512
		 * transmitter detection run in bit banging mode for now.
513
		 */
514
		intel_gmbus_force_bit(i2c, true);
515
 
516
		dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
517
 
518
		intel_gmbus_force_bit(i2c, false);
519
 
520
		if (!dvoinit)
2330 Serge 521
			continue;
522
 
523
		intel_encoder->type = INTEL_OUTPUT_DVO;
524
		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
525
		switch (dvo->type) {
526
		case INTEL_DVO_CHIP_TMDS:
3031 serge 527
			intel_encoder->cloneable = true;
2330 Serge 528
			drm_connector_init(dev, connector,
529
					   &intel_dvo_connector_funcs,
530
					   DRM_MODE_CONNECTOR_DVII);
531
			encoder_type = DRM_MODE_ENCODER_TMDS;
532
			break;
533
		case INTEL_DVO_CHIP_LVDS:
3031 serge 534
			intel_encoder->cloneable = false;
2330 Serge 535
			drm_connector_init(dev, connector,
536
					   &intel_dvo_connector_funcs,
537
					   DRM_MODE_CONNECTOR_LVDS);
538
			encoder_type = DRM_MODE_ENCODER_LVDS;
539
			break;
540
		}
541
 
542
		drm_connector_helper_add(connector,
543
					 &intel_dvo_connector_helper_funcs);
544
		connector->display_info.subpixel_order = SubPixelHorizontalRGB;
545
		connector->interlace_allowed = false;
546
		connector->doublescan_allowed = false;
547
 
548
		intel_connector_attach_encoder(intel_connector, intel_encoder);
549
		if (dvo->type == INTEL_DVO_CHIP_LVDS) {
550
			/* For our LVDS chipsets, we should hopefully be able
551
			 * to dig the fixed panel mode out of the BIOS data.
552
			 * However, it's in a different format from the BIOS
553
			 * data on chipsets with integrated LVDS (stored in AIM
554
			 * headers, likely), so for now, just get the current
555
			 * mode being output through DVO.
556
			 */
557
			intel_dvo->panel_fixed_mode =
558
				intel_dvo_get_current_mode(connector);
559
			intel_dvo->panel_wants_dither = true;
560
		}
561
 
562
		drm_sysfs_connector_add(connector);
563
		return;
564
	}
565
 
566
	drm_encoder_cleanup(&intel_encoder->base);
567
	kfree(intel_dvo);
568
	kfree(intel_connector);
569
}