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4560 | Serge | 1 | /* |
2 | * Copyright © 2013 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
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21 | * DEALINGS IN THE SOFTWARE. |
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22 | */ |
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23 | |||
24 | #ifndef _INTEL_DSI_H |
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25 | #define _INTEL_DSI_H |
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26 | |||
27 | #include |
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28 | #include |
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6084 | serge | 29 | #include |
4560 | Serge | 30 | #include "intel_drv.h" |
31 | |||
6084 | serge | 32 | /* Dual Link support */ |
33 | #define DSI_DUAL_LINK_NONE 0 |
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34 | #define DSI_DUAL_LINK_FRONT_BACK 1 |
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35 | #define DSI_DUAL_LINK_PIXEL_ALT 2 |
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4560 | Serge | 36 | |
7144 | serge | 37 | int dsi_pixel_format_bpp(int pixel_format); |
38 | |||
6084 | serge | 39 | struct intel_dsi_host; |
4560 | Serge | 40 | |
41 | struct intel_dsi { |
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42 | struct intel_encoder base; |
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43 | |||
6084 | serge | 44 | struct drm_panel *panel; |
45 | struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS]; |
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4560 | Serge | 46 | |
6084 | serge | 47 | /* GPIO Desc for CRC based Panel control */ |
48 | struct gpio_desc *gpio_panel; |
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49 | |||
4560 | Serge | 50 | struct intel_connector *attached_connector; |
51 | |||
6084 | serge | 52 | /* bit mask of ports being driven */ |
53 | u16 ports; |
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54 | |||
4560 | Serge | 55 | /* if true, use HS mode, otherwise LP */ |
56 | bool hs; |
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57 | |||
58 | /* virtual channel */ |
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59 | int channel; |
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60 | |||
5060 | serge | 61 | /* Video mode or command mode */ |
62 | u16 operation_mode; |
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63 | |||
4560 | Serge | 64 | /* number of DSI lanes */ |
65 | unsigned int lane_count; |
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66 | |||
67 | /* video mode pixel format for MIPI_DSI_FUNC_PRG register */ |
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68 | u32 pixel_format; |
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69 | |||
70 | /* video mode format for MIPI_VIDEO_MODE_FORMAT register */ |
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71 | u32 video_mode_format; |
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72 | |||
73 | /* eot for MIPI_EOT_DISABLE register */ |
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5060 | serge | 74 | u8 eotp_pkt; |
75 | u8 clock_stop; |
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4560 | Serge | 76 | |
5060 | serge | 77 | u8 escape_clk_div; |
6084 | serge | 78 | u8 dual_link; |
79 | u8 pixel_overlap; |
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4560 | Serge | 80 | u32 port_bits; |
81 | u32 bw_timer; |
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82 | u32 dphy_reg; |
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83 | u32 video_frmt_cfg_bits; |
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84 | u16 lp_byte_clk; |
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85 | |||
86 | /* timeouts in byte clocks */ |
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87 | u16 lp_rx_timeout; |
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88 | u16 turn_arnd_val; |
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89 | u16 rst_timer_val; |
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90 | u16 hs_to_lp_count; |
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91 | u16 clk_lp_to_hs_count; |
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92 | u16 clk_hs_to_lp_count; |
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5060 | serge | 93 | |
94 | u16 init_count; |
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5354 | serge | 95 | u32 pclk; |
96 | u16 burst_mode_ratio; |
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5060 | serge | 97 | |
98 | /* all delays in ms */ |
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99 | u16 backlight_off_delay; |
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100 | u16 backlight_on_delay; |
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101 | u16 panel_on_delay; |
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102 | u16 panel_off_delay; |
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103 | u16 panel_pwr_cycle_delay; |
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4560 | Serge | 104 | }; |
105 | |||
6084 | serge | 106 | struct intel_dsi_host { |
107 | struct mipi_dsi_host base; |
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108 | struct intel_dsi *intel_dsi; |
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109 | enum port port; |
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110 | |||
111 | /* our little hack */ |
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112 | struct mipi_dsi_device *device; |
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113 | }; |
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114 | |||
115 | static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h) |
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116 | { |
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117 | return container_of(h, struct intel_dsi_host, base); |
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118 | } |
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119 | |||
120 | #define for_each_dsi_port(__port, __ports_mask) \ |
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121 | for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++) \ |
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6937 | serge | 122 | for_each_if ((__ports_mask) & (1 << (__port))) |
6084 | serge | 123 | |
4560 | Serge | 124 | static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder) |
125 | { |
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126 | return container_of(encoder, struct intel_dsi, base.base); |
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127 | } |
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128 | |||
6084 | serge | 129 | extern void intel_enable_dsi_pll(struct intel_encoder *encoder); |
130 | extern void intel_disable_dsi_pll(struct intel_encoder *encoder); |
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7144 | serge | 131 | extern u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp); |
6084 | serge | 132 | extern void intel_dsi_reset_clocks(struct intel_encoder *encoder, |
133 | enum port port); |
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4560 | Serge | 134 | |
6084 | serge | 135 | struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id); |
5060 | serge | 136 | |
4560 | Serge | 137 | #endif /* _INTEL_DSI_H */><>> |