Rev 3031 | Rev 3480 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
3031 | serge | 1 | /* |
2 | * Copyright © 2011-2012 Intel Corporation |
||
3 | * |
||
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
||
5 | * copy of this software and associated documentation files (the "Software"), |
||
6 | * to deal in the Software without restriction, including without limitation |
||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
||
8 | * and/or sell copies of the Software, and to permit persons to whom the |
||
9 | * Software is furnished to do so, subject to the following conditions: |
||
10 | * |
||
11 | * The above copyright notice and this permission notice (including the next |
||
12 | * paragraph) shall be included in all copies or substantial portions of the |
||
13 | * Software. |
||
14 | * |
||
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
||
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
||
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
||
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
||
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
||
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
||
21 | * IN THE SOFTWARE. |
||
22 | * |
||
23 | * Authors: |
||
24 | * Ben Widawsky |
||
25 | * |
||
26 | */ |
||
27 | |||
28 | /* |
||
29 | * This file implements HW context support. On gen5+ a HW context consists of an |
||
30 | * opaque GPU object which is referenced at times of context saves and restores. |
||
31 | * With RC6 enabled, the context is also referenced as the GPU enters and exists |
||
32 | * from RC6 (GPU has it's own internal power context, except on gen5). Though |
||
33 | * something like a context does exist for the media ring, the code only |
||
34 | * supports contexts for the render ring. |
||
35 | * |
||
36 | * In software, there is a distinction between contexts created by the user, |
||
37 | * and the default HW context. The default HW context is used by GPU clients |
||
38 | * that do not request setup of their own hardware context. The default |
||
39 | * context's state is never restored to help prevent programming errors. This |
||
40 | * would happen if a client ran and piggy-backed off another clients GPU state. |
||
41 | * The default context only exists to give the GPU some offset to load as the |
||
42 | * current to invoke a save of the context we actually care about. In fact, the |
||
43 | * code could likely be constructed, albeit in a more complicated fashion, to |
||
44 | * never use the default context, though that limits the driver's ability to |
||
45 | * swap out, and/or destroy other contexts. |
||
46 | * |
||
47 | * All other contexts are created as a request by the GPU client. These contexts |
||
48 | * store GPU state, and thus allow GPU clients to not re-emit state (and |
||
49 | * potentially query certain state) at any time. The kernel driver makes |
||
50 | * certain that the appropriate commands are inserted. |
||
51 | * |
||
52 | * The context life cycle is semi-complicated in that context BOs may live |
||
53 | * longer than the context itself because of the way the hardware, and object |
||
54 | * tracking works. Below is a very crude representation of the state machine |
||
55 | * describing the context life. |
||
56 | * refcount pincount active |
||
57 | * S0: initial state 0 0 0 |
||
58 | * S1: context created 1 0 0 |
||
59 | * S2: context is currently running 2 1 X |
||
60 | * S3: GPU referenced, but not current 2 0 1 |
||
61 | * S4: context is current, but destroyed 1 1 0 |
||
62 | * S5: like S3, but destroyed 1 0 1 |
||
63 | * |
||
64 | * The most common (but not all) transitions: |
||
65 | * S0->S1: client creates a context |
||
66 | * S1->S2: client submits execbuf with context |
||
67 | * S2->S3: other clients submits execbuf with context |
||
68 | * S3->S1: context object was retired |
||
69 | * S3->S2: clients submits another execbuf |
||
70 | * S2->S4: context destroy called with current context |
||
71 | * S3->S5->S0: destroy path |
||
72 | * S4->S5->S0: destroy path on current context |
||
73 | * |
||
74 | * There are two confusing terms used above: |
||
75 | * The "current context" means the context which is currently running on the |
||
76 | * GPU. The GPU has loaded it's state already and has stored away the gtt |
||
77 | * offset of the BO. The GPU is not actively referencing the data at this |
||
78 | * offset, but it will on the next context switch. The only way to avoid this |
||
79 | * is to do a GPU reset. |
||
80 | * |
||
81 | * An "active context' is one which was previously the "current context" and is |
||
82 | * on the active list waiting for the next context switch to occur. Until this |
||
83 | * happens, the object must remain at the same gtt offset. It is therefore |
||
84 | * possible to destroy a context, but it is still active. |
||
85 | * |
||
86 | */ |
||
87 | |||
88 | #include |
||
89 | #include |
||
90 | #include "i915_drv.h" |
||
91 | |||
92 | /* This is a HW constraint. The value below is the largest known requirement |
||
93 | * I've seen in a spec to date, and that was a workaround for a non-shipping |
||
94 | * part. It should be safe to decrease this, but it's more future proof as is. |
||
95 | */ |
||
96 | #define CONTEXT_ALIGN (64<<10) |
||
97 | |||
98 | #if 0 |
||
99 | |||
100 | static struct i915_hw_context * |
||
101 | i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id); |
||
102 | static int do_switch(struct i915_hw_context *to); |
||
103 | |||
104 | static int get_context_size(struct drm_device *dev) |
||
105 | { |
||
106 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
107 | int ret; |
||
108 | u32 reg; |
||
109 | |||
110 | switch (INTEL_INFO(dev)->gen) { |
||
111 | case 6: |
||
112 | reg = I915_READ(CXT_SIZE); |
||
113 | ret = GEN6_CXT_TOTAL_SIZE(reg) * 64; |
||
114 | break; |
||
115 | case 7: |
||
116 | reg = I915_READ(GEN7_CXT_SIZE); |
||
117 | if (IS_HASWELL(dev)) |
||
118 | ret = HSW_CXT_TOTAL_SIZE(reg) * 64; |
||
119 | else |
||
120 | ret = GEN7_CXT_TOTAL_SIZE(reg) * 64; |
||
121 | break; |
||
122 | default: |
||
123 | BUG(); |
||
124 | } |
||
125 | |||
126 | return ret; |
||
127 | } |
||
128 | |||
129 | static void do_destroy(struct i915_hw_context *ctx) |
||
130 | { |
||
131 | struct drm_device *dev = ctx->obj->base.dev; |
||
132 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
133 | |||
134 | if (ctx->file_priv) |
||
135 | idr_remove(&ctx->file_priv->context_idr, ctx->id); |
||
136 | else |
||
137 | BUG_ON(ctx != dev_priv->ring[RCS].default_context); |
||
138 | |||
139 | drm_gem_object_unreference(&ctx->obj->base); |
||
140 | kfree(ctx); |
||
141 | } |
||
142 | |||
143 | static struct i915_hw_context * |
||
144 | create_hw_context(struct drm_device *dev, |
||
145 | struct drm_i915_file_private *file_priv) |
||
146 | { |
||
147 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
148 | struct i915_hw_context *ctx; |
||
149 | int ret, id; |
||
150 | |||
3243 | Serge | 151 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); |
3031 | serge | 152 | if (ctx == NULL) |
153 | return ERR_PTR(-ENOMEM); |
||
154 | |||
155 | ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size); |
||
156 | if (ctx->obj == NULL) { |
||
157 | kfree(ctx); |
||
158 | DRM_DEBUG_DRIVER("Context object allocated failed\n"); |
||
159 | return ERR_PTR(-ENOMEM); |
||
160 | } |
||
161 | |||
162 | /* The ring associated with the context object is handled by the normal |
||
163 | * object tracking code. We give an initial ring value simple to pass an |
||
164 | * assertion in the context switch code. |
||
165 | */ |
||
166 | ctx->ring = &dev_priv->ring[RCS]; |
||
167 | |||
168 | /* Default context will never have a file_priv */ |
||
169 | if (file_priv == NULL) |
||
170 | return ctx; |
||
171 | |||
172 | ctx->file_priv = file_priv; |
||
173 | |||
174 | again: |
||
175 | if (idr_pre_get(&file_priv->context_idr, GFP_KERNEL) == 0) { |
||
176 | ret = -ENOMEM; |
||
177 | DRM_DEBUG_DRIVER("idr allocation failed\n"); |
||
178 | goto err_out; |
||
179 | } |
||
180 | |||
181 | ret = idr_get_new_above(&file_priv->context_idr, ctx, |
||
182 | DEFAULT_CONTEXT_ID + 1, &id); |
||
183 | if (ret == 0) |
||
184 | ctx->id = id; |
||
185 | |||
186 | if (ret == -EAGAIN) |
||
187 | goto again; |
||
188 | else if (ret) |
||
189 | goto err_out; |
||
190 | |||
191 | return ctx; |
||
192 | |||
193 | err_out: |
||
194 | do_destroy(ctx); |
||
195 | return ERR_PTR(ret); |
||
196 | } |
||
197 | |||
198 | static inline bool is_default_context(struct i915_hw_context *ctx) |
||
199 | { |
||
200 | return (ctx == ctx->ring->default_context); |
||
201 | } |
||
202 | |||
203 | /** |
||
204 | * The default context needs to exist per ring that uses contexts. It stores the |
||
205 | * context state of the GPU for applications that don't utilize HW contexts, as |
||
206 | * well as an idle case. |
||
207 | */ |
||
208 | static int create_default_context(struct drm_i915_private *dev_priv) |
||
209 | { |
||
210 | struct i915_hw_context *ctx; |
||
211 | int ret; |
||
212 | |||
213 | BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex)); |
||
214 | |||
215 | ctx = create_hw_context(dev_priv->dev, NULL); |
||
216 | if (IS_ERR(ctx)) |
||
217 | return PTR_ERR(ctx); |
||
218 | |||
219 | /* We may need to do things with the shrinker which require us to |
||
220 | * immediately switch back to the default context. This can cause a |
||
221 | * problem as pinning the default context also requires GTT space which |
||
222 | * may not be available. To avoid this we always pin the |
||
223 | * default context. |
||
224 | */ |
||
225 | dev_priv->ring[RCS].default_context = ctx; |
||
226 | ret = i915_gem_object_pin(ctx->obj, CONTEXT_ALIGN, false, false); |
||
227 | if (ret) |
||
228 | goto err_destroy; |
||
229 | |||
230 | ret = do_switch(ctx); |
||
231 | if (ret) |
||
232 | goto err_unpin; |
||
233 | |||
234 | DRM_DEBUG_DRIVER("Default HW context loaded\n"); |
||
235 | return 0; |
||
236 | |||
237 | err_unpin: |
||
238 | i915_gem_object_unpin(ctx->obj); |
||
239 | err_destroy: |
||
240 | do_destroy(ctx); |
||
241 | return ret; |
||
242 | } |
||
243 | #endif |
||
244 | |||
245 | void i915_gem_context_init(struct drm_device *dev) |
||
246 | { |
||
247 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
248 | uint32_t ctx_size; |
||
249 | |||
250 | dev_priv->hw_contexts_disabled = true; |
||
251 | return; |
||
252 | |||
253 | #if 0 |
||
254 | if (!HAS_HW_CONTEXTS(dev)) { |
||
255 | dev_priv->hw_contexts_disabled = true; |
||
256 | return; |
||
257 | } |
||
258 | |||
259 | /* If called from reset, or thaw... we've been here already */ |
||
260 | if (dev_priv->hw_contexts_disabled || |
||
261 | dev_priv->ring[RCS].default_context) |
||
262 | return; |
||
263 | |||
264 | ctx_size = get_context_size(dev); |
||
265 | dev_priv->hw_context_size = get_context_size(dev); |
||
266 | dev_priv->hw_context_size = round_up(dev_priv->hw_context_size, 4096); |
||
267 | |||
268 | if (ctx_size <= 0 || ctx_size > (1<<20)) { |
||
269 | dev_priv->hw_contexts_disabled = true; |
||
270 | return; |
||
271 | } |
||
272 | |||
273 | if (create_default_context(dev_priv)) { |
||
274 | dev_priv->hw_contexts_disabled = true; |
||
275 | return; |
||
276 | } |
||
277 | |||
278 | DRM_DEBUG_DRIVER("HW context support initialized\n"); |
||
279 | #endif |
||
280 | |||
281 | } |
||
282 | |||
283 | #if 0 |
||
284 | void i915_gem_context_fini(struct drm_device *dev) |
||
285 | { |
||
286 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
287 | |||
288 | if (dev_priv->hw_contexts_disabled) |
||
289 | return; |
||
290 | |||
291 | /* The only known way to stop the gpu from accessing the hw context is |
||
292 | * to reset it. Do this as the very last operation to avoid confusing |
||
293 | * other code, leading to spurious errors. */ |
||
294 | intel_gpu_reset(dev); |
||
295 | |||
296 | i915_gem_object_unpin(dev_priv->ring[RCS].default_context->obj); |
||
297 | |||
298 | do_destroy(dev_priv->ring[RCS].default_context); |
||
299 | } |
||
300 | |||
301 | static int context_idr_cleanup(int id, void *p, void *data) |
||
302 | { |
||
303 | struct i915_hw_context *ctx = p; |
||
304 | |||
305 | BUG_ON(id == DEFAULT_CONTEXT_ID); |
||
306 | |||
307 | do_destroy(ctx); |
||
308 | |||
309 | return 0; |
||
310 | } |
||
311 | |||
312 | void i915_gem_context_close(struct drm_device *dev, struct drm_file *file) |
||
313 | { |
||
314 | struct drm_i915_file_private *file_priv = file->driver_priv; |
||
315 | |||
316 | mutex_lock(&dev->struct_mutex); |
||
317 | idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL); |
||
318 | idr_destroy(&file_priv->context_idr); |
||
319 | mutex_unlock(&dev->struct_mutex); |
||
320 | } |
||
321 | |||
322 | static struct i915_hw_context * |
||
323 | i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id) |
||
324 | { |
||
325 | return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id); |
||
326 | } |
||
327 | |||
328 | static inline int |
||
329 | mi_set_context(struct intel_ring_buffer *ring, |
||
330 | struct i915_hw_context *new_context, |
||
331 | u32 hw_flags) |
||
332 | { |
||
333 | int ret; |
||
334 | |||
335 | /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB |
||
336 | * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value |
||
337 | * explicitly, so we rely on the value at ring init, stored in |
||
338 | * itlb_before_ctx_switch. |
||
339 | */ |
||
340 | if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) { |
||
341 | ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0); |
||
342 | if (ret) |
||
343 | return ret; |
||
344 | } |
||
345 | |||
346 | ret = intel_ring_begin(ring, 6); |
||
347 | if (ret) |
||
348 | return ret; |
||
349 | |||
350 | if (IS_GEN7(ring->dev)) |
||
351 | intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE); |
||
352 | else |
||
353 | intel_ring_emit(ring, MI_NOOP); |
||
354 | |||
355 | intel_ring_emit(ring, MI_NOOP); |
||
356 | intel_ring_emit(ring, MI_SET_CONTEXT); |
||
357 | intel_ring_emit(ring, new_context->obj->gtt_offset | |
||
358 | MI_MM_SPACE_GTT | |
||
359 | MI_SAVE_EXT_STATE_EN | |
||
360 | MI_RESTORE_EXT_STATE_EN | |
||
361 | hw_flags); |
||
362 | /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */ |
||
363 | intel_ring_emit(ring, MI_NOOP); |
||
364 | |||
365 | if (IS_GEN7(ring->dev)) |
||
366 | intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE); |
||
367 | else |
||
368 | intel_ring_emit(ring, MI_NOOP); |
||
369 | |||
370 | intel_ring_advance(ring); |
||
371 | |||
372 | return ret; |
||
373 | } |
||
374 | |||
375 | static int do_switch(struct i915_hw_context *to) |
||
376 | { |
||
377 | struct intel_ring_buffer *ring = to->ring; |
||
378 | struct drm_i915_gem_object *from_obj = ring->last_context_obj; |
||
379 | u32 hw_flags = 0; |
||
380 | int ret; |
||
381 | |||
382 | BUG_ON(from_obj != NULL && from_obj->pin_count == 0); |
||
383 | |||
384 | if (from_obj == to->obj) |
||
385 | return 0; |
||
386 | |||
387 | ret = i915_gem_object_pin(to->obj, CONTEXT_ALIGN, false, false); |
||
388 | if (ret) |
||
389 | return ret; |
||
390 | |||
391 | /* Clear this page out of any CPU caches for coherent swap-in/out. Note |
||
392 | * that thanks to write = false in this call and us not setting any gpu |
||
393 | * write domains when putting a context object onto the active list |
||
394 | * (when switching away from it), this won't block. |
||
395 | * XXX: We need a real interface to do this instead of trickery. */ |
||
396 | ret = i915_gem_object_set_to_gtt_domain(to->obj, false); |
||
397 | if (ret) { |
||
398 | i915_gem_object_unpin(to->obj); |
||
399 | return ret; |
||
400 | } |
||
401 | |||
402 | if (!to->obj->has_global_gtt_mapping) |
||
403 | i915_gem_gtt_bind_object(to->obj, to->obj->cache_level); |
||
404 | |||
405 | if (!to->is_initialized || is_default_context(to)) |
||
406 | hw_flags |= MI_RESTORE_INHIBIT; |
||
407 | else if (WARN_ON_ONCE(from_obj == to->obj)) /* not yet expected */ |
||
408 | hw_flags |= MI_FORCE_RESTORE; |
||
409 | |||
410 | ret = mi_set_context(ring, to, hw_flags); |
||
411 | if (ret) { |
||
412 | i915_gem_object_unpin(to->obj); |
||
413 | return ret; |
||
414 | } |
||
415 | |||
416 | /* The backing object for the context is done after switching to the |
||
417 | * *next* context. Therefore we cannot retire the previous context until |
||
418 | * the next context has already started running. In fact, the below code |
||
419 | * is a bit suboptimal because the retiring can occur simply after the |
||
420 | * MI_SET_CONTEXT instead of when the next seqno has completed. |
||
421 | */ |
||
422 | if (from_obj != NULL) { |
||
423 | from_obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION; |
||
3243 | Serge | 424 | i915_gem_object_move_to_active(from_obj, ring); |
3031 | serge | 425 | /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the |
426 | * whole damn pipeline, we don't need to explicitly mark the |
||
427 | * object dirty. The only exception is that the context must be |
||
428 | * correct in case the object gets swapped out. Ideally we'd be |
||
429 | * able to defer doing this until we know the object would be |
||
430 | * swapped, but there is no way to do that yet. |
||
431 | */ |
||
432 | from_obj->dirty = 1; |
||
433 | BUG_ON(from_obj->ring != ring); |
||
434 | i915_gem_object_unpin(from_obj); |
||
435 | |||
436 | drm_gem_object_unreference(&from_obj->base); |
||
437 | } |
||
438 | |||
439 | drm_gem_object_reference(&to->obj->base); |
||
440 | ring->last_context_obj = to->obj; |
||
441 | to->is_initialized = true; |
||
442 | |||
443 | return 0; |
||
444 | } |
||
445 | #endif |
||
446 | |||
447 | /** |
||
448 | * i915_switch_context() - perform a GPU context switch. |
||
449 | * @ring: ring for which we'll execute the context switch |
||
450 | * @file_priv: file_priv associated with the context, may be NULL |
||
451 | * @id: context id number |
||
452 | * @seqno: sequence number by which the new context will be switched to |
||
453 | * @flags: |
||
454 | * |
||
455 | * The context life cycle is simple. The context refcount is incremented and |
||
456 | * decremented by 1 and create and destroy. If the context is in use by the GPU, |
||
457 | * it will have a refoucnt > 1. This allows us to destroy the context abstract |
||
458 | * object while letting the normal object tracking destroy the backing BO. |
||
459 | */ |
||
460 | int i915_switch_context(struct intel_ring_buffer *ring, |
||
461 | struct drm_file *file, |
||
462 | int to_id) |
||
463 | { |
||
464 | struct drm_i915_private *dev_priv = ring->dev->dev_private; |
||
465 | struct i915_hw_context *to; |
||
466 | |||
467 | if (dev_priv->hw_contexts_disabled) |
||
468 | return 0; |
||
469 | |||
470 | #if 0 |
||
471 | if (ring != &dev_priv->ring[RCS]) |
||
472 | return 0; |
||
473 | |||
474 | if (to_id == DEFAULT_CONTEXT_ID) { |
||
475 | to = ring->default_context; |
||
476 | } else { |
||
477 | if (file == NULL) |
||
478 | return -EINVAL; |
||
479 | |||
480 | to = i915_gem_context_get(file->driver_priv, to_id); |
||
481 | if (to == NULL) |
||
482 | return -ENOENT; |
||
483 | } |
||
484 | |||
485 | return do_switch(to); |
||
486 | #endif |
||
487 | |||
488 | return 0; |
||
489 | } |
||
490 | |||
491 | #if 0 |
||
492 | int i915_gem_context_create_ioctl(struct drm_device *dev, void *data, |
||
493 | struct drm_file *file) |
||
494 | { |
||
495 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
496 | struct drm_i915_gem_context_create *args = data; |
||
497 | struct drm_i915_file_private *file_priv = file->driver_priv; |
||
498 | struct i915_hw_context *ctx; |
||
499 | int ret; |
||
500 | |||
501 | if (!(dev->driver->driver_features & DRIVER_GEM)) |
||
502 | return -ENODEV; |
||
503 | |||
504 | if (dev_priv->hw_contexts_disabled) |
||
505 | return -ENODEV; |
||
506 | |||
507 | ret = i915_mutex_lock_interruptible(dev); |
||
508 | if (ret) |
||
509 | return ret; |
||
510 | |||
511 | ctx = create_hw_context(dev, file_priv); |
||
512 | mutex_unlock(&dev->struct_mutex); |
||
513 | if (IS_ERR(ctx)) |
||
514 | return PTR_ERR(ctx); |
||
515 | |||
516 | args->ctx_id = ctx->id; |
||
517 | DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id); |
||
518 | |||
519 | return 0; |
||
520 | } |
||
521 | |||
522 | int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data, |
||
523 | struct drm_file *file) |
||
524 | { |
||
525 | struct drm_i915_gem_context_destroy *args = data; |
||
526 | struct drm_i915_file_private *file_priv = file->driver_priv; |
||
527 | struct i915_hw_context *ctx; |
||
528 | int ret; |
||
529 | |||
530 | if (!(dev->driver->driver_features & DRIVER_GEM)) |
||
531 | return -ENODEV; |
||
532 | |||
533 | ret = i915_mutex_lock_interruptible(dev); |
||
534 | if (ret) |
||
535 | return ret; |
||
536 | |||
537 | ctx = i915_gem_context_get(file_priv, args->ctx_id); |
||
538 | if (!ctx) { |
||
539 | mutex_unlock(&dev->struct_mutex); |
||
540 | return -ENOENT; |
||
541 | } |
||
542 | |||
543 | do_destroy(ctx); |
||
544 | |||
545 | mutex_unlock(&dev->struct_mutex); |
||
546 | |||
547 | DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id); |
||
548 | return 0; |
||
549 | } |
||
550 | |||
551 | #endif20))><20))>=>10) |