Subversion Repositories Kolibri OS

/*

 * Copyright © 2008 Intel Corporation

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice (including the next

 * paragraph) shall be included in all copies or substantial portions of the

 * Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS

 * IN THE SOFTWARE.

 *

 * Authors:

 *    Eric Anholt 

 *

 */

#include 

#include 

#include 

#include "i915_drv.h"

#include "i915_trace.h"

#include "intel_drv.h"

#include 

#include 

//#include 

#include 

#include 

extern int x86_clflush_size;

#define PROT_READ       0x1             /* page can be read */

#define PROT_WRITE      0x2             /* page can be written */

#define MAP_SHARED      0x01            /* Share changes */

#undef mb

#undef rmb

#undef wmb

#define mb() asm volatile("mfence")

#define rmb() asm volatile ("lfence")

#define wmb() asm volatile ("sfence")

struct drm_i915_gem_object *get_fb_obj();

unsigned long vm_mmap(struct file *file, unsigned long addr,

         unsigned long len, unsigned long prot,

         unsigned long flag, unsigned long offset);

static inline void clflush(volatile void *__p)

{

    asm volatile("clflush %0" : "+m" (*(volatile char*)__p));

}

#define MAX_ERRNO       4095

#define IS_ERR_VALUE(x) unlikely((x) >= (unsigned long)-MAX_ERRNO)

#define I915_EXEC_CONSTANTS_MASK        (3<<6)

#define I915_EXEC_CONSTANTS_REL_GENERAL (0<<6) /* default */

#define I915_EXEC_CONSTANTS_ABSOLUTE    (1<<6)

#define I915_EXEC_CONSTANTS_REL_SURFACE (2<<6) /* gen4/5 only */

static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);

static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj,

						   bool force);

static __must_check int

i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,

			   struct i915_address_space *vm,

						    unsigned alignment,

						    bool map_and_fenceable,

						    bool nonblocking);

static int i915_gem_phys_pwrite(struct drm_device *dev,

				struct drm_i915_gem_object *obj,

				struct drm_i915_gem_pwrite *args,

				struct drm_file *file);

static void i915_gem_write_fence(struct drm_device *dev, int reg,

				 struct drm_i915_gem_object *obj);

static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj,

					 struct drm_i915_fence_reg *fence,

					 bool enable);

static long i915_gem_purge(struct drm_i915_private *dev_priv, long target);

static long i915_gem_shrink_all(struct drm_i915_private *dev_priv);

static void i915_gem_object_truncate(struct drm_i915_gem_object *obj);

static bool cpu_cache_is_coherent(struct drm_device *dev,

				  enum i915_cache_level level)

{

	return HAS_LLC(dev) || level != I915_CACHE_NONE;

}

static bool cpu_write_needs_clflush(struct drm_i915_gem_object *obj)

{

	if (!cpu_cache_is_coherent(obj->base.dev, obj->cache_level))

		return true;

	return obj->pin_display;

}

static inline void i915_gem_object_fence_lost(struct drm_i915_gem_object *obj)

{

	if (obj->tiling_mode)

		i915_gem_release_mmap(obj);

	/* As we do not have an associated fence register, we will force

	 * a tiling change if we ever need to acquire one.

	 */

	obj->fence_dirty = false;

	obj->fence_reg = I915_FENCE_REG_NONE;

}

/* some bookkeeping */

static void i915_gem_info_add_obj(struct drm_i915_private *dev_priv,

				  size_t size)

{

	spin_lock(&dev_priv->mm.object_stat_lock);

	dev_priv->mm.object_count++;

	dev_priv->mm.object_memory += size;

	spin_unlock(&dev_priv->mm.object_stat_lock);

}

static void i915_gem_info_remove_obj(struct drm_i915_private *dev_priv,

				     size_t size)

{

	spin_lock(&dev_priv->mm.object_stat_lock);

	dev_priv->mm.object_count--;

	dev_priv->mm.object_memory -= size;

	spin_unlock(&dev_priv->mm.object_stat_lock);

}

static int

i915_gem_wait_for_error(struct i915_gpu_error *error)

{

	int ret;

#define EXIT_COND (!i915_reset_in_progress(error))

	if (EXIT_COND)

		return 0;

#if 0

	/*

	 * Only wait 10 seconds for the gpu reset to complete to avoid hanging

	 * userspace. If it takes that long something really bad is going on and

	 * we should simply try to bail out and fail as gracefully as possible.

	 */

	ret = wait_event_interruptible_timeout(error->reset_queue,

					       EXIT_COND,

					       10*HZ);

	if (ret == 0) {

		DRM_ERROR("Timed out waiting for the gpu reset to complete\n");

		return -EIO;

	} else if (ret < 0) {

		return ret;

	}

#endif

#undef EXIT_COND

	return 0;

}

int i915_mutex_lock_interruptible(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	int ret;

	ret = i915_gem_wait_for_error(&dev_priv->gpu_error);

	if (ret)

		return ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);

	if (ret)

		return ret;

	WARN_ON(i915_verify_lists(dev));

	return 0;

}

static inline bool

i915_gem_object_is_inactive(struct drm_i915_gem_object *obj)

{

	return i915_gem_obj_bound_any(obj) && !obj->active;

}

#if 0

int

i915_gem_init_ioctl(struct drm_device *dev, void *data,

		    struct drm_file *file)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_gem_init *args = data;

	if (drm_core_check_feature(dev, DRIVER_MODESET))

		return -ENODEV;

	if (args->gtt_start >= args->gtt_end ||

	    (args->gtt_end | args->gtt_start) & (PAGE_SIZE - 1))