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3031 | serge | 1 | /* drm_pci.h -- PCI DMA memory management wrappers for DRM -*- linux-c -*- */ |
2 | /** |
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3 | * \file drm_pci.c |
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4 | * \brief Functions and ioctls to manage PCI memory |
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5 | * |
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6 | * \warning These interfaces aren't stable yet. |
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7 | * |
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8 | * \todo Implement the remaining ioctl's for the PCI pools. |
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9 | * \todo The wrappers here are so thin that they would be better off inlined.. |
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10 | * |
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11 | * \author José Fonseca |
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12 | * \author Leif Delgass |
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13 | */ |
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14 | |||
15 | /* |
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16 | * Copyright 2003 José Fonseca. |
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17 | * Copyright 2003 Leif Delgass. |
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18 | * All Rights Reserved. |
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19 | * |
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20 | * Permission is hereby granted, free of charge, to any person obtaining a |
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21 | * copy of this software and associated documentation files (the "Software"), |
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22 | * to deal in the Software without restriction, including without limitation |
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23 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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24 | * and/or sell copies of the Software, and to permit persons to whom the |
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25 | * Software is furnished to do so, subject to the following conditions: |
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26 | * |
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27 | * The above copyright notice and this permission notice (including the next |
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28 | * paragraph) shall be included in all copies or substantial portions of the |
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29 | * Software. |
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30 | * |
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31 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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32 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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33 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
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34 | * AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
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35 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
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36 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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37 | */ |
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38 | |||
39 | //#include |
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40 | //#include |
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41 | //#include |
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42 | #include |
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43 | #include |
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44 | |||
45 | #include |
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46 | |||
47 | /**********************************************************************/ |
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48 | /** \name PCI memory */ |
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49 | /*@{*/ |
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50 | |||
51 | /** |
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52 | * \brief Allocate a PCI consistent memory block, for DMA. |
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53 | */ |
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54 | drm_dma_handle_t *drm_pci_alloc(struct drm_device * dev, size_t size, size_t align) |
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55 | { |
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56 | drm_dma_handle_t *dmah; |
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57 | #if 1 |
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58 | unsigned long addr; |
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59 | size_t sz; |
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60 | #endif |
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61 | |||
62 | /* pci_alloc_consistent only guarantees alignment to the smallest |
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63 | * PAGE_SIZE order which is greater than or equal to the requested size. |
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64 | * Return NULL here for now to make sure nobody tries for larger alignment |
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65 | */ |
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66 | if (align > size) |
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67 | return NULL; |
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68 | |||
69 | dmah = kmalloc(sizeof(drm_dma_handle_t), GFP_KERNEL); |
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70 | if (!dmah) |
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71 | return NULL; |
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72 | |||
73 | dmah->size = size; |
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74 | dmah->vaddr = (void*)KernelAlloc(size); |
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75 | dmah->busaddr = GetPgAddr(dmah->vaddr); |
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76 | |||
77 | if (dmah->vaddr == NULL) { |
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78 | kfree(dmah); |
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79 | return NULL; |
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80 | } |
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81 | |||
82 | memset(dmah->vaddr, 0, size); |
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83 | |||
84 | return dmah; |
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85 | } |
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86 | |||
87 | |||
88 | int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask) |
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89 | { |
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90 | struct pci_dev *root; |
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91 | u32 lnkcap, lnkcap2; |
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92 | |||
93 | *mask = 0; |
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94 | if (!dev->pdev) |
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95 | return -EINVAL; |
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96 | |||
97 | if (!pci_is_pcie(dev->pdev)) |
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98 | return -EINVAL; |
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99 | |||
100 | return -EINVAL; |
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101 | |||
102 | #if 0 |
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103 | root = dev->pdev->bus->self; |
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104 | |||
3480 | Serge | 105 | /* we've been informed via and serverworks don't make the cut */ |
106 | if (root->vendor == PCI_VENDOR_ID_VIA || |
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107 | root->vendor == PCI_VENDOR_ID_SERVERWORKS) |
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3031 | serge | 108 | return -EINVAL; |
109 | |||
3480 | Serge | 110 | pcie_capability_read_dword(root, PCI_EXP_LNKCAP, &lnkcap); |
111 | pcie_capability_read_dword(root, PCI_EXP_LNKCAP2, &lnkcap2); |
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3031 | serge | 112 | |
3480 | Serge | 113 | if (lnkcap2) { /* PCIe r3.0-compliant */ |
3031 | serge | 114 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) |
115 | *mask |= DRM_PCIE_SPEED_25; |
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116 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) |
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117 | *mask |= DRM_PCIE_SPEED_50; |
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118 | if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) |
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119 | *mask |= DRM_PCIE_SPEED_80; |
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3480 | Serge | 120 | } else { /* pre-r3.0 */ |
121 | if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) |
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3031 | serge | 122 | *mask |= DRM_PCIE_SPEED_25; |
3480 | Serge | 123 | if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) |
124 | *mask |= (DRM_PCIE_SPEED_25 | DRM_PCIE_SPEED_50); |
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3031 | serge | 125 | } |
126 | |||
127 | DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", root->vendor, root->device, lnkcap, lnkcap2); |
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128 | return 0; |
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129 | #endif |
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130 | |||
131 | } |
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132 | EXPORT_SYMBOL(drm_pcie_get_speed_cap_mask); |