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1123 | serge | 1 | /* |
2 | * The list_sort function is (presumably) licensed under the GPL (see the |
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3 | * top level "COPYING" file for details). |
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4 | * |
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5 | * The remainder of this file is: |
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6 | * |
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7 | * Copyright © 1997-2003 by The XFree86 Project, Inc. |
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8 | * Copyright © 2007 Dave Airlie |
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9 | * Copyright © 2007-2008 Intel Corporation |
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10 | * Jesse Barnes |
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1179 | serge | 11 | * Copyright 2005-2006 Luc Verhaegen |
12 | * Copyright (c) 2001, Andy Ritger aritger@nvidia.com |
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1123 | serge | 13 | * |
14 | * Permission is hereby granted, free of charge, to any person obtaining a |
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15 | * copy of this software and associated documentation files (the "Software"), |
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16 | * to deal in the Software without restriction, including without limitation |
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17 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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18 | * and/or sell copies of the Software, and to permit persons to whom the |
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19 | * Software is furnished to do so, subject to the following conditions: |
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20 | * |
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21 | * The above copyright notice and this permission notice shall be included in |
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22 | * all copies or substantial portions of the Software. |
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23 | * |
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24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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25 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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26 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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27 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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28 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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29 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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30 | * OTHER DEALINGS IN THE SOFTWARE. |
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31 | * |
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32 | * Except as contained in this notice, the name of the copyright holder(s) |
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33 | * and author(s) shall not be used in advertising or otherwise to promote |
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34 | * the sale, use or other dealings in this Software without prior written |
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35 | * authorization from the copyright holder(s) and author(s). |
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36 | */ |
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37 | |||
1179 | serge | 38 | #include |
1123 | serge | 39 | #include "drmP.h" |
40 | #include "drm.h" |
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41 | #include "drm_crtc.h" |
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42 | |||
43 | /** |
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44 | * drm_mode_debug_printmodeline - debug print a mode |
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45 | * @dev: DRM device |
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46 | * @mode: mode to print |
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47 | * |
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48 | * LOCKING: |
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49 | * None. |
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50 | * |
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51 | * Describe @mode using DRM_DEBUG. |
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52 | */ |
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53 | void drm_mode_debug_printmodeline(struct drm_display_mode *mode) |
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54 | { |
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1179 | serge | 55 | DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " |
56 | "0x%x 0x%x\n", |
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1123 | serge | 57 | mode->base.id, mode->name, mode->vrefresh, mode->clock, |
58 | mode->hdisplay, mode->hsync_start, |
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59 | mode->hsync_end, mode->htotal, |
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60 | mode->vdisplay, mode->vsync_start, |
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61 | mode->vsync_end, mode->vtotal, mode->type, mode->flags); |
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62 | } |
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63 | EXPORT_SYMBOL(drm_mode_debug_printmodeline); |
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64 | |||
65 | /** |
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1179 | serge | 66 | * drm_cvt_mode -create a modeline based on CVT algorithm |
67 | * @dev: DRM device |
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68 | * @hdisplay: hdisplay size |
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69 | * @vdisplay: vdisplay size |
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70 | * @vrefresh : vrefresh rate |
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71 | * @reduced : Whether the GTF calculation is simplified |
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72 | * @interlaced:Whether the interlace is supported |
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73 | * |
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74 | * LOCKING: |
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75 | * none. |
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76 | * |
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77 | * return the modeline based on CVT algorithm |
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78 | * |
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79 | * This function is called to generate the modeline based on CVT algorithm |
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80 | * according to the hdisplay, vdisplay, vrefresh. |
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81 | * It is based from the VESA(TM) Coordinated Video Timing Generator by |
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82 | * Graham Loveridge April 9, 2003 available at |
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83 | * http://www.vesa.org/public/CVT/CVTd6r1.xls |
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84 | * |
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85 | * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. |
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86 | * What I have done is to translate it by using integer calculation. |
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87 | */ |
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88 | #define HV_FACTOR 1000 |
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89 | struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, |
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90 | int vdisplay, int vrefresh, |
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1221 | serge | 91 | bool reduced, bool interlaced, bool margins) |
1179 | serge | 92 | { |
93 | /* 1) top/bottom margin size (% of height) - default: 1.8, */ |
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94 | #define CVT_MARGIN_PERCENTAGE 18 |
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95 | /* 2) character cell horizontal granularity (pixels) - default 8 */ |
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96 | #define CVT_H_GRANULARITY 8 |
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97 | /* 3) Minimum vertical porch (lines) - default 3 */ |
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98 | #define CVT_MIN_V_PORCH 3 |
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99 | /* 4) Minimum number of vertical back porch lines - default 6 */ |
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100 | #define CVT_MIN_V_BPORCH 6 |
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101 | /* Pixel Clock step (kHz) */ |
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102 | #define CVT_CLOCK_STEP 250 |
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103 | struct drm_display_mode *drm_mode; |
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104 | unsigned int vfieldrate, hperiod; |
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105 | int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; |
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106 | int interlace; |
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107 | |||
108 | /* allocate the drm_display_mode structure. If failure, we will |
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109 | * return directly |
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110 | */ |
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111 | drm_mode = drm_mode_create(dev); |
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112 | if (!drm_mode) |
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113 | return NULL; |
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114 | |||
115 | /* the CVT default refresh rate is 60Hz */ |
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116 | if (!vrefresh) |
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117 | vrefresh = 60; |
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118 | |||
119 | /* the required field fresh rate */ |
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120 | if (interlaced) |
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121 | vfieldrate = vrefresh * 2; |
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122 | else |
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123 | vfieldrate = vrefresh; |
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124 | |||
125 | /* horizontal pixels */ |
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126 | hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); |
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127 | |||
128 | /* determine the left&right borders */ |
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129 | hmargin = 0; |
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130 | if (margins) { |
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131 | hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; |
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132 | hmargin -= hmargin % CVT_H_GRANULARITY; |
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133 | } |
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134 | /* find the total active pixels */ |
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135 | drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; |
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136 | |||
137 | /* find the number of lines per field */ |
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138 | if (interlaced) |
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139 | vdisplay_rnd = vdisplay / 2; |
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140 | else |
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141 | vdisplay_rnd = vdisplay; |
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142 | |||
143 | /* find the top & bottom borders */ |
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144 | vmargin = 0; |
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145 | if (margins) |
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146 | vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; |
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147 | |||
148 | drm_mode->vdisplay = vdisplay + 2 * vmargin; |
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149 | |||
150 | /* Interlaced */ |
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151 | if (interlaced) |
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152 | interlace = 1; |
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153 | else |
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154 | interlace = 0; |
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155 | |||
156 | /* Determine VSync Width from aspect ratio */ |
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157 | if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) |
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158 | vsync = 4; |
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159 | else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) |
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160 | vsync = 5; |
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161 | else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) |
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162 | vsync = 6; |
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163 | else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) |
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164 | vsync = 7; |
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165 | else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) |
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166 | vsync = 7; |
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167 | else /* custom */ |
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168 | vsync = 10; |
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169 | |||
170 | if (!reduced) { |
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171 | /* simplify the GTF calculation */ |
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172 | /* 4) Minimum time of vertical sync + back porch interval (µs) |
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173 | * default 550.0 |
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174 | */ |
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175 | int tmp1, tmp2; |
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176 | #define CVT_MIN_VSYNC_BP 550 |
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177 | /* 3) Nominal HSync width (% of line period) - default 8 */ |
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178 | #define CVT_HSYNC_PERCENTAGE 8 |
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179 | unsigned int hblank_percentage; |
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180 | int vsyncandback_porch, vback_porch, hblank; |
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181 | |||
182 | /* estimated the horizontal period */ |
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183 | tmp1 = HV_FACTOR * 1000000 - |
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184 | CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; |
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185 | tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + |
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186 | interlace; |
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187 | hperiod = tmp1 * 2 / (tmp2 * vfieldrate); |
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188 | |||
189 | tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; |
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190 | /* 9. Find number of lines in sync + backporch */ |
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191 | if (tmp1 < (vsync + CVT_MIN_V_PORCH)) |
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192 | vsyncandback_porch = vsync + CVT_MIN_V_PORCH; |
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193 | else |
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194 | vsyncandback_porch = tmp1; |
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195 | /* 10. Find number of lines in back porch */ |
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196 | vback_porch = vsyncandback_porch - vsync; |
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197 | drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + |
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198 | vsyncandback_porch + CVT_MIN_V_PORCH; |
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199 | /* 5) Definition of Horizontal blanking time limitation */ |
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200 | /* Gradient (%/kHz) - default 600 */ |
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201 | #define CVT_M_FACTOR 600 |
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202 | /* Offset (%) - default 40 */ |
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203 | #define CVT_C_FACTOR 40 |
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204 | /* Blanking time scaling factor - default 128 */ |
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205 | #define CVT_K_FACTOR 128 |
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206 | /* Scaling factor weighting - default 20 */ |
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207 | #define CVT_J_FACTOR 20 |
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208 | #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) |
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209 | #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ |
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210 | CVT_J_FACTOR) |
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211 | /* 12. Find ideal blanking duty cycle from formula */ |
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212 | hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * |
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213 | hperiod / 1000; |
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214 | /* 13. Blanking time */ |
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215 | if (hblank_percentage < 20 * HV_FACTOR) |
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216 | hblank_percentage = 20 * HV_FACTOR; |
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217 | hblank = drm_mode->hdisplay * hblank_percentage / |
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218 | (100 * HV_FACTOR - hblank_percentage); |
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219 | hblank -= hblank % (2 * CVT_H_GRANULARITY); |
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220 | /* 14. find the total pixes per line */ |
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221 | drm_mode->htotal = drm_mode->hdisplay + hblank; |
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222 | drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; |
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223 | drm_mode->hsync_start = drm_mode->hsync_end - |
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224 | (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; |
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225 | drm_mode->hsync_start += CVT_H_GRANULARITY - |
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226 | drm_mode->hsync_start % CVT_H_GRANULARITY; |
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227 | /* fill the Vsync values */ |
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228 | drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; |
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229 | drm_mode->vsync_end = drm_mode->vsync_start + vsync; |
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230 | } else { |
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231 | /* Reduced blanking */ |
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232 | /* Minimum vertical blanking interval time (µs)- default 460 */ |
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233 | #define CVT_RB_MIN_VBLANK 460 |
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234 | /* Fixed number of clocks for horizontal sync */ |
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235 | #define CVT_RB_H_SYNC 32 |
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236 | /* Fixed number of clocks for horizontal blanking */ |
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237 | #define CVT_RB_H_BLANK 160 |
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238 | /* Fixed number of lines for vertical front porch - default 3*/ |
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239 | #define CVT_RB_VFPORCH 3 |
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240 | int vbilines; |
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241 | int tmp1, tmp2; |
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242 | /* 8. Estimate Horizontal period. */ |
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243 | tmp1 = HV_FACTOR * 1000000 - |
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244 | CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; |
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245 | tmp2 = vdisplay_rnd + 2 * vmargin; |
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246 | hperiod = tmp1 / (tmp2 * vfieldrate); |
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247 | /* 9. Find number of lines in vertical blanking */ |
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248 | vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; |
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249 | /* 10. Check if vertical blanking is sufficient */ |
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250 | if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) |
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251 | vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; |
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252 | /* 11. Find total number of lines in vertical field */ |
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253 | drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; |
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254 | /* 12. Find total number of pixels in a line */ |
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255 | drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; |
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256 | /* Fill in HSync values */ |
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257 | drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; |
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258 | drm_mode->hsync_start = drm_mode->hsync_end = CVT_RB_H_SYNC; |
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259 | } |
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260 | /* 15/13. Find pixel clock frequency (kHz for xf86) */ |
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261 | drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; |
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262 | drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; |
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263 | /* 18/16. Find actual vertical frame frequency */ |
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264 | /* ignore - just set the mode flag for interlaced */ |
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265 | if (interlaced) |
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266 | drm_mode->vtotal *= 2; |
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267 | /* Fill the mode line name */ |
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268 | drm_mode_set_name(drm_mode); |
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269 | if (reduced) |
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270 | drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | |
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271 | DRM_MODE_FLAG_NVSYNC); |
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272 | else |
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273 | drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | |
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274 | DRM_MODE_FLAG_NHSYNC); |
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275 | if (interlaced) |
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276 | drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; |
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277 | |||
278 | return drm_mode; |
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279 | } |
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280 | EXPORT_SYMBOL(drm_cvt_mode); |
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281 | |||
282 | /** |
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283 | * drm_gtf_mode - create the modeline based on GTF algorithm |
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284 | * |
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285 | * @dev :drm device |
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286 | * @hdisplay :hdisplay size |
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287 | * @vdisplay :vdisplay size |
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288 | * @vrefresh :vrefresh rate. |
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289 | * @interlaced :whether the interlace is supported |
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290 | * @margins :whether the margin is supported |
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291 | * |
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292 | * LOCKING. |
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293 | * none. |
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294 | * |
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295 | * return the modeline based on GTF algorithm |
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296 | * |
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297 | * This function is to create the modeline based on the GTF algorithm. |
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298 | * Generalized Timing Formula is derived from: |
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299 | * GTF Spreadsheet by Andy Morrish (1/5/97) |
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300 | * available at http://www.vesa.org |
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301 | * |
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302 | * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. |
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303 | * What I have done is to translate it by using integer calculation. |
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304 | * I also refer to the function of fb_get_mode in the file of |
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305 | * drivers/video/fbmon.c |
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306 | */ |
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307 | struct drm_display_mode *drm_gtf_mode(struct drm_device *dev, int hdisplay, |
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308 | int vdisplay, int vrefresh, |
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309 | bool interlaced, int margins) |
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310 | { |
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311 | /* 1) top/bottom margin size (% of height) - default: 1.8, */ |
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312 | #define GTF_MARGIN_PERCENTAGE 18 |
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313 | /* 2) character cell horizontal granularity (pixels) - default 8 */ |
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314 | #define GTF_CELL_GRAN 8 |
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315 | /* 3) Minimum vertical porch (lines) - default 3 */ |
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316 | #define GTF_MIN_V_PORCH 1 |
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317 | /* width of vsync in lines */ |
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318 | #define V_SYNC_RQD 3 |
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319 | /* width of hsync as % of total line */ |
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320 | #define H_SYNC_PERCENT 8 |
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321 | /* min time of vsync + back porch (microsec) */ |
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322 | #define MIN_VSYNC_PLUS_BP 550 |
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323 | /* blanking formula gradient */ |
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324 | #define GTF_M 600 |
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325 | /* blanking formula offset */ |
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326 | #define GTF_C 40 |
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327 | /* blanking formula scaling factor */ |
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328 | #define GTF_K 128 |
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329 | /* blanking formula scaling factor */ |
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330 | #define GTF_J 20 |
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331 | /* C' and M' are part of the Blanking Duty Cycle computation */ |
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332 | #define GTF_C_PRIME (((GTF_C - GTF_J) * GTF_K / 256) + GTF_J) |
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333 | #define GTF_M_PRIME (GTF_K * GTF_M / 256) |
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334 | struct drm_display_mode *drm_mode; |
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335 | unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; |
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336 | int top_margin, bottom_margin; |
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337 | int interlace; |
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338 | unsigned int hfreq_est; |
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339 | int vsync_plus_bp, vback_porch; |
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340 | unsigned int vtotal_lines, vfieldrate_est, hperiod; |
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341 | unsigned int vfield_rate, vframe_rate; |
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342 | int left_margin, right_margin; |
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343 | unsigned int total_active_pixels, ideal_duty_cycle; |
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344 | unsigned int hblank, total_pixels, pixel_freq; |
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345 | int hsync, hfront_porch, vodd_front_porch_lines; |
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346 | unsigned int tmp1, tmp2; |
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347 | |||
348 | drm_mode = drm_mode_create(dev); |
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349 | if (!drm_mode) |
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350 | return NULL; |
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351 | |||
352 | /* 1. In order to give correct results, the number of horizontal |
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353 | * pixels requested is first processed to ensure that it is divisible |
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354 | * by the character size, by rounding it to the nearest character |
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355 | * cell boundary: |
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356 | */ |
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357 | hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; |
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358 | hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; |
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359 | |||
360 | /* 2. If interlace is requested, the number of vertical lines assumed |
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361 | * by the calculation must be halved, as the computation calculates |
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362 | * the number of vertical lines per field. |
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363 | */ |
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364 | if (interlaced) |
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365 | vdisplay_rnd = vdisplay / 2; |
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366 | else |
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367 | vdisplay_rnd = vdisplay; |
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368 | |||
369 | /* 3. Find the frame rate required: */ |
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370 | if (interlaced) |
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371 | vfieldrate_rqd = vrefresh * 2; |
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372 | else |
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373 | vfieldrate_rqd = vrefresh; |
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374 | |||
375 | /* 4. Find number of lines in Top margin: */ |
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376 | top_margin = 0; |
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377 | if (margins) |
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378 | top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / |
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379 | 1000; |
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380 | /* 5. Find number of lines in bottom margin: */ |
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381 | bottom_margin = top_margin; |
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382 | |||
383 | /* 6. If interlace is required, then set variable interlace: */ |
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384 | if (interlaced) |
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385 | interlace = 1; |
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386 | else |
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387 | interlace = 0; |
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388 | |||
389 | /* 7. Estimate the Horizontal frequency */ |
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390 | { |
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391 | tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; |
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392 | tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * |
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393 | 2 + interlace; |
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394 | hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; |
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395 | } |
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396 | |||
397 | /* 8. Find the number of lines in V sync + back porch */ |
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398 | /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ |
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399 | vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; |
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400 | vsync_plus_bp = (vsync_plus_bp + 500) / 1000; |
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401 | /* 9. Find the number of lines in V back porch alone: */ |
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402 | vback_porch = vsync_plus_bp - V_SYNC_RQD; |
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403 | /* 10. Find the total number of lines in Vertical field period: */ |
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404 | vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + |
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405 | vsync_plus_bp + GTF_MIN_V_PORCH; |
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406 | /* 11. Estimate the Vertical field frequency: */ |
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407 | vfieldrate_est = hfreq_est / vtotal_lines; |
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408 | /* 12. Find the actual horizontal period: */ |
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409 | hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); |
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410 | |||
411 | /* 13. Find the actual Vertical field frequency: */ |
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412 | vfield_rate = hfreq_est / vtotal_lines; |
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413 | /* 14. Find the Vertical frame frequency: */ |
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414 | if (interlaced) |
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415 | vframe_rate = vfield_rate / 2; |
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416 | else |
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417 | vframe_rate = vfield_rate; |
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418 | /* 15. Find number of pixels in left margin: */ |
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419 | if (margins) |
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420 | left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / |
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421 | 1000; |
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422 | else |
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423 | left_margin = 0; |
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424 | |||
425 | /* 16.Find number of pixels in right margin: */ |
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426 | right_margin = left_margin; |
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427 | /* 17.Find total number of active pixels in image and left and right */ |
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428 | total_active_pixels = hdisplay_rnd + left_margin + right_margin; |
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429 | /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ |
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430 | ideal_duty_cycle = GTF_C_PRIME * 1000 - |
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431 | (GTF_M_PRIME * 1000000 / hfreq_est); |
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432 | /* 19.Find the number of pixels in the blanking time to the nearest |
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433 | * double character cell: */ |
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434 | hblank = total_active_pixels * ideal_duty_cycle / |
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435 | (100000 - ideal_duty_cycle); |
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436 | hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); |
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437 | hblank = hblank * 2 * GTF_CELL_GRAN; |
||
438 | /* 20.Find total number of pixels: */ |
||
439 | total_pixels = total_active_pixels + hblank; |
||
440 | /* 21.Find pixel clock frequency: */ |
||
441 | pixel_freq = total_pixels * hfreq_est / 1000; |
||
442 | /* Stage 1 computations are now complete; I should really pass |
||
443 | * the results to another function and do the Stage 2 computations, |
||
444 | * but I only need a few more values so I'll just append the |
||
445 | * computations here for now */ |
||
446 | /* 17. Find the number of pixels in the horizontal sync period: */ |
||
447 | hsync = H_SYNC_PERCENT * total_pixels / 100; |
||
448 | hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; |
||
449 | hsync = hsync * GTF_CELL_GRAN; |
||
450 | /* 18. Find the number of pixels in horizontal front porch period */ |
||
451 | hfront_porch = hblank / 2 - hsync; |
||
452 | /* 36. Find the number of lines in the odd front porch period: */ |
||
453 | vodd_front_porch_lines = GTF_MIN_V_PORCH ; |
||
454 | |||
455 | /* finally, pack the results in the mode struct */ |
||
456 | drm_mode->hdisplay = hdisplay_rnd; |
||
457 | drm_mode->hsync_start = hdisplay_rnd + hfront_porch; |
||
458 | drm_mode->hsync_end = drm_mode->hsync_start + hsync; |
||
459 | drm_mode->htotal = total_pixels; |
||
460 | drm_mode->vdisplay = vdisplay_rnd; |
||
461 | drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; |
||
462 | drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; |
||
463 | drm_mode->vtotal = vtotal_lines; |
||
464 | |||
465 | drm_mode->clock = pixel_freq; |
||
466 | |||
467 | drm_mode_set_name(drm_mode); |
||
468 | drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; |
||
469 | |||
470 | if (interlaced) { |
||
471 | drm_mode->vtotal *= 2; |
||
472 | drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; |
||
473 | } |
||
474 | |||
475 | return drm_mode; |
||
476 | } |
||
477 | EXPORT_SYMBOL(drm_gtf_mode); |
||
478 | /** |
||
1123 | serge | 479 | * drm_mode_set_name - set the name on a mode |
480 | * @mode: name will be set in this mode |
||
481 | * |
||
482 | * LOCKING: |
||
483 | * None. |
||
484 | * |
||
485 | * Set the name of @mode to a standard format. |
||
486 | */ |
||
487 | void drm_mode_set_name(struct drm_display_mode *mode) |
||
488 | { |
||
489 | snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d", mode->hdisplay, |
||
490 | mode->vdisplay); |
||
491 | } |
||
492 | EXPORT_SYMBOL(drm_mode_set_name); |
||
493 | |||
494 | /** |
||
495 | * drm_mode_list_concat - move modes from one list to another |
||
496 | * @head: source list |
||
497 | * @new: dst list |
||
498 | * |
||
499 | * LOCKING: |
||
500 | * Caller must ensure both lists are locked. |
||
501 | * |
||
502 | * Move all the modes from @head to @new. |
||
503 | */ |
||
504 | void drm_mode_list_concat(struct list_head *head, struct list_head *new) |
||
505 | { |
||
506 | |||
507 | struct list_head *entry, *tmp; |
||
508 | |||
509 | list_for_each_safe(entry, tmp, head) { |
||
510 | list_move_tail(entry, new); |
||
511 | } |
||
512 | } |
||
513 | EXPORT_SYMBOL(drm_mode_list_concat); |
||
514 | |||
515 | /** |
||
516 | * drm_mode_width - get the width of a mode |
||
517 | * @mode: mode |
||
518 | * |
||
519 | * LOCKING: |
||
520 | * None. |
||
521 | * |
||
522 | * Return @mode's width (hdisplay) value. |
||
523 | * |
||
524 | * FIXME: is this needed? |
||
525 | * |
||
526 | * RETURNS: |
||
527 | * @mode->hdisplay |
||
528 | */ |
||
529 | int drm_mode_width(struct drm_display_mode *mode) |
||
530 | { |
||
531 | return mode->hdisplay; |
||
532 | |||
533 | } |
||
534 | EXPORT_SYMBOL(drm_mode_width); |
||
535 | |||
536 | /** |
||
537 | * drm_mode_height - get the height of a mode |
||
538 | * @mode: mode |
||
539 | * |
||
540 | * LOCKING: |
||
541 | * None. |
||
542 | * |
||
543 | * Return @mode's height (vdisplay) value. |
||
544 | * |
||
545 | * FIXME: is this needed? |
||
546 | * |
||
547 | * RETURNS: |
||
548 | * @mode->vdisplay |
||
549 | */ |
||
550 | int drm_mode_height(struct drm_display_mode *mode) |
||
551 | { |
||
552 | return mode->vdisplay; |
||
553 | } |
||
554 | EXPORT_SYMBOL(drm_mode_height); |
||
555 | |||
1321 | serge | 556 | /** drm_mode_hsync - get the hsync of a mode |
557 | * @mode: mode |
||
558 | * |
||
559 | * LOCKING: |
||
560 | * None. |
||
561 | * |
||
562 | * Return @modes's hsync rate in kHz, rounded to the nearest int. |
||
563 | */ |
||
564 | int drm_mode_hsync(struct drm_display_mode *mode) |
||
565 | { |
||
566 | unsigned int calc_val; |
||
567 | |||
568 | if (mode->hsync) |
||
569 | return mode->hsync; |
||
570 | |||
571 | if (mode->htotal < 0) |
||
572 | return 0; |
||
573 | |||
574 | calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ |
||
575 | calc_val += 500; /* round to 1000Hz */ |
||
576 | calc_val /= 1000; /* truncate to kHz */ |
||
577 | |||
578 | return calc_val; |
||
579 | } |
||
580 | EXPORT_SYMBOL(drm_mode_hsync); |
||
581 | |||
1123 | serge | 582 | /** |
583 | * drm_mode_vrefresh - get the vrefresh of a mode |
||
584 | * @mode: mode |
||
585 | * |
||
586 | * LOCKING: |
||
587 | * None. |
||
588 | * |
||
1321 | serge | 589 | * Return @mode's vrefresh rate in Hz or calculate it if necessary. |
1123 | serge | 590 | * |
591 | * FIXME: why is this needed? shouldn't vrefresh be set already? |
||
592 | * |
||
593 | * RETURNS: |
||
1179 | serge | 594 | * Vertical refresh rate. It will be the result of actual value plus 0.5. |
595 | * If it is 70.288, it will return 70Hz. |
||
596 | * If it is 59.6, it will return 60Hz. |
||
1123 | serge | 597 | */ |
598 | int drm_mode_vrefresh(struct drm_display_mode *mode) |
||
599 | { |
||
600 | int refresh = 0; |
||
601 | unsigned int calc_val; |
||
602 | |||
603 | if (mode->vrefresh > 0) |
||
604 | refresh = mode->vrefresh; |
||
605 | else if (mode->htotal > 0 && mode->vtotal > 0) { |
||
1179 | serge | 606 | int vtotal; |
607 | vtotal = mode->vtotal; |
||
1123 | serge | 608 | /* work out vrefresh the value will be x1000 */ |
609 | calc_val = (mode->clock * 1000); |
||
610 | calc_val /= mode->htotal; |
||
1179 | serge | 611 | refresh = (calc_val + vtotal / 2) / vtotal; |
1123 | serge | 612 | |
613 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
||
614 | refresh *= 2; |
||
615 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
||
616 | refresh /= 2; |
||
617 | if (mode->vscan > 1) |
||
618 | refresh /= mode->vscan; |
||
619 | } |
||
620 | return refresh; |
||
621 | } |
||
622 | EXPORT_SYMBOL(drm_mode_vrefresh); |
||
623 | |||
624 | /** |
||
625 | * drm_mode_set_crtcinfo - set CRTC modesetting parameters |
||
626 | * @p: mode |
||
627 | * @adjust_flags: unused? (FIXME) |
||
628 | * |
||
629 | * LOCKING: |
||
630 | * None. |
||
631 | * |
||
632 | * Setup the CRTC modesetting parameters for @p, adjusting if necessary. |
||
633 | */ |
||
634 | void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) |
||
635 | { |
||
636 | if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) |
||
637 | return; |
||
638 | |||
639 | p->crtc_hdisplay = p->hdisplay; |
||
640 | p->crtc_hsync_start = p->hsync_start; |
||
641 | p->crtc_hsync_end = p->hsync_end; |
||
642 | p->crtc_htotal = p->htotal; |
||
643 | p->crtc_hskew = p->hskew; |
||
644 | p->crtc_vdisplay = p->vdisplay; |
||
645 | p->crtc_vsync_start = p->vsync_start; |
||
646 | p->crtc_vsync_end = p->vsync_end; |
||
647 | p->crtc_vtotal = p->vtotal; |
||
648 | |||
649 | if (p->flags & DRM_MODE_FLAG_INTERLACE) { |
||
650 | if (adjust_flags & CRTC_INTERLACE_HALVE_V) { |
||
651 | p->crtc_vdisplay /= 2; |
||
652 | p->crtc_vsync_start /= 2; |
||
653 | p->crtc_vsync_end /= 2; |
||
654 | p->crtc_vtotal /= 2; |
||
655 | } |
||
656 | |||
657 | p->crtc_vtotal |= 1; |
||
658 | } |
||
659 | |||
660 | if (p->flags & DRM_MODE_FLAG_DBLSCAN) { |
||
661 | p->crtc_vdisplay *= 2; |
||
662 | p->crtc_vsync_start *= 2; |
||
663 | p->crtc_vsync_end *= 2; |
||
664 | p->crtc_vtotal *= 2; |
||
665 | } |
||
666 | |||
667 | if (p->vscan > 1) { |
||
668 | p->crtc_vdisplay *= p->vscan; |
||
669 | p->crtc_vsync_start *= p->vscan; |
||
670 | p->crtc_vsync_end *= p->vscan; |
||
671 | p->crtc_vtotal *= p->vscan; |
||
672 | } |
||
673 | |||
674 | p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); |
||
675 | p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); |
||
676 | p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); |
||
677 | p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); |
||
678 | |||
679 | p->crtc_hadjusted = false; |
||
680 | p->crtc_vadjusted = false; |
||
681 | } |
||
682 | EXPORT_SYMBOL(drm_mode_set_crtcinfo); |
||
683 | |||
684 | |||
685 | /** |
||
686 | * drm_mode_duplicate - allocate and duplicate an existing mode |
||
687 | * @m: mode to duplicate |
||
688 | * |
||
689 | * LOCKING: |
||
690 | * None. |
||
691 | * |
||
692 | * Just allocate a new mode, copy the existing mode into it, and return |
||
693 | * a pointer to it. Used to create new instances of established modes. |
||
694 | */ |
||
695 | struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, |
||
696 | struct drm_display_mode *mode) |
||
697 | { |
||
698 | struct drm_display_mode *nmode; |
||
699 | int new_id; |
||
700 | |||
701 | nmode = drm_mode_create(dev); |
||
702 | if (!nmode) |
||
703 | return NULL; |
||
704 | |||
705 | new_id = nmode->base.id; |
||
706 | *nmode = *mode; |
||
707 | nmode->base.id = new_id; |
||
708 | INIT_LIST_HEAD(&nmode->head); |
||
709 | return nmode; |
||
710 | } |
||
711 | EXPORT_SYMBOL(drm_mode_duplicate); |
||
712 | |||
713 | /** |
||
714 | * drm_mode_equal - test modes for equality |
||
715 | * @mode1: first mode |
||
716 | * @mode2: second mode |
||
717 | * |
||
718 | * LOCKING: |
||
719 | * None. |
||
720 | * |
||
721 | * Check to see if @mode1 and @mode2 are equivalent. |
||
722 | * |
||
723 | * RETURNS: |
||
724 | * True if the modes are equal, false otherwise. |
||
725 | */ |
||
726 | bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2) |
||
727 | { |
||
728 | /* do clock check convert to PICOS so fb modes get matched |
||
729 | * the same */ |
||
730 | if (mode1->clock && mode2->clock) { |
||
731 | if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) |
||
732 | return false; |
||
733 | } else if (mode1->clock != mode2->clock) |
||
734 | return false; |
||
735 | |||
736 | if (mode1->hdisplay == mode2->hdisplay && |
||
737 | mode1->hsync_start == mode2->hsync_start && |
||
738 | mode1->hsync_end == mode2->hsync_end && |
||
739 | mode1->htotal == mode2->htotal && |
||
740 | mode1->hskew == mode2->hskew && |
||
741 | mode1->vdisplay == mode2->vdisplay && |
||
742 | mode1->vsync_start == mode2->vsync_start && |
||
743 | mode1->vsync_end == mode2->vsync_end && |
||
744 | mode1->vtotal == mode2->vtotal && |
||
745 | mode1->vscan == mode2->vscan && |
||
746 | mode1->flags == mode2->flags) |
||
747 | return true; |
||
748 | |||
749 | return false; |
||
750 | } |
||
751 | EXPORT_SYMBOL(drm_mode_equal); |
||
752 | |||
753 | /** |
||
754 | * drm_mode_validate_size - make sure modes adhere to size constraints |
||
755 | * @dev: DRM device |
||
756 | * @mode_list: list of modes to check |
||
757 | * @maxX: maximum width |
||
758 | * @maxY: maximum height |
||
759 | * @maxPitch: max pitch |
||
760 | * |
||
761 | * LOCKING: |
||
762 | * Caller must hold a lock protecting @mode_list. |
||
763 | * |
||
764 | * The DRM device (@dev) has size and pitch limits. Here we validate the |
||
765 | * modes we probed for @dev against those limits and set their status as |
||
766 | * necessary. |
||
767 | */ |
||
768 | void drm_mode_validate_size(struct drm_device *dev, |
||
769 | struct list_head *mode_list, |
||
770 | int maxX, int maxY, int maxPitch) |
||
771 | { |
||
772 | struct drm_display_mode *mode; |
||
773 | |||
774 | list_for_each_entry(mode, mode_list, head) { |
||
775 | if (maxPitch > 0 && mode->hdisplay > maxPitch) |
||
776 | mode->status = MODE_BAD_WIDTH; |
||
777 | |||
778 | if (maxX > 0 && mode->hdisplay > maxX) |
||
779 | mode->status = MODE_VIRTUAL_X; |
||
780 | |||
781 | if (maxY > 0 && mode->vdisplay > maxY) |
||
782 | mode->status = MODE_VIRTUAL_Y; |
||
783 | } |
||
784 | } |
||
785 | EXPORT_SYMBOL(drm_mode_validate_size); |
||
786 | |||
787 | /** |
||
788 | * drm_mode_validate_clocks - validate modes against clock limits |
||
789 | * @dev: DRM device |
||
790 | * @mode_list: list of modes to check |
||
791 | * @min: minimum clock rate array |
||
792 | * @max: maximum clock rate array |
||
793 | * @n_ranges: number of clock ranges (size of arrays) |
||
794 | * |
||
795 | * LOCKING: |
||
796 | * Caller must hold a lock protecting @mode_list. |
||
797 | * |
||
798 | * Some code may need to check a mode list against the clock limits of the |
||
799 | * device in question. This function walks the mode list, testing to make |
||
800 | * sure each mode falls within a given range (defined by @min and @max |
||
801 | * arrays) and sets @mode->status as needed. |
||
802 | */ |
||
803 | void drm_mode_validate_clocks(struct drm_device *dev, |
||
804 | struct list_head *mode_list, |
||
805 | int *min, int *max, int n_ranges) |
||
806 | { |
||
807 | struct drm_display_mode *mode; |
||
808 | int i; |
||
809 | |||
810 | list_for_each_entry(mode, mode_list, head) { |
||
811 | bool good = false; |
||
812 | for (i = 0; i < n_ranges; i++) { |
||
813 | if (mode->clock >= min[i] && mode->clock <= max[i]) { |
||
814 | good = true; |
||
815 | break; |
||
816 | } |
||
817 | } |
||
818 | if (!good) |
||
819 | mode->status = MODE_CLOCK_RANGE; |
||
820 | } |
||
821 | } |
||
822 | EXPORT_SYMBOL(drm_mode_validate_clocks); |
||
823 | |||
824 | /** |
||
825 | * drm_mode_prune_invalid - remove invalid modes from mode list |
||
826 | * @dev: DRM device |
||
827 | * @mode_list: list of modes to check |
||
828 | * @verbose: be verbose about it |
||
829 | * |
||
830 | * LOCKING: |
||
831 | * Caller must hold a lock protecting @mode_list. |
||
832 | * |
||
833 | * Once mode list generation is complete, a caller can use this routine to |
||
834 | * remove invalid modes from a mode list. If any of the modes have a |
||
835 | * status other than %MODE_OK, they are removed from @mode_list and freed. |
||
836 | */ |
||
837 | void drm_mode_prune_invalid(struct drm_device *dev, |
||
838 | struct list_head *mode_list, bool verbose) |
||
839 | { |
||
840 | struct drm_display_mode *mode, *t; |
||
841 | |||
842 | list_for_each_entry_safe(mode, t, mode_list, head) { |
||
843 | if (mode->status != MODE_OK) { |
||
844 | list_del(&mode->head); |
||
845 | if (verbose) { |
||
846 | drm_mode_debug_printmodeline(mode); |
||
1179 | serge | 847 | DRM_DEBUG_KMS("Not using %s mode %d\n", |
1123 | serge | 848 | mode->name, mode->status); |
849 | } |
||
850 | drm_mode_destroy(dev, mode); |
||
851 | } |
||
852 | } |
||
853 | } |
||
854 | EXPORT_SYMBOL(drm_mode_prune_invalid); |
||
855 | |||
856 | /** |
||
857 | * drm_mode_compare - compare modes for favorability |
||
858 | * @lh_a: list_head for first mode |
||
859 | * @lh_b: list_head for second mode |
||
860 | * |
||
861 | * LOCKING: |
||
862 | * None. |
||
863 | * |
||
864 | * Compare two modes, given by @lh_a and @lh_b, returning a value indicating |
||
865 | * which is better. |
||
866 | * |
||
867 | * RETURNS: |
||
868 | * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or |
||
869 | * positive if @lh_b is better than @lh_a. |
||
870 | */ |
||
871 | static int drm_mode_compare(struct list_head *lh_a, struct list_head *lh_b) |
||
872 | { |
||
873 | struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); |
||
874 | struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); |
||
875 | int diff; |
||
876 | |||
877 | diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - |
||
878 | ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); |
||
879 | if (diff) |
||
880 | return diff; |
||
881 | diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; |
||
882 | if (diff) |
||
883 | return diff; |
||
884 | diff = b->clock - a->clock; |
||
885 | return diff; |
||
886 | } |
||
887 | |||
888 | /* FIXME: what we don't have a list sort function? */ |
||
889 | /* list sort from Mark J Roberts (mjr@znex.org) */ |
||
890 | void list_sort(struct list_head *head, |
||
891 | int (*cmp)(struct list_head *a, struct list_head *b)) |
||
892 | { |
||
893 | struct list_head *p, *q, *e, *list, *tail, *oldhead; |
||
894 | int insize, nmerges, psize, qsize, i; |
||
895 | |||
896 | list = head->next; |
||
897 | list_del(head); |
||
898 | insize = 1; |
||
899 | for (;;) { |
||
900 | p = oldhead = list; |
||
901 | list = tail = NULL; |
||
902 | nmerges = 0; |
||
903 | |||
904 | while (p) { |
||
905 | nmerges++; |
||
906 | q = p; |
||
907 | psize = 0; |
||
908 | for (i = 0; i < insize; i++) { |
||
909 | psize++; |
||
910 | q = q->next == oldhead ? NULL : q->next; |
||
911 | if (!q) |
||
912 | break; |
||
913 | } |
||
914 | |||
915 | qsize = insize; |
||
916 | while (psize > 0 || (qsize > 0 && q)) { |
||
917 | if (!psize) { |
||
918 | e = q; |
||
919 | q = q->next; |
||
920 | qsize--; |
||
921 | if (q == oldhead) |
||
922 | q = NULL; |
||
923 | } else if (!qsize || !q) { |
||
924 | e = p; |
||
925 | p = p->next; |
||
926 | psize--; |
||
927 | if (p == oldhead) |
||
928 | p = NULL; |
||
929 | } else if (cmp(p, q) <= 0) { |
||
930 | e = p; |
||
931 | p = p->next; |
||
932 | psize--; |
||
933 | if (p == oldhead) |
||
934 | p = NULL; |
||
935 | } else { |
||
936 | e = q; |
||
937 | q = q->next; |
||
938 | qsize--; |
||
939 | if (q == oldhead) |
||
940 | q = NULL; |
||
941 | } |
||
942 | if (tail) |
||
943 | tail->next = e; |
||
944 | else |
||
945 | list = e; |
||
946 | e->prev = tail; |
||
947 | tail = e; |
||
948 | } |
||
949 | p = q; |
||
950 | } |
||
951 | |||
952 | tail->next = list; |
||
953 | list->prev = tail; |
||
954 | |||
955 | if (nmerges <= 1) |
||
956 | break; |
||
957 | |||
958 | insize *= 2; |
||
959 | } |
||
960 | |||
961 | head->next = list; |
||
962 | head->prev = list->prev; |
||
963 | list->prev->next = head; |
||
964 | list->prev = head; |
||
965 | } |
||
966 | |||
967 | /** |
||
968 | * drm_mode_sort - sort mode list |
||
969 | * @mode_list: list to sort |
||
970 | * |
||
971 | * LOCKING: |
||
972 | * Caller must hold a lock protecting @mode_list. |
||
973 | * |
||
974 | * Sort @mode_list by favorability, putting good modes first. |
||
975 | */ |
||
976 | void drm_mode_sort(struct list_head *mode_list) |
||
977 | { |
||
978 | list_sort(mode_list, drm_mode_compare); |
||
979 | } |
||
980 | EXPORT_SYMBOL(drm_mode_sort); |
||
981 | |||
982 | /** |
||
983 | * drm_mode_connector_list_update - update the mode list for the connector |
||
984 | * @connector: the connector to update |
||
985 | * |
||
986 | * LOCKING: |
||
987 | * Caller must hold a lock protecting @mode_list. |
||
988 | * |
||
989 | * This moves the modes from the @connector probed_modes list |
||
990 | * to the actual mode list. It compares the probed mode against the current |
||
991 | * list and only adds different modes. All modes unverified after this point |
||
992 | * will be removed by the prune invalid modes. |
||
993 | */ |
||
994 | void drm_mode_connector_list_update(struct drm_connector *connector) |
||
995 | { |
||
996 | struct drm_display_mode *mode; |
||
997 | struct drm_display_mode *pmode, *pt; |
||
998 | int found_it; |
||
999 | |||
1000 | list_for_each_entry_safe(pmode, pt, &connector->probed_modes, |
||
1001 | head) { |
||
1002 | found_it = 0; |
||
1003 | /* go through current modes checking for the new probed mode */ |
||
1004 | list_for_each_entry(mode, &connector->modes, head) { |
||
1005 | if (drm_mode_equal(pmode, mode)) { |
||
1006 | found_it = 1; |
||
1007 | /* if equal delete the probed mode */ |
||
1008 | mode->status = pmode->status; |
||
1179 | serge | 1009 | /* Merge type bits together */ |
1010 | mode->type |= pmode->type; |
||
1123 | serge | 1011 | list_del(&pmode->head); |
1012 | drm_mode_destroy(connector->dev, pmode); |
||
1013 | break; |
||
1014 | } |
||
1015 | } |
||
1016 | |||
1017 | if (!found_it) { |
||
1018 | list_move_tail(&pmode->head, &connector->modes); |
||
1019 | } |
||
1020 | } |
||
1021 | } |
||
1022 | EXPORT_SYMBOL(drm_mode_connector_list_update);=>=>>=>>>>>> |