WebSVN – Kolibri OS – Blame – /drivers/video/drm/drm_edid.c

Rev	Author	Line No.	Line
1123	serge	1	/*
		2	* Copyright (c) 2006 Luc Verhaegen (quirks list)
		3	* Copyright (c) 2007-2008 Intel Corporation
		4	* Jesse Barnes
1963	serge	5	* Copyright 2010 Red Hat, Inc.
1123	serge	6	*
		7	* DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
		8	* FB layer.
		9	* Copyright (C) 2006 Dennis Munsie
		10	*
		11	* Permission is hereby granted, free of charge, to any person obtaining a
		12	* copy of this software and associated documentation files (the "Software"),
		13	* to deal in the Software without restriction, including without limitation
		14	* the rights to use, copy, modify, merge, publish, distribute, sub license,
		15	* and/or sell copies of the Software, and to permit persons to whom the
		16	* Software is furnished to do so, subject to the following conditions:
		17	*
		18	* The above copyright notice and this permission notice (including the
		19	* next paragraph) shall be included in all copies or substantial portions
		20	* of the Software.
		21	*
		22	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
		23	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
		24	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
		25	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
		26	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
		27	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
		28	* DEALINGS IN THE SOFTWARE.
		29	*/
1221	serge	30	#include
1963	serge	31	#include
3480	Serge	32	#include
1125	serge	33	#include
3031	serge	34	#include
		35	#include
		36	#include
5271	serge	37	#include
1123	serge	38
1963	serge	39	#define version_greater(edid, maj, min) \
		40	(((edid)->version > (maj)) \|\| \
		41	((edid)->version == (maj) && (edid)->revision > (min)))
1123	serge	42
1963	serge	43	#define EDID_EST_TIMINGS 16
		44	#define EDID_STD_TIMINGS 8
		45	#define EDID_DETAILED_TIMINGS 4
		46
1123	serge	47	/*
		48	* EDID blocks out in the wild have a variety of bugs, try to collect
		49	* them here (note that userspace may work around broken monitors first,
		50	* but fixes should make their way here so that the kernel "just works"
		51	* on as many displays as possible).
		52	*/
		53
		54	/* First detailed mode wrong, use largest 60Hz mode */
		55	#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
		56	/* Reported 135MHz pixel clock is too high, needs adjustment */
		57	#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
		58	/* Prefer the largest mode at 75 Hz */
		59	#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
		60	/* Detail timing is in cm not mm */
		61	#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
		62	/* Detailed timing descriptors have bogus size values, so just take the
		63	* maximum size and use that.
		64	*/
		65	#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
		66	/* Monitor forgot to set the first detailed is preferred bit. */
		67	#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
		68	/* use +hsync +vsync for detailed mode */
		69	#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
3031	serge	70	/* Force reduced-blanking timings for detailed modes */
		71	#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
4539	Serge	72	/* Force 8bpc */
		73	#define EDID_QUIRK_FORCE_8BPC (1 << 8)
5060	serge	74	/* Force 12bpc */
		75	#define EDID_QUIRK_FORCE_12BPC (1 << 9)
6660	serge	76	/* Force 6bpc */
		77	#define EDID_QUIRK_FORCE_6BPC (1 << 10)
1123	serge	78
1963	serge	79	struct detailed_mode_closure {
		80	struct drm_connector *connector;
		81	struct edid *edid;
		82	bool preferred;
		83	u32 quirks;
		84	int modes;
		85	};
1430	serge	86
1179	serge	87	#define LEVEL_DMT 0
		88	#define LEVEL_GTF 1
1963	serge	89	#define LEVEL_GTF2 2
		90	#define LEVEL_CVT 3
1179	serge	91
1123	serge	92	static struct edid_quirk {
3031	serge	93	char vendor[4];
1123	serge	94	int product_id;
		95	u32 quirks;
		96	} edid_quirk_list[] = {
		97	/* Acer AL1706 */
		98	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
		99	/* Acer F51 */
		100	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
		101	/* Unknown Acer */
		102	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
		103
6660	serge	104	/* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
		105	{ "AEO", 0, EDID_QUIRK_FORCE_6BPC },
		106
1123	serge	107	/* Belinea 10 15 55 */
		108	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
		109	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
		110
		111	/* Envision Peripherals, Inc. EN-7100e */
		112	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
1963	serge	113	/* Envision EN2028 */
		114	{ "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
1123	serge	115
		116	/* Funai Electronics PM36B */
		117	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 \|
		118	EDID_QUIRK_DETAILED_IN_CM },
		119
		120	/* LG Philips LCD LP154W01-A5 */
		121	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
		122	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
		123
		124	/* Philips 107p5 CRT */
		125	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
		126
		127	/* Proview AY765C */
		128	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
		129
		130	/* Samsung SyncMaster 205BW. Note: irony */
		131	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
		132	/* Samsung SyncMaster 22[5-6]BW */
		133	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
		134	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
3031	serge	135
5060	serge	136	/* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
		137	{ "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
		138
3031	serge	139	/* ViewSonic VA2026w */
		140	{ "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
4104	Serge	141
		142	/* Medion MD 30217 PG */
		143	{ "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
4539	Serge	144
		145	/* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
		146	{ "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
1123	serge	147	};
		148
3480	Serge	149	/*
		150	* Autogenerated from the DMT spec.
		151	* This table is copied from xfree86/modes/xf86EdidModes.c.
		152	*/
		153	static const struct drm_display_mode drm_dmt_modes[] = {
6084	serge	154	/* 0x01 - 640x350@85Hz */
3480	Serge	155	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
		156	736, 832, 0, 350, 382, 385, 445, 0,
		157	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	158	/* 0x02 - 640x400@85Hz */
3480	Serge	159	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
		160	736, 832, 0, 400, 401, 404, 445, 0,
		161	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	162	/* 0x03 - 720x400@85Hz */
3480	Serge	163	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
		164	828, 936, 0, 400, 401, 404, 446, 0,
		165	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	166	/* 0x04 - 640x480@60Hz */
3480	Serge	167	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
6084	serge	168	752, 800, 0, 480, 490, 492, 525, 0,
3480	Serge	169	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	170	/* 0x05 - 640x480@72Hz */
3480	Serge	171	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
		172	704, 832, 0, 480, 489, 492, 520, 0,
		173	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	174	/* 0x06 - 640x480@75Hz */
3480	Serge	175	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
		176	720, 840, 0, 480, 481, 484, 500, 0,
		177	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	178	/* 0x07 - 640x480@85Hz */
3480	Serge	179	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
		180	752, 832, 0, 480, 481, 484, 509, 0,
		181	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	182	/* 0x08 - 800x600@56Hz */
3480	Serge	183	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
		184	896, 1024, 0, 600, 601, 603, 625, 0,
		185	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	186	/* 0x09 - 800x600@60Hz */
3480	Serge	187	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
		188	968, 1056, 0, 600, 601, 605, 628, 0,
		189	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	190	/* 0x0a - 800x600@72Hz */
3480	Serge	191	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
		192	976, 1040, 0, 600, 637, 643, 666, 0,
		193	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	194	/* 0x0b - 800x600@75Hz */
3480	Serge	195	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
		196	896, 1056, 0, 600, 601, 604, 625, 0,
		197	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	198	/* 0x0c - 800x600@85Hz */
3480	Serge	199	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
		200	896, 1048, 0, 600, 601, 604, 631, 0,
		201	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	202	/* 0x0d - 800x600@120Hz RB */
3480	Serge	203	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
		204	880, 960, 0, 600, 603, 607, 636, 0,
		205	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	206	/* 0x0e - 848x480@60Hz */
3480	Serge	207	{ DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
		208	976, 1088, 0, 480, 486, 494, 517, 0,
		209	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	210	/* 0x0f - 1024x768@43Hz, interlace */
3480	Serge	211	{ DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
		212	1208, 1264, 0, 768, 768, 772, 817, 0,
		213	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
6084	serge	214	DRM_MODE_FLAG_INTERLACE) },
		215	/* 0x10 - 1024x768@60Hz */
3480	Serge	216	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
		217	1184, 1344, 0, 768, 771, 777, 806, 0,
		218	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	219	/* 0x11 - 1024x768@70Hz */
3480	Serge	220	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
		221	1184, 1328, 0, 768, 771, 777, 806, 0,
		222	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	223	/* 0x12 - 1024x768@75Hz */
3480	Serge	224	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
		225	1136, 1312, 0, 768, 769, 772, 800, 0,
		226	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	227	/* 0x13 - 1024x768@85Hz */
3480	Serge	228	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
		229	1168, 1376, 0, 768, 769, 772, 808, 0,
		230	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	231	/* 0x14 - 1024x768@120Hz RB */
3480	Serge	232	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
		233	1104, 1184, 0, 768, 771, 775, 813, 0,
		234	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	235	/* 0x15 - 1152x864@75Hz */
3480	Serge	236	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
		237	1344, 1600, 0, 864, 865, 868, 900, 0,
		238	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	239	/* 0x55 - 1280x720@60Hz */
		240	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
		241	1430, 1650, 0, 720, 725, 730, 750, 0,
		242	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		243	/* 0x16 - 1280x768@60Hz RB */
3480	Serge	244	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
		245	1360, 1440, 0, 768, 771, 778, 790, 0,
		246	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	247	/* 0x17 - 1280x768@60Hz */
3480	Serge	248	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
		249	1472, 1664, 0, 768, 771, 778, 798, 0,
		250	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	251	/* 0x18 - 1280x768@75Hz */
3480	Serge	252	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
		253	1488, 1696, 0, 768, 771, 778, 805, 0,
6084	serge	254	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		255	/* 0x19 - 1280x768@85Hz */
3480	Serge	256	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
		257	1496, 1712, 0, 768, 771, 778, 809, 0,
		258	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	259	/* 0x1a - 1280x768@120Hz RB */
3480	Serge	260	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
		261	1360, 1440, 0, 768, 771, 778, 813, 0,
		262	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	263	/* 0x1b - 1280x800@60Hz RB */
3480	Serge	264	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
		265	1360, 1440, 0, 800, 803, 809, 823, 0,
		266	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	267	/* 0x1c - 1280x800@60Hz */
3480	Serge	268	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
		269	1480, 1680, 0, 800, 803, 809, 831, 0,
6084	serge	270	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		271	/* 0x1d - 1280x800@75Hz */
3480	Serge	272	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
		273	1488, 1696, 0, 800, 803, 809, 838, 0,
		274	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	275	/* 0x1e - 1280x800@85Hz */
3480	Serge	276	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
		277	1496, 1712, 0, 800, 803, 809, 843, 0,
		278	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	279	/* 0x1f - 1280x800@120Hz RB */
3480	Serge	280	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
		281	1360, 1440, 0, 800, 803, 809, 847, 0,
		282	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	283	/* 0x20 - 1280x960@60Hz */
3480	Serge	284	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
		285	1488, 1800, 0, 960, 961, 964, 1000, 0,
		286	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	287	/* 0x21 - 1280x960@85Hz */
3480	Serge	288	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
		289	1504, 1728, 0, 960, 961, 964, 1011, 0,
		290	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	291	/* 0x22 - 1280x960@120Hz RB */
3480	Serge	292	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
		293	1360, 1440, 0, 960, 963, 967, 1017, 0,
		294	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	295	/* 0x23 - 1280x1024@60Hz */
3480	Serge	296	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
		297	1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
		298	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	299	/* 0x24 - 1280x1024@75Hz */
3480	Serge	300	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
		301	1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
		302	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	303	/* 0x25 - 1280x1024@85Hz */
3480	Serge	304	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
		305	1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
		306	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	307	/* 0x26 - 1280x1024@120Hz RB */
3480	Serge	308	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
		309	1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
		310	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	311	/* 0x27 - 1360x768@60Hz */
3480	Serge	312	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
		313	1536, 1792, 0, 768, 771, 777, 795, 0,
		314	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	315	/* 0x28 - 1360x768@120Hz RB */
3480	Serge	316	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
		317	1440, 1520, 0, 768, 771, 776, 813, 0,
		318	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	319	/* 0x51 - 1366x768@60Hz */
		320	{ DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
		321	1579, 1792, 0, 768, 771, 774, 798, 0,
		322	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		323	/* 0x56 - 1366x768@60Hz */
		324	{ DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
		325	1436, 1500, 0, 768, 769, 772, 800, 0,
		326	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		327	/* 0x29 - 1400x1050@60Hz RB */
3480	Serge	328	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
		329	1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
		330	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	331	/* 0x2a - 1400x1050@60Hz */
3480	Serge	332	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
		333	1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
		334	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	335	/* 0x2b - 1400x1050@75Hz */
3480	Serge	336	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
		337	1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
		338	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	339	/* 0x2c - 1400x1050@85Hz */
3480	Serge	340	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
		341	1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
		342	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	343	/* 0x2d - 1400x1050@120Hz RB */
3480	Serge	344	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
		345	1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
		346	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	347	/* 0x2e - 1440x900@60Hz RB */
3480	Serge	348	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
		349	1520, 1600, 0, 900, 903, 909, 926, 0,
		350	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	351	/* 0x2f - 1440x900@60Hz */
3480	Serge	352	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
		353	1672, 1904, 0, 900, 903, 909, 934, 0,
		354	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	355	/* 0x30 - 1440x900@75Hz */
3480	Serge	356	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
		357	1688, 1936, 0, 900, 903, 909, 942, 0,
		358	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	359	/* 0x31 - 1440x900@85Hz */
3480	Serge	360	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
		361	1696, 1952, 0, 900, 903, 909, 948, 0,
		362	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	363	/* 0x32 - 1440x900@120Hz RB */
3480	Serge	364	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
		365	1520, 1600, 0, 900, 903, 909, 953, 0,
		366	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	367	/* 0x53 - 1600x900@60Hz */
		368	{ DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
		369	1704, 1800, 0, 900, 901, 904, 1000, 0,
		370	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		371	/* 0x33 - 1600x1200@60Hz */
3480	Serge	372	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
		373	1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
		374	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	375	/* 0x34 - 1600x1200@65Hz */
3480	Serge	376	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
		377	1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
		378	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	379	/* 0x35 - 1600x1200@70Hz */
3480	Serge	380	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
		381	1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
		382	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	383	/* 0x36 - 1600x1200@75Hz */
3480	Serge	384	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
		385	1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
		386	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	387	/* 0x37 - 1600x1200@85Hz */
3480	Serge	388	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
		389	1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
		390	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	391	/* 0x38 - 1600x1200@120Hz RB */
3480	Serge	392	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
		393	1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
		394	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	395	/* 0x39 - 1680x1050@60Hz RB */
3480	Serge	396	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
		397	1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
		398	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	399	/* 0x3a - 1680x1050@60Hz */
3480	Serge	400	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
		401	1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
		402	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	403	/* 0x3b - 1680x1050@75Hz */
3480	Serge	404	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
		405	1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
		406	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	407	/* 0x3c - 1680x1050@85Hz */
3480	Serge	408	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
		409	1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
		410	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	411	/* 0x3d - 1680x1050@120Hz RB */
3480	Serge	412	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
		413	1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
		414	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	415	/* 0x3e - 1792x1344@60Hz */
3480	Serge	416	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
		417	2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
		418	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	419	/* 0x3f - 1792x1344@75Hz */
3480	Serge	420	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
		421	2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
		422	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	423	/* 0x40 - 1792x1344@120Hz RB */
3480	Serge	424	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
		425	1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
		426	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	427	/* 0x41 - 1856x1392@60Hz */
3480	Serge	428	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
		429	2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
		430	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	431	/* 0x42 - 1856x1392@75Hz */
3480	Serge	432	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
6084	serge	433	2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
3480	Serge	434	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	435	/* 0x43 - 1856x1392@120Hz RB */
3480	Serge	436	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
		437	1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
		438	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	439	/* 0x52 - 1920x1080@60Hz */
		440	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
		441	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
		442	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		443	/* 0x44 - 1920x1200@60Hz RB */
3480	Serge	444	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
		445	2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
		446	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	447	/* 0x45 - 1920x1200@60Hz */
3480	Serge	448	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
		449	2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
		450	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	451	/* 0x46 - 1920x1200@75Hz */
3480	Serge	452	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
		453	2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
		454	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	455	/* 0x47 - 1920x1200@85Hz */
3480	Serge	456	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
		457	2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
		458	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	459	/* 0x48 - 1920x1200@120Hz RB */
3480	Serge	460	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
		461	2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
		462	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	463	/* 0x49 - 1920x1440@60Hz */
3480	Serge	464	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
		465	2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
		466	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	467	/* 0x4a - 1920x1440@75Hz */
3480	Serge	468	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
		469	2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
		470	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	471	/* 0x4b - 1920x1440@120Hz RB */
3480	Serge	472	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
		473	2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
		474	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	475	/* 0x54 - 2048x1152@60Hz */
		476	{ DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
		477	2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
		478	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) },
		479	/* 0x4c - 2560x1600@60Hz RB */
3480	Serge	480	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
		481	2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
		482	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	483	/* 0x4d - 2560x1600@60Hz */
3480	Serge	484	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
		485	3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
		486	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	487	/* 0x4e - 2560x1600@75Hz */
3480	Serge	488	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
		489	3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
		490	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	491	/* 0x4f - 2560x1600@85Hz */
3480	Serge	492	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
		493	3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
		494	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) },
6084	serge	495	/* 0x50 - 2560x1600@120Hz RB */
3480	Serge	496	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
		497	2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
		498	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
6084	serge	499	/* 0x57 - 4096x2160@60Hz RB */
		500	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
		501	4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
		502	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
		503	/* 0x58 - 4096x2160@59.94Hz RB */
		504	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
		505	4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
		506	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC) },
3480	Serge	507	};
		508
4560	Serge	509	/*
		510	* These more or less come from the DMT spec. The 720x400 modes are
		511	* inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
		512	* modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
		513	* should be 1152x870, again for the Mac, but instead we use the x864 DMT
		514	* mode.
		515	*
		516	* The DMT modes have been fact-checked; the rest are mild guesses.
		517	*/
3480	Serge	518	static const struct drm_display_mode edid_est_modes[] = {
		519	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
		520	968, 1056, 0, 600, 601, 605, 628, 0,
		521	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
		522	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
		523	896, 1024, 0, 600, 601, 603, 625, 0,
		524	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
		525	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
		526	720, 840, 0, 480, 481, 484, 500, 0,
		527	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
		528	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
		529	704, 832, 0, 480, 489, 491, 520, 0,
		530	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
		531	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
		532	768, 864, 0, 480, 483, 486, 525, 0,
		533	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
		534	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
		535	752, 800, 0, 480, 490, 492, 525, 0,
		536	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
		537	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
		538	846, 900, 0, 400, 421, 423, 449, 0,
		539	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
		540	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
		541	846, 900, 0, 400, 412, 414, 449, 0,
		542	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
		543	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
		544	1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
		545	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
		546	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
		547	1136, 1312, 0, 768, 769, 772, 800, 0,
		548	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
		549	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
		550	1184, 1328, 0, 768, 771, 777, 806, 0,
		551	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
		552	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
		553	1184, 1344, 0, 768, 771, 777, 806, 0,
		554	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
		555	{ DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
		556	1208, 1264, 0, 768, 768, 776, 817, 0,
		557	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \| DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
		558	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
		559	928, 1152, 0, 624, 625, 628, 667, 0,
		560	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
		561	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
		562	896, 1056, 0, 600, 601, 604, 625, 0,
		563	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
		564	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
		565	976, 1040, 0, 600, 637, 643, 666, 0,
		566	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
		567	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
		568	1344, 1600, 0, 864, 865, 868, 900, 0,
		569	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
		570	};
		571
		572	struct minimode {
		573	short w;
		574	short h;
		575	short r;
		576	short rb;
		577	};
		578
		579	static const struct minimode est3_modes[] = {
		580	/* byte 6 */
		581	{ 640, 350, 85, 0 },
		582	{ 640, 400, 85, 0 },
		583	{ 720, 400, 85, 0 },
		584	{ 640, 480, 85, 0 },
		585	{ 848, 480, 60, 0 },
		586	{ 800, 600, 85, 0 },
		587	{ 1024, 768, 85, 0 },
		588	{ 1152, 864, 75, 0 },
		589	/* byte 7 */
		590	{ 1280, 768, 60, 1 },
		591	{ 1280, 768, 60, 0 },
		592	{ 1280, 768, 75, 0 },
		593	{ 1280, 768, 85, 0 },
		594	{ 1280, 960, 60, 0 },
		595	{ 1280, 960, 85, 0 },
		596	{ 1280, 1024, 60, 0 },
		597	{ 1280, 1024, 85, 0 },
		598	/* byte 8 */
		599	{ 1360, 768, 60, 0 },
		600	{ 1440, 900, 60, 1 },
		601	{ 1440, 900, 60, 0 },
		602	{ 1440, 900, 75, 0 },
		603	{ 1440, 900, 85, 0 },
		604	{ 1400, 1050, 60, 1 },
		605	{ 1400, 1050, 60, 0 },
		606	{ 1400, 1050, 75, 0 },
		607	/* byte 9 */
		608	{ 1400, 1050, 85, 0 },
		609	{ 1680, 1050, 60, 1 },
		610	{ 1680, 1050, 60, 0 },
		611	{ 1680, 1050, 75, 0 },
		612	{ 1680, 1050, 85, 0 },
		613	{ 1600, 1200, 60, 0 },
		614	{ 1600, 1200, 65, 0 },
		615	{ 1600, 1200, 70, 0 },
		616	/* byte 10 */
		617	{ 1600, 1200, 75, 0 },
		618	{ 1600, 1200, 85, 0 },
		619	{ 1792, 1344, 60, 0 },
4560	Serge	620	{ 1792, 1344, 75, 0 },
3480	Serge	621	{ 1856, 1392, 60, 0 },
		622	{ 1856, 1392, 75, 0 },
		623	{ 1920, 1200, 60, 1 },
		624	{ 1920, 1200, 60, 0 },
		625	/* byte 11 */
		626	{ 1920, 1200, 75, 0 },
		627	{ 1920, 1200, 85, 0 },
		628	{ 1920, 1440, 60, 0 },
		629	{ 1920, 1440, 75, 0 },
		630	};
		631
		632	static const struct minimode extra_modes[] = {
		633	{ 1024, 576, 60, 0 },
		634	{ 1366, 768, 60, 0 },
		635	{ 1600, 900, 60, 0 },
		636	{ 1680, 945, 60, 0 },
		637	{ 1920, 1080, 60, 0 },
		638	{ 2048, 1152, 60, 0 },
		639	{ 2048, 1536, 60, 0 },
		640	};
		641
		642	/*
		643	* Probably taken from CEA-861 spec.
		644	* This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
		645	*/
		646	static const struct drm_display_mode edid_cea_modes[] = {
		647	/* 1 - 640x480@60Hz */
		648	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
		649	752, 800, 0, 480, 490, 492, 525, 0,
3746	Serge	650	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	651	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	652	/* 2 - 720x480@60Hz */
		653	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
		654	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	655	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	656	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	657	/* 3 - 720x480@60Hz */
		658	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
		659	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	660	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	661	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	662	/* 4 - 1280x720@60Hz */
		663	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
		664	1430, 1650, 0, 720, 725, 730, 750, 0,
3746	Serge	665	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	666	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	667	/* 5 - 1920x1080i@60Hz */
		668	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
		669	2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
		670	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
3746	Serge	671	DRM_MODE_FLAG_INTERLACE),
4560	Serge	672	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
5271	serge	673	/* 6 - 720(1440)x480i@60Hz */
		674	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
		675	801, 858, 0, 480, 488, 494, 525, 0,
3480	Serge	676	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	677	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	678	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
5271	serge	679	/* 7 - 720(1440)x480i@60Hz */
		680	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
		681	801, 858, 0, 480, 488, 494, 525, 0,
3480	Serge	682	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	683	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	684	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
5271	serge	685	/* 8 - 720(1440)x240@60Hz */
		686	{ DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
		687	801, 858, 0, 240, 244, 247, 262, 0,
3480	Serge	688	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	689	DRM_MODE_FLAG_DBLCLK),
4560	Serge	690	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
5271	serge	691	/* 9 - 720(1440)x240@60Hz */
		692	{ DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
		693	801, 858, 0, 240, 244, 247, 262, 0,
3480	Serge	694	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	695	DRM_MODE_FLAG_DBLCLK),
4560	Serge	696	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	697	/* 10 - 2880x480i@60Hz */
		698	{ DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
		699	3204, 3432, 0, 480, 488, 494, 525, 0,
		700	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	701	DRM_MODE_FLAG_INTERLACE),
4560	Serge	702	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	703	/* 11 - 2880x480i@60Hz */
		704	{ DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
		705	3204, 3432, 0, 480, 488, 494, 525, 0,
		706	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	707	DRM_MODE_FLAG_INTERLACE),
4560	Serge	708	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	709	/* 12 - 2880x240@60Hz */
		710	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
		711	3204, 3432, 0, 240, 244, 247, 262, 0,
3746	Serge	712	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	713	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	714	/* 13 - 2880x240@60Hz */
		715	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
		716	3204, 3432, 0, 240, 244, 247, 262, 0,
3746	Serge	717	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	718	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	719	/* 14 - 1440x480@60Hz */
		720	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
		721	1596, 1716, 0, 480, 489, 495, 525, 0,
3746	Serge	722	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	723	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	724	/* 15 - 1440x480@60Hz */
		725	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
		726	1596, 1716, 0, 480, 489, 495, 525, 0,
3746	Serge	727	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	728	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	729	/* 16 - 1920x1080@60Hz */
		730	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
		731	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	732	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	733	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	734	/* 17 - 720x576@50Hz */
		735	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
		736	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	737	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	738	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	739	/* 18 - 720x576@50Hz */
		740	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
		741	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	742	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	743	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	744	/* 19 - 1280x720@50Hz */
		745	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
		746	1760, 1980, 0, 720, 725, 730, 750, 0,
3746	Serge	747	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	748	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	749	/* 20 - 1920x1080i@50Hz */
		750	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
		751	2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
		752	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
3746	Serge	753	DRM_MODE_FLAG_INTERLACE),
4560	Serge	754	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
5271	serge	755	/* 21 - 720(1440)x576i@50Hz */
		756	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
		757	795, 864, 0, 576, 580, 586, 625, 0,
3480	Serge	758	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	759	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	760	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
5271	serge	761	/* 22 - 720(1440)x576i@50Hz */
		762	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
		763	795, 864, 0, 576, 580, 586, 625, 0,
3480	Serge	764	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	765	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	766	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
5271	serge	767	/* 23 - 720(1440)x288@50Hz */
		768	{ DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
		769	795, 864, 0, 288, 290, 293, 312, 0,
3480	Serge	770	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	771	DRM_MODE_FLAG_DBLCLK),
4560	Serge	772	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
5271	serge	773	/* 24 - 720(1440)x288@50Hz */
		774	{ DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
		775	795, 864, 0, 288, 290, 293, 312, 0,
3480	Serge	776	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	777	DRM_MODE_FLAG_DBLCLK),
4560	Serge	778	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	779	/* 25 - 2880x576i@50Hz */
		780	{ DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
		781	3180, 3456, 0, 576, 580, 586, 625, 0,
		782	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	783	DRM_MODE_FLAG_INTERLACE),
4560	Serge	784	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	785	/* 26 - 2880x576i@50Hz */
		786	{ DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
		787	3180, 3456, 0, 576, 580, 586, 625, 0,
		788	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	789	DRM_MODE_FLAG_INTERLACE),
4560	Serge	790	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	791	/* 27 - 2880x288@50Hz */
		792	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
		793	3180, 3456, 0, 288, 290, 293, 312, 0,
3746	Serge	794	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	795	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	796	/* 28 - 2880x288@50Hz */
		797	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
		798	3180, 3456, 0, 288, 290, 293, 312, 0,
3746	Serge	799	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	800	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	801	/* 29 - 1440x576@50Hz */
		802	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
		803	1592, 1728, 0, 576, 581, 586, 625, 0,
3746	Serge	804	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	805	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	806	/* 30 - 1440x576@50Hz */
		807	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
		808	1592, 1728, 0, 576, 581, 586, 625, 0,
3746	Serge	809	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	810	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	811	/* 31 - 1920x1080@50Hz */
		812	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
		813	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	814	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	815	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	816	/* 32 - 1920x1080@24Hz */
		817	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
		818	2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	819	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	820	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	821	/* 33 - 1920x1080@25Hz */
		822	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
		823	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	824	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	825	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	826	/* 34 - 1920x1080@30Hz */
		827	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
		828	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	829	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	830	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	831	/* 35 - 2880x480@60Hz */
		832	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
		833	3192, 3432, 0, 480, 489, 495, 525, 0,
3746	Serge	834	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	835	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	836	/* 36 - 2880x480@60Hz */
		837	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
		838	3192, 3432, 0, 480, 489, 495, 525, 0,
3746	Serge	839	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	840	.vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	841	/* 37 - 2880x576@50Hz */
		842	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
		843	3184, 3456, 0, 576, 581, 586, 625, 0,
3746	Serge	844	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	845	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	846	/* 38 - 2880x576@50Hz */
		847	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
		848	3184, 3456, 0, 576, 581, 586, 625, 0,
3746	Serge	849	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	850	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	851	/* 39 - 1920x1080i@50Hz */
		852	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
		853	2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
		854	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	855	DRM_MODE_FLAG_INTERLACE),
4560	Serge	856	.vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	857	/* 40 - 1920x1080i@100Hz */
		858	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
		859	2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
		860	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
3746	Serge	861	DRM_MODE_FLAG_INTERLACE),
4560	Serge	862	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	863	/* 41 - 1280x720@100Hz */
		864	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
		865	1760, 1980, 0, 720, 725, 730, 750, 0,
3746	Serge	866	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	867	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	868	/* 42 - 720x576@100Hz */
		869	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
		870	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	871	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	872	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	873	/* 43 - 720x576@100Hz */
		874	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
		875	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	876	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	877	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
5271	serge	878	/* 44 - 720(1440)x576i@100Hz */
		879	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
		880	795, 864, 0, 576, 580, 586, 625, 0,
3480	Serge	881	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
5271	serge	882	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	883	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
5271	serge	884	/* 45 - 720(1440)x576i@100Hz */
		885	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
		886	795, 864, 0, 576, 580, 586, 625, 0,
3480	Serge	887	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
5271	serge	888	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	889	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	890	/* 46 - 1920x1080i@120Hz */
		891	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
		892	2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
		893	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
3746	Serge	894	DRM_MODE_FLAG_INTERLACE),
4560	Serge	895	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	896	/* 47 - 1280x720@120Hz */
		897	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
		898	1430, 1650, 0, 720, 725, 730, 750, 0,
3746	Serge	899	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	900	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	901	/* 48 - 720x480@120Hz */
		902	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
		903	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	904	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	905	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	906	/* 49 - 720x480@120Hz */
		907	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
		908	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	909	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	910	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
5271	serge	911	/* 50 - 720(1440)x480i@120Hz */
		912	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
		913	801, 858, 0, 480, 488, 494, 525, 0,
3480	Serge	914	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	915	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	916	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
5271	serge	917	/* 51 - 720(1440)x480i@120Hz */
		918	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
		919	801, 858, 0, 480, 488, 494, 525, 0,
3480	Serge	920	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	921	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	922	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	923	/* 52 - 720x576@200Hz */
		924	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
		925	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	926	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	927	.vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	928	/* 53 - 720x576@200Hz */
		929	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
		930	796, 864, 0, 576, 581, 586, 625, 0,
3746	Serge	931	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	932	.vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
5271	serge	933	/* 54 - 720(1440)x576i@200Hz */
		934	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
		935	795, 864, 0, 576, 580, 586, 625, 0,
3480	Serge	936	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	937	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	938	.vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
5271	serge	939	/* 55 - 720(1440)x576i@200Hz */
		940	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
		941	795, 864, 0, 576, 580, 586, 625, 0,
3480	Serge	942	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	943	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	944	.vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	945	/* 56 - 720x480@240Hz */
		946	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
		947	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	948	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	949	.vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
3480	Serge	950	/* 57 - 720x480@240Hz */
		951	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
		952	798, 858, 0, 480, 489, 495, 525, 0,
3746	Serge	953	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
4560	Serge	954	.vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
5271	serge	955	/* 58 - 720(1440)x480i@240 */
		956	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
		957	801, 858, 0, 480, 488, 494, 525, 0,
3480	Serge	958	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	959	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	960	.vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
5271	serge	961	/* 59 - 720(1440)x480i@240 */
		962	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
		963	801, 858, 0, 480, 488, 494, 525, 0,
3480	Serge	964	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
3746	Serge	965	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
4560	Serge	966	.vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	967	/* 60 - 1280x720@24Hz */
		968	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
		969	3080, 3300, 0, 720, 725, 730, 750, 0,
3746	Serge	970	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	971	.vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	972	/* 61 - 1280x720@25Hz */
		973	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
		974	3740, 3960, 0, 720, 725, 730, 750, 0,
3746	Serge	975	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	976	.vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	977	/* 62 - 1280x720@30Hz */
		978	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
		979	3080, 3300, 0, 720, 725, 730, 750, 0,
3746	Serge	980	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	981	.vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	982	/* 63 - 1920x1080@120Hz */
		983	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
		984	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
3746	Serge	985	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	986	.vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	987	/* 64 - 1920x1080@100Hz */
		988	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
		989	2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
3746	Serge	990	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
4560	Serge	991	.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
3480	Serge	992	};
		993
4104	Serge	994	/*
		995	* HDMI 1.4 4k modes.
		996	*/
		997	static const struct drm_display_mode edid_4k_modes[] = {
		998	/* 1 - 3840x2160@30Hz */
		999	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
		1000	3840, 4016, 4104, 4400, 0,
		1001	2160, 2168, 2178, 2250, 0,
		1002	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		1003	.vrefresh = 30, },
		1004	/* 2 - 3840x2160@25Hz */
		1005	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
		1006	3840, 4896, 4984, 5280, 0,
		1007	2160, 2168, 2178, 2250, 0,
		1008	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		1009	.vrefresh = 25, },
		1010	/* 3 - 3840x2160@24Hz */
		1011	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
		1012	3840, 5116, 5204, 5500, 0,
		1013	2160, 2168, 2178, 2250, 0,
		1014	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		1015	.vrefresh = 24, },
		1016	/* 4 - 4096x2160@24Hz (SMPTE) */
		1017	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
		1018	4096, 5116, 5204, 5500, 0,
		1019	2160, 2168, 2178, 2250, 0,
		1020	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
		1021	.vrefresh = 24, },
		1022	};
		1023
1963	serge	1024	/* DDC fetch and block validation */
1123	serge	1025
1221	serge	1026	static const u8 edid_header[] = {
		1027	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
		1028	};
1123	serge	1029
5060	serge	1030	/**
		1031	* drm_edid_header_is_valid - sanity check the header of the base EDID block
		1032	* @raw_edid: pointer to raw base EDID block
		1033	*
		1034	* Sanity check the header of the base EDID block.
		1035	*
		1036	* Return: 8 if the header is perfect, down to 0 if it's totally wrong.
2160	serge	1037	*/
		1038	int drm_edid_header_is_valid(const u8 *raw_edid)
		1039	{
		1040	int i, score = 0;
		1041
		1042	for (i = 0; i < sizeof(edid_header); i++)
		1043	if (raw_edid[i] == edid_header[i])
		1044	score++;
		1045
		1046	return score;
		1047	}
		1048	EXPORT_SYMBOL(drm_edid_header_is_valid);
		1049
3031	serge	1050	static int edid_fixup __read_mostly = 6;
3480	Serge	1051	module_param_named(edid_fixup, edid_fixup, int, 0400);
		1052	MODULE_PARM_DESC(edid_fixup,
		1053	"Minimum number of valid EDID header bytes (0-8, default 6)");
2160	serge	1054
5271	serge	1055	static void drm_get_displayid(struct drm_connector *connector,
		1056	struct edid *edid);
		1057
		1058	static int drm_edid_block_checksum(const u8 *raw_edid)
		1059	{
		1060	int i;
		1061	u8 csum = 0;
		1062	for (i = 0; i < EDID_LENGTH; i++)
		1063	csum += raw_edid[i];
		1064
		1065	return csum;
		1066	}
		1067
		1068	static bool drm_edid_is_zero(const u8 *in_edid, int length)
		1069	{
		1070	if (memchr_inv(in_edid, 0, length))
		1071	return false;
		1072
		1073	return true;
		1074	}
		1075
5060	serge	1076	/**
		1077	* drm_edid_block_valid - Sanity check the EDID block (base or extension)
		1078	* @raw_edid: pointer to raw EDID block
		1079	* @block: type of block to validate (0 for base, extension otherwise)
		1080	* @print_bad_edid: if true, dump bad EDID blocks to the console
6084	serge	1081	* @edid_corrupt: if true, the header or checksum is invalid
5060	serge	1082	*
		1083	* Validate a base or extension EDID block and optionally dump bad blocks to
		1084	* the console.
		1085	*
		1086	* Return: True if the block is valid, false otherwise.
1123	serge	1087	*/
6084	serge	1088	bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
		1089	bool *edid_corrupt)
1123	serge	1090	{
5271	serge	1091	u8 csum;
1963	serge	1092	struct edid edid = (struct edid )raw_edid;
1123	serge	1093
4075	Serge	1094	if (WARN_ON(!raw_edid))
		1095	return false;
		1096
3031	serge	1097	if (edid_fixup > 8 \|\| edid_fixup < 0)
		1098	edid_fixup = 6;
		1099
		1100	if (block == 0) {
2160	serge	1101	int score = drm_edid_header_is_valid(raw_edid);
6084	serge	1102	if (score == 8) {
		1103	if (edid_corrupt)
		1104	*edid_corrupt = false;
		1105	} else if (score >= edid_fixup) {
		1106	/* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
		1107	* The corrupt flag needs to be set here otherwise, the
		1108	* fix-up code here will correct the problem, the
		1109	* checksum is correct and the test fails
		1110	*/
		1111	if (edid_corrupt)
		1112	*edid_corrupt = true;
		1113	DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
		1114	memcpy(raw_edid, edid_header, sizeof(edid_header));
1963	serge	1115	} else {
6084	serge	1116	if (edid_corrupt)
		1117	*edid_corrupt = true;
		1118	goto bad;
1963	serge	1119	}
		1120	}
1123	serge	1121
5271	serge	1122	csum = drm_edid_block_checksum(raw_edid);
1123	serge	1123	if (csum) {
3120	serge	1124	if (print_bad_edid) {
6084	serge	1125	DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
3120	serge	1126	}
1963	serge	1127
6084	serge	1128	if (edid_corrupt)
		1129	*edid_corrupt = true;
		1130
1963	serge	1131	/* allow CEA to slide through, switches mangle this */
		1132	if (raw_edid[0] != 0x02)
6084	serge	1133	goto bad;
1123	serge	1134	}
		1135
1963	serge	1136	/* per-block-type checks */
		1137	switch (raw_edid[0]) {
		1138	case 0: /* base */
6084	serge	1139	if (edid->version != 1) {
		1140	DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
		1141	goto bad;
		1142	}
1321	serge	1143
6084	serge	1144	if (edid->revision > 4)
		1145	DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1963	serge	1146	break;
1321	serge	1147
1963	serge	1148	default:
		1149	break;
		1150	}
		1151
4075	Serge	1152	return true;
1123	serge	1153
		1154	bad:
4075	Serge	1155	if (print_bad_edid) {
5271	serge	1156	if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
		1157	printk(KERN_ERR "EDID block is all zeroes\n");
		1158	} else {
6084	serge	1159	printk(KERN_ERR "Raw EDID:\n");
		1160	print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
3480	Serge	1161	raw_edid, EDID_LENGTH, false);
6084	serge	1162	}
1123	serge	1163	}
4075	Serge	1164	return false;
1123	serge	1165	}
3031	serge	1166	EXPORT_SYMBOL(drm_edid_block_valid);
1963	serge	1167
		1168	/**
		1169	* drm_edid_is_valid - sanity check EDID data
		1170	* @edid: EDID data
		1171	*
		1172	* Sanity-check an entire EDID record (including extensions)
5060	serge	1173	*
		1174	* Return: True if the EDID data is valid, false otherwise.
1963	serge	1175	*/
		1176	bool drm_edid_is_valid(struct edid *edid)
		1177	{
		1178	int i;
		1179	u8 raw = (u8 )edid;
		1180
		1181	if (!edid)
		1182	return false;
		1183
		1184	for (i = 0; i <= edid->extensions; i++)
6084	serge	1185	if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1963	serge	1186	return false;
		1187
		1188	return true;
		1189	}
1430	serge	1190	EXPORT_SYMBOL(drm_edid_is_valid);
1123	serge	1191
1963	serge	1192	#define DDC_SEGMENT_ADDR 0x30
1123	serge	1193	/**
5060	serge	1194	* drm_do_probe_ddc_edid() - get EDID information via I2C
5271	serge	1195	* @data: I2C device adapter
5060	serge	1196	* @buf: EDID data buffer to be filled
		1197	* @block: 128 byte EDID block to start fetching from
		1198	* @len: EDID data buffer length to fetch
1963	serge	1199	*
5060	serge	1200	* Try to fetch EDID information by calling I2C driver functions.
1963	serge	1201	*
5060	serge	1202	* Return: 0 on success or -1 on failure.
1963	serge	1203	*/
		1204	static int
5271	serge	1205	drm_do_probe_ddc_edid(void data, u8 buf, unsigned int block, size_t len)
1963	serge	1206	{
5271	serge	1207	struct i2c_adapter *adapter = data;
1963	serge	1208	unsigned char start = block * EDID_LENGTH;
3031	serge	1209	unsigned char segment = block >> 1;
		1210	unsigned char xfers = segment ? 3 : 2;
1963	serge	1211	int ret, retries = 5;
		1212
5060	serge	1213	/*
		1214	* The core I2C driver will automatically retry the transfer if the
1963	serge	1215	* adapter reports EAGAIN. However, we find that bit-banging transfers
		1216	* are susceptible to errors under a heavily loaded machine and
		1217	* generate spurious NAKs and timeouts. Retrying the transfer
		1218	* of the individual block a few times seems to overcome this.
		1219	*/
		1220	do {
6084	serge	1221	struct i2c_msg msgs[] = {
		1222	{
3031	serge	1223	.addr = DDC_SEGMENT_ADDR,
		1224	.flags = 0,
		1225	.len = 1,
		1226	.buf = &segment,
		1227	}, {
6084	serge	1228	.addr = DDC_ADDR,
		1229	.flags = 0,
		1230	.len = 1,
		1231	.buf = &start,
		1232	}, {
		1233	.addr = DDC_ADDR,
		1234	.flags = I2C_M_RD,
		1235	.len = len,
		1236	.buf = buf,
		1237	}
		1238	};
1963	serge	1239
6084	serge	1240	/*
5060	serge	1241	* Avoid sending the segment addr to not upset non-compliant
		1242	* DDC monitors.
6084	serge	1243	*/
3031	serge	1244	ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
		1245
		1246	if (ret == -ENXIO) {
		1247	DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
		1248	adapter->name);
		1249	break;
		1250	}
		1251	} while (ret != xfers && --retries);
		1252
		1253	return ret == xfers ? 0 : -1;
1963	serge	1254	}
		1255
5271	serge	1256	/**
		1257	* drm_do_get_edid - get EDID data using a custom EDID block read function
		1258	* @connector: connector we're probing
		1259	* @get_edid_block: EDID block read function
		1260	* @data: private data passed to the block read function
		1261	*
		1262	* When the I2C adapter connected to the DDC bus is hidden behind a device that
		1263	* exposes a different interface to read EDID blocks this function can be used
		1264	* to get EDID data using a custom block read function.
		1265	*
		1266	* As in the general case the DDC bus is accessible by the kernel at the I2C
		1267	* level, drivers must make all reasonable efforts to expose it as an I2C
		1268	* adapter and use drm_get_edid() instead of abusing this function.
		1269	*
		1270	* Return: Pointer to valid EDID or NULL if we couldn't find any.
		1271	*/
		1272	struct edid drm_do_get_edid(struct drm_connector connector,
		1273	int (get_edid_block)(void data, u8 *buf, unsigned int block,
		1274	size_t len),
		1275	void *data)
2004	serge	1276	{
1963	serge	1277	int i, j = 0, valid_extensions = 0;
		1278	u8 block, new;
3031	serge	1279	bool print_bad_edid = !connector->bad_edid_counter \|\| (drm_debug & DRM_UT_KMS);
1963	serge	1280
		1281	if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
		1282	return NULL;
		1283
		1284	/* base block fetch */
		1285	for (i = 0; i < 4; i++) {
5271	serge	1286	if (get_edid_block(data, block, 0, EDID_LENGTH))
6084	serge	1287	goto out;
		1288	if (drm_edid_block_valid(block, 0, print_bad_edid,
		1289	&connector->edid_corrupt))
1963	serge	1290	break;
2004	serge	1291	if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
		1292	connector->null_edid_counter++;
		1293	goto carp;
		1294	}
1963	serge	1295	}
		1296	if (i == 4)
		1297	goto carp;
		1298
		1299	/* if there's no extensions, we're done */
		1300	if (block[0x7e] == 0)
5271	serge	1301	return (struct edid *)block;
1963	serge	1302
3480	Serge	1303	new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1963	serge	1304	if (!new)
		1305	goto out;
		1306	block = new;
		1307
		1308	for (j = 1; j <= block[0x7e]; j++) {
		1309	for (i = 0; i < 4; i++) {
5271	serge	1310	if (get_edid_block(data,
1963	serge	1311	block + (valid_extensions + 1) * EDID_LENGTH,
		1312	j, EDID_LENGTH))
		1313	goto out;
6084	serge	1314	if (drm_edid_block_valid(block + (valid_extensions + 1)
		1315	* EDID_LENGTH, j,
		1316	print_bad_edid,
		1317	NULL)) {
1963	serge	1318	valid_extensions++;
		1319	break;
6084	serge	1320	}
1963	serge	1321	}
3480	Serge	1322
		1323	if (i == 4 && print_bad_edid) {
1963	serge	1324	dev_warn(connector->dev->dev,
		1325	"%s: Ignoring invalid EDID block %d.\n",
5060	serge	1326	connector->name, j);
3480	Serge	1327
		1328	connector->bad_edid_counter++;
		1329	}
1963	serge	1330	}
		1331
		1332	if (valid_extensions != block[0x7e]) {
		1333	block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
		1334	block[0x7e] = valid_extensions;
3480	Serge	1335	new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
6084	serge	1336	if (!new)
1963	serge	1337	goto out;
		1338	block = new;
		1339	}
		1340
5271	serge	1341	return (struct edid *)block;
1963	serge	1342
		1343	carp:
3031	serge	1344	if (print_bad_edid) {
6084	serge	1345	dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
5060	serge	1346	connector->name, j);
3031	serge	1347	}
		1348	connector->bad_edid_counter++;
1963	serge	1349
		1350	out:
		1351	kfree(block);
		1352	return NULL;
		1353	}
5271	serge	1354	EXPORT_SYMBOL_GPL(drm_do_get_edid);
1963	serge	1355
		1356	/**
5060	serge	1357	* drm_probe_ddc() - probe DDC presence
		1358	* @adapter: I2C adapter to probe
1963	serge	1359	*
5060	serge	1360	* Return: True on success, false on failure.
1963	serge	1361	*/
3031	serge	1362	bool
1963	serge	1363	drm_probe_ddc(struct i2c_adapter *adapter)
		1364	{
		1365	unsigned char out;
		1366
		1367	return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
		1368	}
3031	serge	1369	EXPORT_SYMBOL(drm_probe_ddc);
1963	serge	1370
		1371	/**
		1372	* drm_get_edid - get EDID data, if available
		1373	* @connector: connector we're probing
5060	serge	1374	* @adapter: I2C adapter to use for DDC
1963	serge	1375	*
5060	serge	1376	* Poke the given I2C channel to grab EDID data if possible. If found,
1963	serge	1377	* attach it to the connector.
		1378	*
5060	serge	1379	* Return: Pointer to valid EDID or NULL if we couldn't find any.
1963	serge	1380	*/
		1381	struct edid drm_get_edid(struct drm_connector connector,
		1382	struct i2c_adapter *adapter)
		1383	{
5271	serge	1384	struct edid *edid;
1963	serge	1385
5271	serge	1386	if (!drm_probe_ddc(adapter))
		1387	return NULL;
1963	serge	1388
5271	serge	1389	edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
		1390	if (edid)
		1391	drm_get_displayid(connector, edid);
1963	serge	1392	return edid;
		1393	}
		1394	EXPORT_SYMBOL(drm_get_edid);
		1395
4560	Serge	1396	/**
		1397	* drm_edid_duplicate - duplicate an EDID and the extensions
		1398	* @edid: EDID to duplicate
		1399	*
5060	serge	1400	* Return: Pointer to duplicated EDID or NULL on allocation failure.
4560	Serge	1401	*/
		1402	struct edid drm_edid_duplicate(const struct edid edid)
		1403	{
		1404	return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
		1405	}
		1406	EXPORT_SYMBOL(drm_edid_duplicate);
		1407
1963	serge	1408	/* EDID parsing */
		1409
		1410	/**
1123	serge	1411	* edid_vendor - match a string against EDID's obfuscated vendor field
		1412	* @edid: EDID to match
		1413	* @vendor: vendor string
		1414	*
		1415	* Returns true if @vendor is in @edid, false otherwise
		1416	*/
		1417	static bool edid_vendor(struct edid edid, char vendor)
		1418	{
		1419	char edid_vendor[3];
		1420
		1421	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
		1422	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) \|
		1423	((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
		1424	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
		1425
		1426	return !strncmp(edid_vendor, vendor, 3);
		1427	}
		1428
		1429	/**
		1430	* edid_get_quirks - return quirk flags for a given EDID
		1431	* @edid: EDID to process
		1432	*
		1433	* This tells subsequent routines what fixes they need to apply.
		1434	*/
		1435	static u32 edid_get_quirks(struct edid *edid)
		1436	{
		1437	struct edid_quirk *quirk;
		1438	int i;
		1439
		1440	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
		1441	quirk = &edid_quirk_list[i];
		1442
		1443	if (edid_vendor(edid, quirk->vendor) &&
		1444	(EDID_PRODUCT_ID(edid) == quirk->product_id))
		1445	return quirk->quirks;
		1446	}
		1447
		1448	return 0;
		1449	}
		1450
		1451	#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
4560	Serge	1452	#define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1123	serge	1453
		1454	/**
		1455	* edid_fixup_preferred - set preferred modes based on quirk list
		1456	* @connector: has mode list to fix up
		1457	* @quirks: quirks list
		1458	*
		1459	* Walk the mode list for @connector, clearing the preferred status
		1460	* on existing modes and setting it anew for the right mode ala @quirks.
		1461	*/
		1462	static void edid_fixup_preferred(struct drm_connector *connector,
		1463	u32 quirks)
		1464	{
		1465	struct drm_display_mode t, cur_mode, *preferred_mode;
		1466	int target_refresh = 0;
4560	Serge	1467	int cur_vrefresh, preferred_vrefresh;
1123	serge	1468
		1469	if (list_empty(&connector->probed_modes))
		1470	return;
		1471
		1472	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
		1473	target_refresh = 60;
		1474	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
		1475	target_refresh = 75;
		1476
		1477	preferred_mode = list_first_entry(&connector->probed_modes,
		1478	struct drm_display_mode, head);
		1479
		1480	list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
		1481	cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
		1482
		1483	if (cur_mode == preferred_mode)
		1484	continue;
		1485
		1486	/* Largest mode is preferred */
		1487	if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
		1488	preferred_mode = cur_mode;
		1489
4560	Serge	1490	cur_vrefresh = cur_mode->vrefresh ?
		1491	cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
		1492	preferred_vrefresh = preferred_mode->vrefresh ?
		1493	preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1123	serge	1494	/* At a given size, try to get closest to target refresh */
		1495	if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
4560	Serge	1496	MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
		1497	MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1123	serge	1498	preferred_mode = cur_mode;
		1499	}
		1500	}
		1501
		1502	preferred_mode->type \|= DRM_MODE_TYPE_PREFERRED;
		1503	}
		1504
3031	serge	1505	static bool
		1506	mode_is_rb(const struct drm_display_mode *mode)
		1507	{
		1508	return (mode->htotal - mode->hdisplay == 160) &&
		1509	(mode->hsync_end - mode->hdisplay == 80) &&
		1510	(mode->hsync_end - mode->hsync_start == 32) &&
		1511	(mode->vsync_start - mode->vdisplay == 3);
		1512	}
		1513
		1514	/*
		1515	* drm_mode_find_dmt - Create a copy of a mode if present in DMT
		1516	* @dev: Device to duplicate against
		1517	* @hsize: Mode width
		1518	* @vsize: Mode height
		1519	* @fresh: Mode refresh rate
		1520	* @rb: Mode reduced-blanking-ness
		1521	*
		1522	* Walk the DMT mode list looking for a match for the given parameters.
5060	serge	1523	*
		1524	* Return: A newly allocated copy of the mode, or NULL if not found.
3031	serge	1525	*/
1963	serge	1526	struct drm_display_mode drm_mode_find_dmt(struct drm_device dev,
3031	serge	1527	int hsize, int vsize, int fresh,
		1528	bool rb)
1179	serge	1529	{
1321	serge	1530	int i;
1179	serge	1531
3480	Serge	1532	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1963	serge	1533	const struct drm_display_mode *ptr = &drm_dmt_modes[i];
3031	serge	1534	if (hsize != ptr->hdisplay)
		1535	continue;
		1536	if (vsize != ptr->vdisplay)
		1537	continue;
		1538	if (fresh != drm_mode_vrefresh(ptr))
		1539	continue;
		1540	if (rb != mode_is_rb(ptr))
		1541	continue;
		1542
		1543	return drm_mode_duplicate(dev, ptr);
6084	serge	1544	}
3031	serge	1545
		1546	return NULL;
1179	serge	1547	}
1963	serge	1548	EXPORT_SYMBOL(drm_mode_find_dmt);
1221	serge	1549
1963	serge	1550	typedef void detailed_cb(struct detailed_timing timing, void closure);
		1551
		1552	static void
		1553	cea_for_each_detailed_block(u8 ext, detailed_cb cb, void *closure)
		1554	{
		1555	int i, n = 0;
3031	serge	1556	u8 d = ext[0x02];
1963	serge	1557	u8 *det_base = ext + d;
		1558
3031	serge	1559	n = (127 - d) / 18;
1963	serge	1560	for (i = 0; i < n; i++)
		1561	cb((struct detailed_timing )(det_base + 18 i), closure);
		1562	}
		1563
		1564	static void
		1565	vtb_for_each_detailed_block(u8 ext, detailed_cb cb, void *closure)
		1566	{
		1567	unsigned int i, n = min((int)ext[0x02], 6);
		1568	u8 *det_base = ext + 5;
		1569
		1570	if (ext[0x01] != 1)
		1571	return; /* unknown version */
		1572
		1573	for (i = 0; i < n; i++)
		1574	cb((struct detailed_timing )(det_base + 18 i), closure);
		1575	}
		1576
		1577	static void
		1578	drm_for_each_detailed_block(u8 raw_edid, detailed_cb cb, void *closure)
		1579	{
		1580	int i;
		1581	struct edid edid = (struct edid )raw_edid;
		1582
		1583	if (edid == NULL)
		1584	return;
		1585
		1586	for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
		1587	cb(&(edid->detailed_timings[i]), closure);
		1588
		1589	for (i = 1; i <= raw_edid[0x7e]; i++) {
		1590	u8 ext = raw_edid + (i EDID_LENGTH);
		1591	switch (*ext) {
		1592	case CEA_EXT:
		1593	cea_for_each_detailed_block(ext, cb, closure);
		1594	break;
		1595	case VTB_EXT:
		1596	vtb_for_each_detailed_block(ext, cb, closure);
		1597	break;
		1598	default:
		1599	break;
		1600	}
		1601	}
		1602	}
		1603
		1604	static void
		1605	is_rb(struct detailed_timing t, void data)
		1606	{
		1607	u8 r = (u8 )t;
		1608	if (r[3] == EDID_DETAIL_MONITOR_RANGE)
		1609	if (r[15] & 0x10)
		1610	(bool )data = true;
		1611	}
		1612
		1613	/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
		1614	static bool
		1615	drm_monitor_supports_rb(struct edid *edid)
		1616	{
		1617	if (edid->revision >= 4) {
3031	serge	1618	bool ret = false;
1963	serge	1619	drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
		1620	return ret;
		1621	}
		1622
		1623	return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
		1624	}
		1625
		1626	static void
		1627	find_gtf2(struct detailed_timing t, void data)
		1628	{
		1629	u8 r = (u8 )t;
		1630	if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
		1631	(u8 *)data = r;
		1632	}
		1633
		1634	/* Secondary GTF curve kicks in above some break frequency */
		1635	static int
		1636	drm_gtf2_hbreak(struct edid *edid)
		1637	{
		1638	u8 *r = NULL;
		1639	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
		1640	return r ? (r[12] * 2) : 0;
		1641	}
		1642
		1643	static int
		1644	drm_gtf2_2c(struct edid *edid)
		1645	{
		1646	u8 *r = NULL;
		1647	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
		1648	return r ? r[13] : 0;
		1649	}
		1650
		1651	static int
		1652	drm_gtf2_m(struct edid *edid)
		1653	{
		1654	u8 *r = NULL;
		1655	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
		1656	return r ? (r[15] << 8) + r[14] : 0;
		1657	}
		1658
		1659	static int
		1660	drm_gtf2_k(struct edid *edid)
		1661	{
		1662	u8 *r = NULL;
		1663	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
		1664	return r ? r[16] : 0;
		1665	}
		1666
		1667	static int
		1668	drm_gtf2_2j(struct edid *edid)
		1669	{
		1670	u8 *r = NULL;
		1671	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
		1672	return r ? r[17] : 0;
		1673	}
		1674
		1675	/**
		1676	* standard_timing_level - get std. timing level(CVT/GTF/DMT)
		1677	* @edid: EDID block to scan
		1678	*/
		1679	static int standard_timing_level(struct edid *edid)
		1680	{
		1681	if (edid->revision >= 2) {
		1682	if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
		1683	return LEVEL_CVT;
		1684	if (drm_gtf2_hbreak(edid))
		1685	return LEVEL_GTF2;
		1686	return LEVEL_GTF;
		1687	}
		1688	return LEVEL_DMT;
		1689	}
		1690
1221	serge	1691	/*
		1692	* 0 is reserved. The spec says 0x01 fill for unused timings. Some old
		1693	* monitors fill with ascii space (0x20) instead.
		1694	*/
		1695	static int
		1696	bad_std_timing(u8 a, u8 b)
		1697	{
		1698	return (a == 0x00 && b == 0x00) \|\|
		1699	(a == 0x01 && b == 0x01) \|\|
		1700	(a == 0x20 && b == 0x20);
		1701	}
		1702
1123	serge	1703	/**
		1704	* drm_mode_std - convert standard mode info (width, height, refresh) into mode
5060	serge	1705	* @connector: connector of for the EDID block
		1706	* @edid: EDID block to scan
1123	serge	1707	* @t: standard timing params
		1708	*
		1709	* Take the standard timing params (in this case width, aspect, and refresh)
1221	serge	1710	* and convert them into a real mode using CVT/GTF/DMT.
1123	serge	1711	*/
1963	serge	1712	static struct drm_display_mode *
		1713	drm_mode_std(struct drm_connector connector, struct edid edid,
5060	serge	1714	struct std_timing *t)
1123	serge	1715	{
1963	serge	1716	struct drm_device *dev = connector->dev;
		1717	struct drm_display_mode m, mode = NULL;
1179	serge	1718	int hsize, vsize;
		1719	int vrefresh_rate;
1123	serge	1720	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
		1721	>> EDID_TIMING_ASPECT_SHIFT;
1179	serge	1722	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
		1723	>> EDID_TIMING_VFREQ_SHIFT;
1963	serge	1724	int timing_level = standard_timing_level(edid);
1123	serge	1725
1221	serge	1726	if (bad_std_timing(t->hsize, t->vfreq_aspect))
		1727	return NULL;
		1728
1179	serge	1729	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
		1730	hsize = t->hsize * 8 + 248;
		1731	/* vrefresh_rate = vfreq + 60 */
		1732	vrefresh_rate = vfreq + 60;
		1733	/* the vdisplay is calculated based on the aspect ratio */
1221	serge	1734	if (aspect_ratio == 0) {
5060	serge	1735	if (edid->revision < 3)
1221	serge	1736	vsize = hsize;
		1737	else
6084	serge	1738	vsize = (hsize * 10) / 16;
1221	serge	1739	} else if (aspect_ratio == 1)
1123	serge	1740	vsize = (hsize * 3) / 4;
		1741	else if (aspect_ratio == 2)
		1742	vsize = (hsize * 4) / 5;
		1743	else
		1744	vsize = (hsize * 9) / 16;
1963	serge	1745
		1746	/* HDTV hack, part 1 */
		1747	if (vrefresh_rate == 60 &&
		1748	((hsize == 1360 && vsize == 765) \|\|
		1749	(hsize == 1368 && vsize == 769))) {
		1750	hsize = 1366;
		1751	vsize = 768;
		1752	}
		1753
		1754	/*
		1755	* If this connector already has a mode for this size and refresh
		1756	* rate (because it came from detailed or CVT info), use that
		1757	* instead. This way we don't have to guess at interlace or
		1758	* reduced blanking.
		1759	*/
		1760	list_for_each_entry(m, &connector->probed_modes, head)
		1761	if (m->hdisplay == hsize && m->vdisplay == vsize &&
		1762	drm_mode_vrefresh(m) == vrefresh_rate)
		1763	return NULL;
		1764
		1765	/* HDTV hack, part 2 */
		1766	if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
		1767	mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1221	serge	1768	false);
1179	serge	1769	mode->hdisplay = 1366;
1963	serge	1770	mode->hsync_start = mode->hsync_start - 1;
		1771	mode->hsync_end = mode->hsync_end - 1;
1179	serge	1772	return mode;
		1773	}
1963	serge	1774
1179	serge	1775	/* check whether it can be found in default mode table */
3031	serge	1776	if (drm_monitor_supports_rb(edid)) {
		1777	mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
		1778	true);
		1779	if (mode)
		1780	return mode;
		1781	}
		1782	mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1179	serge	1783	if (mode)
		1784	return mode;
1123	serge	1785
3031	serge	1786	/* okay, generate it */
1179	serge	1787	switch (timing_level) {
		1788	case LEVEL_DMT:
		1789	break;
		1790	case LEVEL_GTF:
		1791	mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
		1792	break;
1963	serge	1793	case LEVEL_GTF2:
		1794	/*
		1795	* This is potentially wrong if there's ever a monitor with
		1796	* more than one ranges section, each claiming a different
		1797	* secondary GTF curve. Please don't do that.
		1798	*/
		1799	mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
3031	serge	1800	if (!mode)
		1801	return NULL;
1963	serge	1802	if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
3031	serge	1803	drm_mode_destroy(dev, mode);
1963	serge	1804	mode = drm_gtf_mode_complex(dev, hsize, vsize,
		1805	vrefresh_rate, 0, 0,
		1806	drm_gtf2_m(edid),
		1807	drm_gtf2_2c(edid),
		1808	drm_gtf2_k(edid),
		1809	drm_gtf2_2j(edid));
		1810	}
		1811	break;
1179	serge	1812	case LEVEL_CVT:
1221	serge	1813	mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
		1814	false);
1179	serge	1815	break;
		1816	}
1123	serge	1817	return mode;
		1818	}
		1819
1428	serge	1820	/*
		1821	* EDID is delightfully ambiguous about how interlaced modes are to be
		1822	* encoded. Our internal representation is of frame height, but some
		1823	* HDTV detailed timings are encoded as field height.
		1824	*
		1825	* The format list here is from CEA, in frame size. Technically we
		1826	* should be checking refresh rate too. Whatever.
		1827	*/
		1828	static void
		1829	drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
		1830	struct detailed_pixel_timing *pt)
		1831	{
		1832	int i;
		1833	static const struct {
		1834	int w, h;
		1835	} cea_interlaced[] = {
		1836	{ 1920, 1080 },
		1837	{ 720, 480 },
		1838	{ 1440, 480 },
		1839	{ 2880, 480 },
		1840	{ 720, 576 },
		1841	{ 1440, 576 },
		1842	{ 2880, 576 },
		1843	};
		1844
		1845	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
		1846	return;
		1847
1963	serge	1848	for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1428	serge	1849	if ((mode->hdisplay == cea_interlaced[i].w) &&
		1850	(mode->vdisplay == cea_interlaced[i].h / 2)) {
		1851	mode->vdisplay *= 2;
		1852	mode->vsync_start *= 2;
		1853	mode->vsync_end *= 2;
		1854	mode->vtotal *= 2;
		1855	mode->vtotal \|= 1;
		1856	}
		1857	}
		1858
		1859	mode->flags \|= DRM_MODE_FLAG_INTERLACE;
		1860	}
		1861
1123	serge	1862	/**
		1863	* drm_mode_detailed - create a new mode from an EDID detailed timing section
		1864	* @dev: DRM device (needed to create new mode)
		1865	* @edid: EDID block
		1866	* @timing: EDID detailed timing info
		1867	* @quirks: quirks to apply
		1868	*
		1869	* An EDID detailed timing block contains enough info for us to create and
		1870	* return a new struct drm_display_mode.
		1871	*/
		1872	static struct drm_display_mode drm_mode_detailed(struct drm_device dev,
		1873	struct edid *edid,
		1874	struct detailed_timing *timing,
		1875	u32 quirks)
		1876	{
		1877	struct drm_display_mode *mode;
		1878	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
		1879	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 \| pt->hactive_lo;
		1880	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 \| pt->vactive_lo;
		1881	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 \| pt->hblank_lo;
		1882	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 \| pt->vblank_lo;
		1883	unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 \| pt->hsync_offset_lo;
		1884	unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 \| pt->hsync_pulse_width_lo;
3480	Serge	1885	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 \| pt->vsync_offset_pulse_width_lo >> 4;
1123	serge	1886	unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 \| (pt->vsync_offset_pulse_width_lo & 0xf);
		1887
		1888	/* ignore tiny modes */
		1889	if (hactive < 64 \|\| vactive < 64)
		1890	return NULL;
		1891
		1892	if (pt->misc & DRM_EDID_PT_STEREO) {
4075	Serge	1893	DRM_DEBUG_KMS("stereo mode not supported\n");
1123	serge	1894	return NULL;
		1895	}
		1896	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
4075	Serge	1897	DRM_DEBUG_KMS("composite sync not supported\n");
1123	serge	1898	}
		1899
1246	serge	1900	/* it is incorrect if hsync/vsync width is zero */
		1901	if (!hsync_pulse_width \|\| !vsync_pulse_width) {
		1902	DRM_DEBUG_KMS("Incorrect Detailed timing. "
		1903	"Wrong Hsync/Vsync pulse width\n");
		1904	return NULL;
		1905	}
3031	serge	1906
		1907	if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
		1908	mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
		1909	if (!mode)
		1910	return NULL;
		1911
		1912	goto set_size;
		1913	}
		1914
1123	serge	1915	mode = drm_mode_create(dev);
		1916	if (!mode)
		1917	return NULL;
		1918
		1919	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
		1920	timing->pixel_clock = cpu_to_le16(1088);
		1921
		1922	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
		1923
		1924	mode->hdisplay = hactive;
		1925	mode->hsync_start = mode->hdisplay + hsync_offset;
		1926	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
		1927	mode->htotal = mode->hdisplay + hblank;
		1928
		1929	mode->vdisplay = vactive;
		1930	mode->vsync_start = mode->vdisplay + vsync_offset;
		1931	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
		1932	mode->vtotal = mode->vdisplay + vblank;
		1933
1313	serge	1934	/* Some EDIDs have bogus h/vtotal values */
		1935	if (mode->hsync_end > mode->htotal)
		1936	mode->htotal = mode->hsync_end + 1;
		1937	if (mode->vsync_end > mode->vtotal)
		1938	mode->vtotal = mode->vsync_end + 1;
		1939
1963	serge	1940	drm_mode_do_interlace_quirk(mode, pt);
		1941
1123	serge	1942	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
		1943	pt->misc \|= DRM_EDID_PT_HSYNC_POSITIVE \| DRM_EDID_PT_VSYNC_POSITIVE;
		1944	}
		1945
		1946	mode->flags \|= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
		1947	DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
		1948	mode->flags \|= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
		1949	DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
		1950
3031	serge	1951	set_size:
1123	serge	1952	mode->width_mm = pt->width_mm_lo \| (pt->width_height_mm_hi & 0xf0) << 4;
		1953	mode->height_mm = pt->height_mm_lo \| (pt->width_height_mm_hi & 0xf) << 8;
		1954
		1955	if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
		1956	mode->width_mm *= 10;
		1957	mode->height_mm *= 10;
		1958	}
		1959
		1960	if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
		1961	mode->width_mm = edid->width_cm * 10;
		1962	mode->height_mm = edid->height_cm * 10;
		1963	}
		1964
3031	serge	1965	mode->type = DRM_MODE_TYPE_DRIVER;
3480	Serge	1966	mode->vrefresh = drm_mode_vrefresh(mode);
3031	serge	1967	drm_mode_set_name(mode);
		1968
1123	serge	1969	return mode;
		1970	}
		1971
1963	serge	1972	static bool
		1973	mode_in_hsync_range(const struct drm_display_mode *mode,
		1974	struct edid edid, u8 t)
		1975	{
		1976	int hsync, hmin, hmax;
		1977
		1978	hmin = t[7];
		1979	if (edid->revision >= 4)
		1980	hmin += ((t[4] & 0x04) ? 255 : 0);
		1981	hmax = t[8];
		1982	if (edid->revision >= 4)
		1983	hmax += ((t[4] & 0x08) ? 255 : 0);
		1984	hsync = drm_mode_hsync(mode);
		1985
		1986	return (hsync <= hmax && hsync >= hmin);
		1987	}
		1988
		1989	static bool
		1990	mode_in_vsync_range(const struct drm_display_mode *mode,
		1991	struct edid edid, u8 t)
		1992	{
		1993	int vsync, vmin, vmax;
		1994
		1995	vmin = t[5];
		1996	if (edid->revision >= 4)
		1997	vmin += ((t[4] & 0x01) ? 255 : 0);
		1998	vmax = t[6];
		1999	if (edid->revision >= 4)
		2000	vmax += ((t[4] & 0x02) ? 255 : 0);
		2001	vsync = drm_mode_vrefresh(mode);
		2002
		2003	return (vsync <= vmax && vsync >= vmin);
		2004	}
		2005
		2006	static u32
		2007	range_pixel_clock(struct edid edid, u8 t)
		2008	{
		2009	/* unspecified */
		2010	if (t[9] == 0 \|\| t[9] == 255)
		2011	return 0;
		2012
		2013	/* 1.4 with CVT support gives us real precision, yay */
		2014	if (edid->revision >= 4 && t[10] == 0x04)
		2015	return (t[9] * 10000) - ((t[12] >> 2) * 250);
		2016
		2017	/* 1.3 is pathetic, so fuzz up a bit */
		2018	return t[9] * 10000 + 5001;
		2019	}
		2020
		2021	static bool
		2022	mode_in_range(const struct drm_display_mode mode, struct edid edid,
		2023	struct detailed_timing *timing)
		2024	{
		2025	u32 max_clock;
		2026	u8 t = (u8 )timing;
		2027
		2028	if (!mode_in_hsync_range(mode, edid, t))
		2029	return false;
		2030
		2031	if (!mode_in_vsync_range(mode, edid, t))
		2032	return false;
		2033
		2034	if ((max_clock = range_pixel_clock(edid, t)))
		2035	if (mode->clock > max_clock)
		2036	return false;
		2037
		2038	/* 1.4 max horizontal check */
		2039	if (edid->revision >= 4 && t[10] == 0x04)
		2040	if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
		2041	return false;
		2042
		2043	if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
		2044	return false;
		2045
		2046	return true;
		2047	}
		2048
3031	serge	2049	static bool valid_inferred_mode(const struct drm_connector *connector,
		2050	const struct drm_display_mode *mode)
		2051	{
6084	serge	2052	const struct drm_display_mode *m;
3031	serge	2053	bool ok = false;
		2054
		2055	list_for_each_entry(m, &connector->probed_modes, head) {
		2056	if (mode->hdisplay == m->hdisplay &&
		2057	mode->vdisplay == m->vdisplay &&
		2058	drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
		2059	return false; /* duplicated */
		2060	if (mode->hdisplay <= m->hdisplay &&
		2061	mode->vdisplay <= m->vdisplay)
		2062	ok = true;
		2063	}
		2064	return ok;
		2065	}
		2066
1963	serge	2067	static int
3031	serge	2068	drm_dmt_modes_for_range(struct drm_connector connector, struct edid edid,
6084	serge	2069	struct detailed_timing *timing)
1963	serge	2070	{
		2071	int i, modes = 0;
		2072	struct drm_display_mode *newmode;
		2073	struct drm_device *dev = connector->dev;
1123	serge	2074
3480	Serge	2075	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
3031	serge	2076	if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
		2077	valid_inferred_mode(connector, drm_dmt_modes + i)) {
1963	serge	2078	newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
		2079	if (newmode) {
		2080	drm_mode_probed_add(connector, newmode);
		2081	modes++;
		2082	}
		2083	}
		2084	}
1123	serge	2085
1963	serge	2086	return modes;
		2087	}
		2088
3031	serge	2089	/* fix up 1366x768 mode from 1368x768;
		2090	* GFT/CVT can't express 1366 width which isn't dividable by 8
		2091	*/
		2092	static void fixup_mode_1366x768(struct drm_display_mode *mode)
		2093	{
		2094	if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
		2095	mode->hdisplay = 1366;
		2096	mode->hsync_start--;
		2097	mode->hsync_end--;
		2098	drm_mode_set_name(mode);
		2099	}
		2100	}
		2101
		2102	static int
		2103	drm_gtf_modes_for_range(struct drm_connector connector, struct edid edid,
		2104	struct detailed_timing *timing)
		2105	{
		2106	int i, modes = 0;
		2107	struct drm_display_mode *newmode;
		2108	struct drm_device *dev = connector->dev;
		2109
3480	Serge	2110	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
3031	serge	2111	const struct minimode *m = &extra_modes[i];
		2112	newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
		2113	if (!newmode)
		2114	return modes;
		2115
		2116	fixup_mode_1366x768(newmode);
		2117	if (!mode_in_range(newmode, edid, timing) \|\|
		2118	!valid_inferred_mode(connector, newmode)) {
		2119	drm_mode_destroy(dev, newmode);
		2120	continue;
		2121	}
		2122
		2123	drm_mode_probed_add(connector, newmode);
		2124	modes++;
		2125	}
		2126
		2127	return modes;
		2128	}
		2129
		2130	static int
		2131	drm_cvt_modes_for_range(struct drm_connector connector, struct edid edid,
		2132	struct detailed_timing *timing)
		2133	{
		2134	int i, modes = 0;
		2135	struct drm_display_mode *newmode;
		2136	struct drm_device *dev = connector->dev;
		2137	bool rb = drm_monitor_supports_rb(edid);
		2138
3480	Serge	2139	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
3031	serge	2140	const struct minimode *m = &extra_modes[i];
		2141	newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
		2142	if (!newmode)
		2143	return modes;
		2144
		2145	fixup_mode_1366x768(newmode);
		2146	if (!mode_in_range(newmode, edid, timing) \|\|
		2147	!valid_inferred_mode(connector, newmode)) {
		2148	drm_mode_destroy(dev, newmode);
		2149	continue;
		2150	}
		2151
		2152	drm_mode_probed_add(connector, newmode);
		2153	modes++;
		2154	}
		2155
		2156	return modes;
		2157	}
		2158
1963	serge	2159	static void
		2160	do_inferred_modes(struct detailed_timing timing, void c)
		2161	{
		2162	struct detailed_mode_closure *closure = c;
		2163	struct detailed_non_pixel *data = &timing->data.other_data;
3031	serge	2164	struct detailed_data_monitor_range *range = &data->data.range;
1963	serge	2165
3031	serge	2166	if (data->type != EDID_DETAIL_MONITOR_RANGE)
		2167	return;
		2168
		2169	closure->modes += drm_dmt_modes_for_range(closure->connector,
		2170	closure->edid,
		2171	timing);
6084	serge	2172
3031	serge	2173	if (!version_greater(closure->edid, 1, 1))
		2174	return; /* GTF not defined yet */
		2175
		2176	switch (range->flags) {
		2177	case 0x02: /* secondary gtf, XXX could do more */
		2178	case 0x00: /* default gtf */
1963	serge	2179	closure->modes += drm_gtf_modes_for_range(closure->connector,
		2180	closure->edid,
		2181	timing);
3031	serge	2182	break;
		2183	case 0x04: /* cvt, only in 1.4+ */
		2184	if (!version_greater(closure->edid, 1, 3))
		2185	break;
		2186
		2187	closure->modes += drm_cvt_modes_for_range(closure->connector,
		2188	closure->edid,
		2189	timing);
		2190	break;
		2191	case 0x01: /* just the ranges, no formula */
		2192	default:
		2193	break;
		2194	}
1963	serge	2195	}
		2196
		2197	static int
		2198	add_inferred_modes(struct drm_connector connector, struct edid edid)
		2199	{
		2200	struct detailed_mode_closure closure = {
5271	serge	2201	.connector = connector,
		2202	.edid = edid,
1963	serge	2203	};
		2204
		2205	if (version_greater(edid, 1, 0))
		2206	drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
		2207	&closure);
		2208
		2209	return closure.modes;
		2210	}
		2211
		2212	static int
		2213	drm_est3_modes(struct drm_connector connector, struct detailed_timing timing)
		2214	{
		2215	int i, j, m, modes = 0;
		2216	struct drm_display_mode *mode;
		2217	u8 est = ((u8 )timing) + 5;
		2218
		2219	for (i = 0; i < 6; i++) {
4560	Serge	2220	for (j = 7; j >= 0; j--) {
1963	serge	2221	m = (i * 8) + (7 - j);
		2222	if (m >= ARRAY_SIZE(est3_modes))
		2223	break;
		2224	if (est[i] & (1 << j)) {
		2225	mode = drm_mode_find_dmt(connector->dev,
		2226	est3_modes[m].w,
		2227	est3_modes[m].h,
3031	serge	2228	est3_modes[m].r,
		2229	est3_modes[m].rb);
1963	serge	2230	if (mode) {
		2231	drm_mode_probed_add(connector, mode);
		2232	modes++;
		2233	}
		2234	}
		2235	}
		2236	}
		2237
		2238	return modes;
		2239	}
		2240
		2241	static void
		2242	do_established_modes(struct detailed_timing timing, void c)
		2243	{
		2244	struct detailed_mode_closure *closure = c;
6084	serge	2245	struct detailed_non_pixel *data = &timing->data.other_data;
1963	serge	2246
		2247	if (data->type == EDID_DETAIL_EST_TIMINGS)
		2248	closure->modes += drm_est3_modes(closure->connector, timing);
		2249	}
		2250
1123	serge	2251	/**
		2252	* add_established_modes - get est. modes from EDID and add them
5060	serge	2253	* @connector: connector to add mode(s) to
1123	serge	2254	* @edid: EDID block to scan
		2255	*
		2256	* Each EDID block contains a bitmap of the supported "established modes" list
		2257	* (defined above). Tease them out and add them to the global modes list.
		2258	*/
1963	serge	2259	static int
		2260	add_established_modes(struct drm_connector connector, struct edid edid)
1123	serge	2261	{
		2262	struct drm_device *dev = connector->dev;
		2263	unsigned long est_bits = edid->established_timings.t1 \|
		2264	(edid->established_timings.t2 << 8) \|
		2265	((edid->established_timings.mfg_rsvd & 0x80) << 9);
		2266	int i, modes = 0;
1963	serge	2267	struct detailed_mode_closure closure = {
5271	serge	2268	.connector = connector,
		2269	.edid = edid,
1963	serge	2270	};
1123	serge	2271
1963	serge	2272	for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1123	serge	2273	if (est_bits & (1<
		2274	struct drm_display_mode *newmode;
		2275	newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
		2276	if (newmode) {
6084	serge	2277	drm_mode_probed_add(connector, newmode);
1123	serge	2278	modes++;
		2279	}
		2280	}
1963	serge	2281	}
1123	serge	2282
1963	serge	2283	if (version_greater(edid, 1, 0))
		2284	drm_for_each_detailed_block((u8 *)edid,
		2285	do_established_modes, &closure);
		2286
		2287	return modes + closure.modes;
1123	serge	2288	}
1963	serge	2289
		2290	static void
		2291	do_standard_modes(struct detailed_timing timing, void c)
1179	serge	2292	{
1963	serge	2293	struct detailed_mode_closure *closure = c;
		2294	struct detailed_non_pixel *data = &timing->data.other_data;
		2295	struct drm_connector *connector = closure->connector;
		2296	struct edid *edid = closure->edid;
		2297
		2298	if (data->type == EDID_DETAIL_STD_MODES) {
		2299	int i;
		2300	for (i = 0; i < 6; i++) {
6084	serge	2301	struct std_timing *std;
		2302	struct drm_display_mode *newmode;
1963	serge	2303
		2304	std = &data->data.timings[i];
5060	serge	2305	newmode = drm_mode_std(connector, edid, std);
6084	serge	2306	if (newmode) {
		2307	drm_mode_probed_add(connector, newmode);
1963	serge	2308	closure->modes++;
		2309	}
		2310	}
6084	serge	2311	}
1179	serge	2312	}
1123	serge	2313
		2314	/**
		2315	* add_standard_modes - get std. modes from EDID and add them
5060	serge	2316	* @connector: connector to add mode(s) to
1123	serge	2317	* @edid: EDID block to scan
		2318	*
1963	serge	2319	* Standard modes can be calculated using the appropriate standard (DMT,
		2320	* GTF or CVT. Grab them from @edid and add them to the list.
1123	serge	2321	*/
1963	serge	2322	static int
		2323	add_standard_modes(struct drm_connector connector, struct edid edid)
1123	serge	2324	{
		2325	int i, modes = 0;
1963	serge	2326	struct detailed_mode_closure closure = {
5271	serge	2327	.connector = connector,
		2328	.edid = edid,
1963	serge	2329	};
1123	serge	2330
		2331	for (i = 0; i < EDID_STD_TIMINGS; i++) {
		2332	struct drm_display_mode *newmode;
		2333
1963	serge	2334	newmode = drm_mode_std(connector, edid,
5060	serge	2335	&edid->standard_timings[i]);
1123	serge	2336	if (newmode) {
		2337	drm_mode_probed_add(connector, newmode);
		2338	modes++;
		2339	}
		2340	}
		2341
1963	serge	2342	if (version_greater(edid, 1, 0))
		2343	drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
		2344	&closure);
1123	serge	2345
1963	serge	2346	/* XXX should also look for standard codes in VTB blocks */
1321	serge	2347
1963	serge	2348	return modes + closure.modes;
1321	serge	2349	}
		2350
		2351	static int drm_cvt_modes(struct drm_connector *connector,
		2352	struct detailed_timing *timing)
		2353	{
1123	serge	2354	int i, j, modes = 0;
1321	serge	2355	struct drm_display_mode *newmode;
		2356	struct drm_device *dev = connector->dev;
		2357	struct cvt_timing *cvt;
		2358	const int rates[] = { 60, 85, 75, 60, 50 };
1404	serge	2359	const u8 empty[3] = { 0, 0, 0 };
1123	serge	2360
1321	serge	2361	for (i = 0; i < 4; i++) {
1404	serge	2362	int uninitialized_var(width), height;
1321	serge	2363	cvt = &(timing->data.other_data.data.cvt[i]);
1179	serge	2364
1404	serge	2365	if (!memcmp(cvt->code, empty, 3))
6084	serge	2366	continue;
1404	serge	2367
		2368	height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
		2369	switch (cvt->code[1] & 0x0c) {
1321	serge	2370	case 0x00:
		2371	width = height * 4 / 3;
		2372	break;
1404	serge	2373	case 0x04:
1321	serge	2374	width = height * 16 / 9;
		2375	break;
1404	serge	2376	case 0x08:
1321	serge	2377	width = height * 16 / 10;
		2378	break;
1404	serge	2379	case 0x0c:
1321	serge	2380	width = height * 15 / 9;
		2381	break;
		2382	}
		2383
		2384	for (j = 1; j < 5; j++) {
		2385	if (cvt->code[2] & (1 << j)) {
		2386	newmode = drm_cvt_mode(dev, width, height,
		2387	rates[j], j == 0,
		2388	false, false);
		2389	if (newmode) {
		2390	drm_mode_probed_add(connector, newmode);
		2391	modes++;
		2392	}
		2393	}
		2394	}
6084	serge	2395	}
1321	serge	2396
		2397	return modes;
		2398	}
		2399
1963	serge	2400	static void
		2401	do_cvt_mode(struct detailed_timing timing, void c)
1321	serge	2402	{
1963	serge	2403	struct detailed_mode_closure *closure = c;
		2404	struct detailed_non_pixel *data = &timing->data.other_data;
1123	serge	2405
1963	serge	2406	if (data->type == EDID_DETAIL_CVT_3BYTE)
		2407	closure->modes += drm_cvt_modes(closure->connector, timing);
		2408	}
1321	serge	2409
1963	serge	2410	static int
		2411	add_cvt_modes(struct drm_connector connector, struct edid edid)
6084	serge	2412	{
1963	serge	2413	struct detailed_mode_closure closure = {
5271	serge	2414	.connector = connector,
		2415	.edid = edid,
1963	serge	2416	};
1321	serge	2417
1963	serge	2418	if (version_greater(edid, 1, 2))
		2419	drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
1321	serge	2420
1963	serge	2421	/* XXX should also look for CVT codes in VTB blocks */
1123	serge	2422
1963	serge	2423	return closure.modes;
1321	serge	2424	}
		2425
6084	serge	2426	static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
		2427
1963	serge	2428	static void
		2429	do_detailed_mode(struct detailed_timing timing, void c)
1321	serge	2430	{
1963	serge	2431	struct detailed_mode_closure *closure = c;
		2432	struct drm_display_mode *newmode;
1321	serge	2433
1963	serge	2434	if (timing->pixel_clock) {
		2435	newmode = drm_mode_detailed(closure->connector->dev,
		2436	closure->edid, timing,
		2437	closure->quirks);
		2438	if (!newmode)
		2439	return;
1321	serge	2440
1963	serge	2441	if (closure->preferred)
		2442	newmode->type \|= DRM_MODE_TYPE_PREFERRED;
1123	serge	2443
6084	serge	2444	/*
		2445	* Detailed modes are limited to 10kHz pixel clock resolution,
		2446	* so fix up anything that looks like CEA/HDMI mode, but the clock
		2447	* is just slightly off.
		2448	*/
		2449	fixup_detailed_cea_mode_clock(newmode);
		2450
1963	serge	2451	drm_mode_probed_add(closure->connector, newmode);
		2452	closure->modes++;
		2453	closure->preferred = 0;
		2454	}
1179	serge	2455	}
1321	serge	2456
1963	serge	2457	/*
		2458	* add_detailed_modes - Add modes from detailed timings
1179	serge	2459	* @connector: attached connector
1963	serge	2460	* @edid: EDID block to scan
1179	serge	2461	* @quirks: quirks to apply
		2462	*/
1963	serge	2463	static int
		2464	add_detailed_modes(struct drm_connector connector, struct edid edid,
		2465	u32 quirks)
1179	serge	2466	{
1963	serge	2467	struct detailed_mode_closure closure = {
5271	serge	2468	.connector = connector,
		2469	.edid = edid,
		2470	.preferred = 1,
		2471	.quirks = quirks,
1963	serge	2472	};
1179	serge	2473
1963	serge	2474	if (closure.preferred && !version_greater(edid, 1, 3))
		2475	closure.preferred =
		2476	(edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1179	serge	2477
1963	serge	2478	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1179	serge	2479
1963	serge	2480	return closure.modes;
		2481	}
1179	serge	2482
1963	serge	2483	#define AUDIO_BLOCK 0x01
3031	serge	2484	#define VIDEO_BLOCK 0x02
1963	serge	2485	#define VENDOR_BLOCK 0x03
3031	serge	2486	#define SPEAKER_BLOCK 0x04
3480	Serge	2487	#define VIDEO_CAPABILITY_BLOCK 0x07
1963	serge	2488	#define EDID_BASIC_AUDIO (1 << 6)
3031	serge	2489	#define EDID_CEA_YCRCB444 (1 << 5)
		2490	#define EDID_CEA_YCRCB422 (1 << 4)
3480	Serge	2491	#define EDID_CEA_VCDB_QS (1 << 6)
1179	serge	2492
4104	Serge	2493	/*
1963	serge	2494	* Search EDID for CEA extension block.
1123	serge	2495	*/
5271	serge	2496	static u8 drm_find_edid_extension(struct edid edid, int ext_id)
1123	serge	2497	{
1963	serge	2498	u8 *edid_ext = NULL;
1321	serge	2499	int i;
1123	serge	2500
1963	serge	2501	/* No EDID or EDID extensions */
		2502	if (edid == NULL \|\| edid->extensions == 0)
		2503	return NULL;
1321	serge	2504
1963	serge	2505	/* Find CEA extension */
		2506	for (i = 0; i < edid->extensions; i++) {
		2507	edid_ext = (u8 )edid + EDID_LENGTH (i + 1);
5271	serge	2508	if (edid_ext[0] == ext_id)
1963	serge	2509	break;
1123	serge	2510	}
		2511
1963	serge	2512	if (i == edid->extensions)
		2513	return NULL;
1123	serge	2514
1963	serge	2515	return edid_ext;
1123	serge	2516	}
		2517
5271	serge	2518	static u8 drm_find_cea_extension(struct edid edid)
		2519	{
		2520	return drm_find_edid_extension(edid, CEA_EXT);
		2521	}
		2522
		2523	static u8 drm_find_displayid_extension(struct edid edid)
		2524	{
		2525	return drm_find_edid_extension(edid, DISPLAYID_EXT);
		2526	}
		2527
4075	Serge	2528	/*
		2529	* Calculate the alternate clock for the CEA mode
		2530	* (60Hz vs. 59.94Hz etc.)
		2531	*/
		2532	static unsigned int
		2533	cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
		2534	{
		2535	unsigned int clock = cea_mode->clock;
		2536
		2537	if (cea_mode->vrefresh % 6 != 0)
		2538	return clock;
		2539
		2540	/*
		2541	* edid_cea_modes contains the 59.94Hz
		2542	* variant for 240 and 480 line modes,
		2543	* and the 60Hz variant otherwise.
		2544	*/
		2545	if (cea_mode->vdisplay == 240 \|\| cea_mode->vdisplay == 480)
6084	serge	2546	clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
4075	Serge	2547	else
6084	serge	2548	clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
4075	Serge	2549
		2550	return clock;
		2551	}
		2552
3480	Serge	2553	/**
		2554	* drm_match_cea_mode - look for a CEA mode matching given mode
		2555	* @to_match: display mode
		2556	*
5060	serge	2557	* Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
3480	Serge	2558	* mode.
3192	Serge	2559	*/
3480	Serge	2560	u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
3192	Serge	2561	{
		2562	u8 mode;
		2563
3746	Serge	2564	if (!to_match->clock)
		2565	return 0;
		2566
3480	Serge	2567	for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
3746	Serge	2568	const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
		2569	unsigned int clock1, clock2;
3192	Serge	2570
3746	Serge	2571	/* Check both 60Hz and 59.94Hz */
4075	Serge	2572	clock1 = cea_mode->clock;
		2573	clock2 = cea_mode_alternate_clock(cea_mode);
3746	Serge	2574
		2575	if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) \|\|
		2576	KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
4560	Serge	2577	drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
3192	Serge	2578	return mode + 1;
		2579	}
		2580	return 0;
		2581	}
		2582	EXPORT_SYMBOL(drm_match_cea_mode);
		2583
5060	serge	2584	/**
		2585	* drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
		2586	* the input VIC from the CEA mode list
		2587	* @video_code: ID given to each of the CEA modes
		2588	*
		2589	* Returns picture aspect ratio
		2590	*/
		2591	enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
		2592	{
		2593	/* return picture aspect ratio for video_code - 1 to access the
		2594	* right array element
		2595	*/
		2596	return edid_cea_modes[video_code-1].picture_aspect_ratio;
		2597	}
		2598	EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
		2599
4104	Serge	2600	/*
		2601	* Calculate the alternate clock for HDMI modes (those from the HDMI vendor
		2602	* specific block).
		2603	*
		2604	* It's almost like cea_mode_alternate_clock(), we just need to add an
		2605	* exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
		2606	* one.
		2607	*/
		2608	static unsigned int
		2609	hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
		2610	{
		2611	if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
		2612	return hdmi_mode->clock;
		2613
		2614	return cea_mode_alternate_clock(hdmi_mode);
		2615	}
		2616
		2617	/*
		2618	* drm_match_hdmi_mode - look for a HDMI mode matching given mode
		2619	* @to_match: display mode
		2620	*
		2621	* An HDMI mode is one defined in the HDMI vendor specific block.
		2622	*
		2623	* Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
		2624	*/
		2625	static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
		2626	{
		2627	u8 mode;
		2628
		2629	if (!to_match->clock)
		2630	return 0;
		2631
		2632	for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
		2633	const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
		2634	unsigned int clock1, clock2;
		2635
		2636	/* Make sure to also match alternate clocks */
		2637	clock1 = hdmi_mode->clock;
		2638	clock2 = hdmi_mode_alternate_clock(hdmi_mode);
		2639
		2640	if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) \|\|
		2641	KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
4560	Serge	2642	drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
4104	Serge	2643	return mode + 1;
		2644	}
		2645	return 0;
		2646	}
		2647
4075	Serge	2648	static int
		2649	add_alternate_cea_modes(struct drm_connector connector, struct edid edid)
		2650	{
		2651	struct drm_device *dev = connector->dev;
		2652	struct drm_display_mode mode, tmp;
		2653	LIST_HEAD(list);
		2654	int modes = 0;
3192	Serge	2655
4075	Serge	2656	/* Don't add CEA modes if the CEA extension block is missing */
		2657	if (!drm_find_cea_extension(edid))
		2658	return 0;
		2659
		2660	/*
		2661	* Go through all probed modes and create a new mode
		2662	* with the alternate clock for certain CEA modes.
		2663	*/
		2664	list_for_each_entry(mode, &connector->probed_modes, head) {
4104	Serge	2665	const struct drm_display_mode *cea_mode = NULL;
4075	Serge	2666	struct drm_display_mode *newmode;
4104	Serge	2667	u8 mode_idx = drm_match_cea_mode(mode) - 1;
4075	Serge	2668	unsigned int clock1, clock2;
		2669
4104	Serge	2670	if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
		2671	cea_mode = &edid_cea_modes[mode_idx];
		2672	clock2 = cea_mode_alternate_clock(cea_mode);
		2673	} else {
		2674	mode_idx = drm_match_hdmi_mode(mode) - 1;
		2675	if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
		2676	cea_mode = &edid_4k_modes[mode_idx];
		2677	clock2 = hdmi_mode_alternate_clock(cea_mode);
		2678	}
		2679	}
		2680
		2681	if (!cea_mode)
4075	Serge	2682	continue;
		2683
		2684	clock1 = cea_mode->clock;
		2685
		2686	if (clock1 == clock2)
		2687	continue;
		2688
		2689	if (mode->clock != clock1 && mode->clock != clock2)
		2690	continue;
		2691
		2692	newmode = drm_mode_duplicate(dev, cea_mode);
		2693	if (!newmode)
		2694	continue;
		2695
4560	Serge	2696	/* Carry over the stereo flags */
		2697	newmode->flags \|= mode->flags & DRM_MODE_FLAG_3D_MASK;
		2698
4075	Serge	2699	/*
		2700	* The current mode could be either variant. Make
		2701	* sure to pick the "other" clock for the new mode.
		2702	*/
		2703	if (mode->clock != clock1)
		2704	newmode->clock = clock1;
		2705	else
		2706	newmode->clock = clock2;
		2707
		2708	list_add_tail(&newmode->head, &list);
		2709	}
		2710
		2711	list_for_each_entry_safe(mode, tmp, &list, head) {
		2712	list_del(&mode->head);
		2713	drm_mode_probed_add(connector, mode);
		2714	modes++;
		2715	}
		2716
		2717	return modes;
		2718	}
		2719
4560	Serge	2720	static struct drm_display_mode *
		2721	drm_display_mode_from_vic_index(struct drm_connector *connector,
		2722	const u8 *video_db, u8 video_len,
		2723	u8 video_index)
		2724	{
		2725	struct drm_device *dev = connector->dev;
		2726	struct drm_display_mode *newmode;
		2727	u8 cea_mode;
		2728
		2729	if (video_db == NULL \|\| video_index >= video_len)
		2730	return NULL;
		2731
		2732	/* CEA modes are numbered 1..127 */
		2733	cea_mode = (video_db[video_index] & 127) - 1;
		2734	if (cea_mode >= ARRAY_SIZE(edid_cea_modes))
		2735	return NULL;
		2736
		2737	newmode = drm_mode_duplicate(dev, &edid_cea_modes[cea_mode]);
5060	serge	2738	if (!newmode)
		2739	return NULL;
		2740
4560	Serge	2741	newmode->vrefresh = 0;
		2742
		2743	return newmode;
		2744	}
		2745
3031	serge	2746	static int
4104	Serge	2747	do_cea_modes(struct drm_connector connector, const u8 db, u8 len)
3031	serge	2748	{
4560	Serge	2749	int i, modes = 0;
		2750
		2751	for (i = 0; i < len; i++) {
		2752	struct drm_display_mode *mode;
		2753	mode = drm_display_mode_from_vic_index(connector, db, len, i);
		2754	if (mode) {
		2755	drm_mode_probed_add(connector, mode);
		2756	modes++;
		2757	}
		2758	}
		2759
		2760	return modes;
		2761	}
		2762
		2763	struct stereo_mandatory_mode {
		2764	int width, height, vrefresh;
		2765	unsigned int flags;
		2766	};
		2767
		2768	static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
		2769	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
		2770	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
		2771	{ 1920, 1080, 50,
		2772	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
		2773	{ 1920, 1080, 60,
		2774	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
		2775	{ 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
		2776	{ 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
		2777	{ 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
		2778	{ 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
		2779	};
		2780
		2781	static bool
		2782	stereo_match_mandatory(const struct drm_display_mode *mode,
		2783	const struct stereo_mandatory_mode *stereo_mode)
		2784	{
		2785	unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
		2786
		2787	return mode->hdisplay == stereo_mode->width &&
		2788	mode->vdisplay == stereo_mode->height &&
		2789	interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
		2790	drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
		2791	}
		2792
		2793	static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
		2794	{
3031	serge	2795	struct drm_device *dev = connector->dev;
4560	Serge	2796	const struct drm_display_mode *mode;
		2797	struct list_head stereo_modes;
		2798	int modes = 0, i;
		2799
		2800	INIT_LIST_HEAD(&stereo_modes);
		2801
		2802	list_for_each_entry(mode, &connector->probed_modes, head) {
		2803	for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
		2804	const struct stereo_mandatory_mode *mandatory;
		2805	struct drm_display_mode *new_mode;
		2806
		2807	if (!stereo_match_mandatory(mode,
		2808	&stereo_mandatory_modes[i]))
		2809	continue;
		2810
		2811	mandatory = &stereo_mandatory_modes[i];
		2812	new_mode = drm_mode_duplicate(dev, mode);
		2813	if (!new_mode)
		2814	continue;
		2815
		2816	new_mode->flags \|= mandatory->flags;
		2817	list_add_tail(&new_mode->head, &stereo_modes);
		2818	modes++;
		2819	}
		2820	}
		2821
		2822	list_splice_tail(&stereo_modes, &connector->probed_modes);
		2823
		2824	return modes;
		2825	}
		2826
		2827	static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
		2828	{
		2829	struct drm_device *dev = connector->dev;
		2830	struct drm_display_mode *newmode;
		2831
		2832	vic--; /* VICs start at 1 */
		2833	if (vic >= ARRAY_SIZE(edid_4k_modes)) {
		2834	DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
		2835	return 0;
		2836	}
		2837
		2838	newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
		2839	if (!newmode)
		2840	return 0;
		2841
		2842	drm_mode_probed_add(connector, newmode);
		2843
		2844	return 1;
		2845	}
		2846
		2847	static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
		2848	const u8 *video_db, u8 video_len, u8 video_index)
		2849	{
		2850	struct drm_display_mode *newmode;
3031	serge	2851	int modes = 0;
		2852
4560	Serge	2853	if (structure & (1 << 0)) {
		2854	newmode = drm_display_mode_from_vic_index(connector, video_db,
		2855	video_len,
		2856	video_index);
5271	serge	2857	if (newmode) {
4560	Serge	2858	newmode->flags \|= DRM_MODE_FLAG_3D_FRAME_PACKING;
5271	serge	2859	drm_mode_probed_add(connector, newmode);
		2860	modes++;
3031	serge	2861	}
5271	serge	2862	}
4560	Serge	2863	if (structure & (1 << 6)) {
		2864	newmode = drm_display_mode_from_vic_index(connector, video_db,
		2865	video_len,
		2866	video_index);
6084	serge	2867	if (newmode) {
4560	Serge	2868	newmode->flags \|= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
6084	serge	2869	drm_mode_probed_add(connector, newmode);
		2870	modes++;
4560	Serge	2871	}
6084	serge	2872	}
4560	Serge	2873	if (structure & (1 << 8)) {
		2874	newmode = drm_display_mode_from_vic_index(connector, video_db,
		2875	video_len,
		2876	video_index);
		2877	if (newmode) {
		2878	newmode->flags \|= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
		2879	drm_mode_probed_add(connector, newmode);
		2880	modes++;
		2881	}
3031	serge	2882	}
		2883
		2884	return modes;
		2885	}
		2886
4104	Serge	2887	/*
		2888	* do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
		2889	* @connector: connector corresponding to the HDMI sink
		2890	* @db: start of the CEA vendor specific block
		2891	* @len: length of the CEA block payload, ie. one can access up to db[len]
		2892	*
4560	Serge	2893	* Parses the HDMI VSDB looking for modes to add to @connector. This function
		2894	* also adds the stereo 3d modes when applicable.
4104	Serge	2895	*/
3031	serge	2896	static int
4560	Serge	2897	do_hdmi_vsdb_modes(struct drm_connector connector, const u8 db, u8 len,
		2898	const u8 *video_db, u8 video_len)
4104	Serge	2899	{
4560	Serge	2900	int modes = 0, offset = 0, i, multi_present = 0, multi_len;
		2901	u8 vic_len, hdmi_3d_len = 0;
		2902	u16 mask;
		2903	u16 structure_all;
4104	Serge	2904
		2905	if (len < 8)
		2906	goto out;
		2907
		2908	/* no HDMI_Video_Present */
		2909	if (!(db[8] & (1 << 5)))
		2910	goto out;
		2911
		2912	/* Latency_Fields_Present */
		2913	if (db[8] & (1 << 7))
		2914	offset += 2;
		2915
		2916	/* I_Latency_Fields_Present */
		2917	if (db[8] & (1 << 6))
		2918	offset += 2;
		2919
		2920	/* the declared length is not long enough for the 2 first bytes
		2921	* of additional video format capabilities */
4560	Serge	2922	if (len < (8 + offset + 2))
4104	Serge	2923	goto out;
		2924
4560	Serge	2925	/* 3D_Present */
		2926	offset++;
		2927	if (db[8 + offset] & (1 << 7)) {
		2928	modes += add_hdmi_mandatory_stereo_modes(connector);
		2929
		2930	/* 3D_Multi_present */
		2931	multi_present = (db[8 + offset] & 0x60) >> 5;
		2932	}
		2933
		2934	offset++;
4104	Serge	2935	vic_len = db[8 + offset] >> 5;
4560	Serge	2936	hdmi_3d_len = db[8 + offset] & 0x1f;
4104	Serge	2937
		2938	for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
		2939	u8 vic;
		2940
		2941	vic = db[9 + offset + i];
4560	Serge	2942	modes += add_hdmi_mode(connector, vic);
		2943	}
		2944	offset += 1 + vic_len;
4104	Serge	2945
4560	Serge	2946	if (multi_present == 1)
		2947	multi_len = 2;
		2948	else if (multi_present == 2)
		2949	multi_len = 4;
		2950	else
		2951	multi_len = 0;
		2952
		2953	if (len < (8 + offset + hdmi_3d_len - 1))
		2954	goto out;
		2955
		2956	if (hdmi_3d_len < multi_len)
		2957	goto out;
		2958
		2959	if (multi_present == 1 \|\| multi_present == 2) {
		2960	/* 3D_Structure_ALL */
		2961	structure_all = (db[8 + offset] << 8) \| db[9 + offset];
		2962
		2963	/* check if 3D_MASK is present */
		2964	if (multi_present == 2)
		2965	mask = (db[10 + offset] << 8) \| db[11 + offset];
		2966	else
		2967	mask = 0xffff;
		2968
		2969	for (i = 0; i < 16; i++) {
		2970	if (mask & (1 << i))
		2971	modes += add_3d_struct_modes(connector,
		2972	structure_all,
		2973	video_db,
		2974	video_len, i);
4104	Serge	2975	}
4560	Serge	2976	}
4104	Serge	2977
4560	Serge	2978	offset += multi_len;
4104	Serge	2979
4560	Serge	2980	for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
		2981	int vic_index;
		2982	struct drm_display_mode *newmode = NULL;
		2983	unsigned int newflag = 0;
		2984	bool detail_present;
		2985
		2986	detail_present = ((db[8 + offset + i] & 0x0f) > 7);
		2987
		2988	if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
		2989	break;
		2990
		2991	/* 2D_VIC_order_X */
		2992	vic_index = db[8 + offset + i] >> 4;
		2993
		2994	/* 3D_Structure_X */
		2995	switch (db[8 + offset + i] & 0x0f) {
		2996	case 0:
		2997	newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
		2998	break;
		2999	case 6:
		3000	newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
		3001	break;
		3002	case 8:
		3003	/* 3D_Detail_X */
		3004	if ((db[9 + offset + i] >> 4) == 1)
		3005	newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
		3006	break;
		3007	}
		3008
		3009	if (newflag != 0) {
		3010	newmode = drm_display_mode_from_vic_index(connector,
		3011	video_db,
		3012	video_len,
		3013	vic_index);
		3014
		3015	if (newmode) {
		3016	newmode->flags \|= newflag;
6084	serge	3017	drm_mode_probed_add(connector, newmode);
		3018	modes++;
		3019	}
4560	Serge	3020	}
4104	Serge	3021
4560	Serge	3022	if (detail_present)
		3023	i++;
		3024	}
		3025
4104	Serge	3026	out:
		3027	return modes;
		3028	}
		3029
		3030	static int
3031	serge	3031	cea_db_payload_len(const u8 *db)
		3032	{
		3033	return db[0] & 0x1f;
		3034	}
		3035
		3036	static int
		3037	cea_db_tag(const u8 *db)
		3038	{
		3039	return db[0] >> 5;
		3040	}
		3041
		3042	static int
		3043	cea_revision(const u8 *cea)
		3044	{
		3045	return cea[1];
		3046	}
		3047
		3048	static int
		3049	cea_db_offsets(const u8 cea, int start, int *end)
		3050	{
		3051	/* Data block offset in CEA extension block */
		3052	*start = 4;
		3053	*end = cea[2];
		3054	if (*end == 0)
		3055	*end = 127;
		3056	if (end < 4 \|\| end > 127)
		3057	return -ERANGE;
		3058	return 0;
		3059	}
		3060
4104	Serge	3061	static bool cea_db_is_hdmi_vsdb(const u8 *db)
		3062	{
		3063	int hdmi_id;
		3064
		3065	if (cea_db_tag(db) != VENDOR_BLOCK)
		3066	return false;
		3067
		3068	if (cea_db_payload_len(db) < 5)
		3069	return false;
		3070
		3071	hdmi_id = db[1] \| (db[2] << 8) \| (db[3] << 16);
		3072
		3073	return hdmi_id == HDMI_IEEE_OUI;
		3074	}
		3075
3031	serge	3076	#define for_each_cea_db(cea, i, start, end) \
		3077	for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
		3078
		3079	static int
		3080	add_cea_modes(struct drm_connector connector, struct edid edid)
		3081	{
4104	Serge	3082	const u8 *cea = drm_find_cea_extension(edid);
4560	Serge	3083	const u8 db, hdmi = NULL, *video = NULL;
		3084	u8 dbl, hdmi_len, video_len = 0;
3031	serge	3085	int modes = 0;
		3086
		3087	if (cea && cea_revision(cea) >= 3) {
		3088	int i, start, end;
		3089
		3090	if (cea_db_offsets(cea, &start, &end))
		3091	return 0;
		3092
		3093	for_each_cea_db(cea, i, start, end) {
		3094	db = &cea[i];
		3095	dbl = cea_db_payload_len(db);
		3096
4560	Serge	3097	if (cea_db_tag(db) == VIDEO_BLOCK) {
		3098	video = db + 1;
		3099	video_len = dbl;
		3100	modes += do_cea_modes(connector, video, dbl);
		3101	}
		3102	else if (cea_db_is_hdmi_vsdb(db)) {
		3103	hdmi = db;
		3104	hdmi_len = dbl;
6084	serge	3105	}
3031	serge	3106	}
		3107	}
		3108
4560	Serge	3109	/*
		3110	* We parse the HDMI VSDB after having added the cea modes as we will
		3111	* be patching their flags when the sink supports stereo 3D.
		3112	*/
		3113	if (hdmi)
		3114	modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
		3115	video_len);
		3116
3031	serge	3117	return modes;
		3118	}
		3119
6084	serge	3120	static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
		3121	{
		3122	const struct drm_display_mode *cea_mode;
		3123	int clock1, clock2, clock;
		3124	u8 mode_idx;
		3125	const char *type;
		3126
		3127	mode_idx = drm_match_cea_mode(mode) - 1;
		3128	if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
		3129	type = "CEA";
		3130	cea_mode = &edid_cea_modes[mode_idx];
		3131	clock1 = cea_mode->clock;
		3132	clock2 = cea_mode_alternate_clock(cea_mode);
		3133	} else {
		3134	mode_idx = drm_match_hdmi_mode(mode) - 1;
		3135	if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
		3136	type = "HDMI";
		3137	cea_mode = &edid_4k_modes[mode_idx];
		3138	clock1 = cea_mode->clock;
		3139	clock2 = hdmi_mode_alternate_clock(cea_mode);
		3140	} else {
		3141	return;
		3142	}
		3143	}
		3144
		3145	/* pick whichever is closest */
		3146	if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
		3147	clock = clock1;
		3148	else
		3149	clock = clock2;
		3150
		3151	if (mode->clock == clock)
		3152	return;
		3153
		3154	DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
		3155	type, mode_idx + 1, mode->clock, clock);
		3156	mode->clock = clock;
		3157	}
		3158
3031	serge	3159	static void
		3160	parse_hdmi_vsdb(struct drm_connector connector, const u8 db)
		3161	{
		3162	u8 len = cea_db_payload_len(db);
		3163
		3164	if (len >= 6) {
6084	serge	3165	connector->eld[5] \|= (db[6] >> 7) << 1; /* Supports_AI */
		3166	connector->dvi_dual = db[6] & 1;
3031	serge	3167	}
		3168	if (len >= 7)
6084	serge	3169	connector->max_tmds_clock = db[7] * 5;
3031	serge	3170	if (len >= 8) {
6084	serge	3171	connector->latency_present[0] = db[8] >> 7;
		3172	connector->latency_present[1] = (db[8] >> 6) & 1;
3031	serge	3173	}
		3174	if (len >= 9)
6084	serge	3175	connector->video_latency[0] = db[9];
3031	serge	3176	if (len >= 10)
6084	serge	3177	connector->audio_latency[0] = db[10];
3031	serge	3178	if (len >= 11)
6084	serge	3179	connector->video_latency[1] = db[11];
3031	serge	3180	if (len >= 12)
6084	serge	3181	connector->audio_latency[1] = db[12];
3031	serge	3182
3192	Serge	3183	DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3031	serge	3184	"max TMDS clock %d, "
		3185	"latency present %d %d, "
		3186	"video latency %d %d, "
		3187	"audio latency %d %d\n",
		3188	connector->dvi_dual,
		3189	connector->max_tmds_clock,
		3190	(int) connector->latency_present[0],
		3191	(int) connector->latency_present[1],
		3192	connector->video_latency[0],
		3193	connector->video_latency[1],
		3194	connector->audio_latency[0],
		3195	connector->audio_latency[1]);
		3196	}
		3197
		3198	static void
		3199	monitor_name(struct detailed_timing t, void data)
		3200	{
		3201	if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
		3202	(u8 *)data = t->data.other_data.data.str.str;
		3203	}
		3204
1123	serge	3205	/**
3031	serge	3206	* drm_edid_to_eld - build ELD from EDID
		3207	* @connector: connector corresponding to the HDMI/DP sink
		3208	* @edid: EDID to parse
		3209	*
5060	serge	3210	* Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
		3211	* Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
		3212	* fill in.
3031	serge	3213	*/
		3214	void drm_edid_to_eld(struct drm_connector connector, struct edid edid)
		3215	{
		3216	uint8_t *eld = connector->eld;
		3217	u8 *cea;
		3218	u8 *name;
		3219	u8 *db;
		3220	int sad_count = 0;
		3221	int mnl;
		3222	int dbl;
		3223
		3224	memset(eld, 0, sizeof(connector->eld));
		3225
		3226	cea = drm_find_cea_extension(edid);
		3227	if (!cea) {
		3228	DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
		3229	return;
		3230	}
		3231
		3232	name = NULL;
		3233	drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
		3234	for (mnl = 0; name && mnl < 13; mnl++) {
		3235	if (name[mnl] == 0x0a)
		3236	break;
		3237	eld[20 + mnl] = name[mnl];
		3238	}
		3239	eld[4] = (cea[1] << 5) \| mnl;
		3240	DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
		3241
		3242	eld[0] = 2 << 3; /* ELD version: 2 */
		3243
		3244	eld[16] = edid->mfg_id[0];
		3245	eld[17] = edid->mfg_id[1];
		3246	eld[18] = edid->prod_code[0];
		3247	eld[19] = edid->prod_code[1];
		3248
		3249	if (cea_revision(cea) >= 3) {
		3250	int i, start, end;
		3251
		3252	if (cea_db_offsets(cea, &start, &end)) {
		3253	start = 0;
		3254	end = 0;
		3255	}
		3256
		3257	for_each_cea_db(cea, i, start, end) {
		3258	db = &cea[i];
		3259	dbl = cea_db_payload_len(db);
4539	Serge	3260
3031	serge	3261	switch (cea_db_tag(db)) {
		3262	case AUDIO_BLOCK:
		3263	/* Audio Data Block, contains SADs */
		3264	sad_count = dbl / 3;
		3265	if (dbl >= 1)
6084	serge	3266	memcpy(eld + 20 + mnl, &db[1], dbl);
3031	serge	3267	break;
		3268	case SPEAKER_BLOCK:
6084	serge	3269	/* Speaker Allocation Data Block */
3031	serge	3270	if (dbl >= 1)
6084	serge	3271	eld[7] = db[1];
3031	serge	3272	break;
		3273	case VENDOR_BLOCK:
		3274	/* HDMI Vendor-Specific Data Block */
		3275	if (cea_db_is_hdmi_vsdb(db))
		3276	parse_hdmi_vsdb(connector, db);
		3277	break;
		3278	default:
		3279	break;
		3280	}
		3281	}
		3282	}
		3283	eld[5] \|= sad_count << 4;
		3284
5271	serge	3285	eld[DRM_ELD_BASELINE_ELD_LEN] =
		3286	DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
		3287
		3288	DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
		3289	drm_eld_size(eld), sad_count);
3031	serge	3290	}
		3291	EXPORT_SYMBOL(drm_edid_to_eld);
		3292
		3293	/**
3746	Serge	3294	* drm_edid_to_sad - extracts SADs from EDID
		3295	* @edid: EDID to parse
		3296	* @sads: pointer that will be set to the extracted SADs
		3297	*
		3298	* Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
		3299	*
5060	serge	3300	* Note: The returned pointer needs to be freed using kfree().
		3301	*
		3302	* Return: The number of found SADs or negative number on error.
3746	Serge	3303	*/
		3304	int drm_edid_to_sad(struct edid edid, struct cea_sad *sads)
		3305	{
		3306	int count = 0;
		3307	int i, start, end, dbl;
		3308	u8 *cea;
		3309
		3310	cea = drm_find_cea_extension(edid);
		3311	if (!cea) {
		3312	DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
		3313	return -ENOENT;
		3314	}
		3315
		3316	if (cea_revision(cea) < 3) {
		3317	DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
		3318	return -ENOTSUPP;
		3319	}
		3320
		3321	if (cea_db_offsets(cea, &start, &end)) {
		3322	DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
		3323	return -EPROTO;
		3324	}
		3325
		3326	for_each_cea_db(cea, i, start, end) {
		3327	u8 *db = &cea[i];
		3328
		3329	if (cea_db_tag(db) == AUDIO_BLOCK) {
		3330	int j;
		3331	dbl = cea_db_payload_len(db);
		3332
		3333	count = dbl / 3; /* SAD is 3B */
		3334	sads = kcalloc(count, sizeof(*sads), GFP_KERNEL);
		3335	if (!*sads)
		3336	return -ENOMEM;
		3337	for (j = 0; j < count; j++) {
		3338	u8 sad = &db[1 + j 3];
		3339
		3340	(*sads)[j].format = (sad[0] & 0x78) >> 3;
		3341	(*sads)[j].channels = sad[0] & 0x7;
		3342	(*sads)[j].freq = sad[1] & 0x7F;
		3343	(*sads)[j].byte2 = sad[2];
		3344	}
		3345	break;
		3346	}
		3347	}
		3348
		3349	return count;
		3350	}
		3351	EXPORT_SYMBOL(drm_edid_to_sad);
		3352
		3353	/**
4104	Serge	3354	* drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
		3355	* @edid: EDID to parse
		3356	* @sadb: pointer to the speaker block
		3357	*
		3358	* Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
		3359	*
5060	serge	3360	* Note: The returned pointer needs to be freed using kfree().
		3361	*
		3362	* Return: The number of found Speaker Allocation Blocks or negative number on
		3363	* error.
4104	Serge	3364	*/
		3365	int drm_edid_to_speaker_allocation(struct edid edid, u8 *sadb)
		3366	{
		3367	int count = 0;
		3368	int i, start, end, dbl;
		3369	const u8 *cea;
		3370
		3371	cea = drm_find_cea_extension(edid);
		3372	if (!cea) {
		3373	DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
		3374	return -ENOENT;
		3375	}
		3376
		3377	if (cea_revision(cea) < 3) {
		3378	DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
		3379	return -ENOTSUPP;
		3380	}
		3381
		3382	if (cea_db_offsets(cea, &start, &end)) {
		3383	DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
		3384	return -EPROTO;
		3385	}
		3386
		3387	for_each_cea_db(cea, i, start, end) {
		3388	const u8 *db = &cea[i];
		3389
		3390	if (cea_db_tag(db) == SPEAKER_BLOCK) {
		3391	dbl = cea_db_payload_len(db);
		3392
		3393	/* Speaker Allocation Data Block */
		3394	if (dbl == 3) {
5060	serge	3395	*sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
4104	Serge	3396	if (!*sadb)
		3397	return -ENOMEM;
		3398	count = dbl;
		3399	break;
		3400	}
		3401	}
		3402	}
		3403
		3404	return count;
		3405	}
		3406	EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
		3407
		3408	/**
5060	serge	3409	* drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3031	serge	3410	* @connector: connector associated with the HDMI/DP sink
		3411	* @mode: the display mode
5060	serge	3412	*
		3413	* Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
		3414	* the sink doesn't support audio or video.
3031	serge	3415	*/
		3416	int drm_av_sync_delay(struct drm_connector *connector,
6084	serge	3417	const struct drm_display_mode *mode)
3031	serge	3418	{
		3419	int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
		3420	int a, v;
		3421
		3422	if (!connector->latency_present[0])
		3423	return 0;
		3424	if (!connector->latency_present[1])
		3425	i = 0;
		3426
		3427	a = connector->audio_latency[i];
		3428	v = connector->video_latency[i];
		3429
		3430	/*
		3431	* HDMI/DP sink doesn't support audio or video?
		3432	*/
		3433	if (a == 255 \|\| v == 255)
		3434	return 0;
		3435
		3436	/*
		3437	* Convert raw EDID values to millisecond.
		3438	* Treat unknown latency as 0ms.
		3439	*/
		3440	if (a)
		3441	a = min(2 * (a - 1), 500);
		3442	if (v)
		3443	v = min(2 * (v - 1), 500);
		3444
		3445	return max(v - a, 0);
		3446	}
		3447	EXPORT_SYMBOL(drm_av_sync_delay);
		3448
		3449	/**
		3450	* drm_select_eld - select one ELD from multiple HDMI/DP sinks
		3451	* @encoder: the encoder just changed display mode
		3452	*
		3453	* It's possible for one encoder to be associated with multiple HDMI/DP sinks.
		3454	* The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
5060	serge	3455	*
		3456	* Return: The connector associated with the first HDMI/DP sink that has ELD
		3457	* attached to it.
3031	serge	3458	*/
6084	serge	3459	struct drm_connector drm_select_eld(struct drm_encoder encoder)
3031	serge	3460	{
		3461	struct drm_connector *connector;
		3462	struct drm_device *dev = encoder->dev;
		3463
5060	serge	3464	WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
		3465	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
		3466
6084	serge	3467	drm_for_each_connector(connector, dev)
3031	serge	3468	if (connector->encoder == encoder && connector->eld[0])
		3469	return connector;
		3470
		3471	return NULL;
		3472	}
		3473	EXPORT_SYMBOL(drm_select_eld);
		3474
		3475	/**
5060	serge	3476	* drm_detect_hdmi_monitor - detect whether monitor is HDMI
1123	serge	3477	* @edid: monitor EDID information
		3478	*
		3479	* Parse the CEA extension according to CEA-861-B.
5060	serge	3480	*
		3481	* Return: True if the monitor is HDMI, false if not or unknown.
1123	serge	3482	*/
		3483	bool drm_detect_hdmi_monitor(struct edid *edid)
		3484	{
1963	serge	3485	u8 *edid_ext;
3031	serge	3486	int i;
1123	serge	3487	int start_offset, end_offset;
		3488
1963	serge	3489	edid_ext = drm_find_cea_extension(edid);
		3490	if (!edid_ext)
3031	serge	3491	return false;
1123	serge	3492
3031	serge	3493	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
		3494	return false;
1123	serge	3495
		3496	/*
		3497	* Because HDMI identifier is in Vendor Specific Block,
		3498	* search it from all data blocks of CEA extension.
		3499	*/
3031	serge	3500	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
		3501	if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
		3502	return true;
1123	serge	3503	}
		3504
3031	serge	3505	return false;
1123	serge	3506	}
		3507	EXPORT_SYMBOL(drm_detect_hdmi_monitor);
		3508
		3509	/**
1963	serge	3510	* drm_detect_monitor_audio - check monitor audio capability
5060	serge	3511	* @edid: EDID block to scan
1963	serge	3512	*
		3513	* Monitor should have CEA extension block.
		3514	* If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
		3515	* audio' only. If there is any audio extension block and supported
		3516	* audio format, assume at least 'basic audio' support, even if 'basic
		3517	* audio' is not defined in EDID.
		3518	*
5060	serge	3519	* Return: True if the monitor supports audio, false otherwise.
1963	serge	3520	*/
		3521	bool drm_detect_monitor_audio(struct edid *edid)
		3522	{
		3523	u8 *edid_ext;
		3524	int i, j;
		3525	bool has_audio = false;
		3526	int start_offset, end_offset;
		3527
		3528	edid_ext = drm_find_cea_extension(edid);
		3529	if (!edid_ext)
		3530	goto end;
		3531
		3532	has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
		3533
		3534	if (has_audio) {
		3535	DRM_DEBUG_KMS("Monitor has basic audio support\n");
		3536	goto end;
		3537	}
		3538
3031	serge	3539	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
		3540	goto end;
1963	serge	3541
3031	serge	3542	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
		3543	if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
1963	serge	3544	has_audio = true;
3031	serge	3545	for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
1963	serge	3546	DRM_DEBUG_KMS("CEA audio format %d\n",
		3547	(edid_ext[i + j] >> 3) & 0xf);
		3548	goto end;
		3549	}
		3550	}
		3551	end:
		3552	return has_audio;
		3553	}
		3554	EXPORT_SYMBOL(drm_detect_monitor_audio);
		3555
		3556	/**
3480	Serge	3557	* drm_rgb_quant_range_selectable - is RGB quantization range selectable?
5060	serge	3558	* @edid: EDID block to scan
3480	Serge	3559	*
		3560	* Check whether the monitor reports the RGB quantization range selection
		3561	* as supported. The AVI infoframe can then be used to inform the monitor
		3562	* which quantization range (full or limited) is used.
5060	serge	3563	*
		3564	* Return: True if the RGB quantization range is selectable, false otherwise.
3480	Serge	3565	*/
		3566	bool drm_rgb_quant_range_selectable(struct edid *edid)
		3567	{
		3568	u8 *edid_ext;
		3569	int i, start, end;
		3570
		3571	edid_ext = drm_find_cea_extension(edid);
		3572	if (!edid_ext)
		3573	return false;
		3574
		3575	if (cea_db_offsets(edid_ext, &start, &end))
		3576	return false;
		3577
		3578	for_each_cea_db(edid_ext, i, start, end) {
		3579	if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
		3580	cea_db_payload_len(&edid_ext[i]) == 2) {
		3581	DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
		3582	return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
		3583	}
		3584	}
		3585
		3586	return false;
		3587	}
		3588	EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
		3589
		3590	/**
5060	serge	3591	* drm_assign_hdmi_deep_color_info - detect whether monitor supports
		3592	* hdmi deep color modes and update drm_display_info if so.
		3593	* @edid: monitor EDID information
		3594	* @info: Updated with maximum supported deep color bpc and color format
		3595	* if deep color supported.
5271	serge	3596	* @connector: DRM connector, used only for debug output
5060	serge	3597	*
		3598	* Parse the CEA extension according to CEA-861-B.
		3599	* Return true if HDMI deep color supported, false if not or unknown.
		3600	*/
		3601	static bool drm_assign_hdmi_deep_color_info(struct edid *edid,
		3602	struct drm_display_info *info,
		3603	struct drm_connector *connector)
		3604	{
		3605	u8 edid_ext, hdmi;
		3606	int i;
		3607	int start_offset, end_offset;
		3608	unsigned int dc_bpc = 0;
		3609
		3610	edid_ext = drm_find_cea_extension(edid);
		3611	if (!edid_ext)
		3612	return false;
		3613
		3614	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
		3615	return false;
		3616
		3617	/*
		3618	* Because HDMI identifier is in Vendor Specific Block,
		3619	* search it from all data blocks of CEA extension.
		3620	*/
		3621	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
		3622	if (cea_db_is_hdmi_vsdb(&edid_ext[i])) {
		3623	/* HDMI supports at least 8 bpc */
		3624	info->bpc = 8;
		3625
		3626	hdmi = &edid_ext[i];
		3627	if (cea_db_payload_len(hdmi) < 6)
		3628	return false;
		3629
		3630	if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
		3631	dc_bpc = 10;
		3632	info->edid_hdmi_dc_modes \|= DRM_EDID_HDMI_DC_30;
		3633	DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
		3634	connector->name);
		3635	}
		3636
		3637	if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
		3638	dc_bpc = 12;
		3639	info->edid_hdmi_dc_modes \|= DRM_EDID_HDMI_DC_36;
		3640	DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
		3641	connector->name);
		3642	}
		3643
		3644	if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
		3645	dc_bpc = 16;
		3646	info->edid_hdmi_dc_modes \|= DRM_EDID_HDMI_DC_48;
		3647	DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
		3648	connector->name);
		3649	}
		3650
		3651	if (dc_bpc > 0) {
		3652	DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
		3653	connector->name, dc_bpc);
		3654	info->bpc = dc_bpc;
		3655
		3656	/*
		3657	* Deep color support mandates RGB444 support for all video
		3658	* modes and forbids YCRCB422 support for all video modes per
		3659	* HDMI 1.3 spec.
		3660	*/
		3661	info->color_formats = DRM_COLOR_FORMAT_RGB444;
		3662
		3663	/* YCRCB444 is optional according to spec. */
		3664	if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
		3665	info->color_formats \|= DRM_COLOR_FORMAT_YCRCB444;
		3666	DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
		3667	connector->name);
		3668	}
		3669
		3670	/*
		3671	* Spec says that if any deep color mode is supported at all,
		3672	* then deep color 36 bit must be supported.
		3673	*/
		3674	if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
		3675	DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
		3676	connector->name);
		3677	}
		3678
		3679	return true;
		3680	}
		3681	else {
		3682	DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
		3683	connector->name);
		3684	}
		3685	}
		3686	}
		3687
		3688	return false;
		3689	}
		3690
		3691	/**
1963	serge	3692	* drm_add_display_info - pull display info out if present
		3693	* @edid: EDID data
		3694	* @info: display info (attached to connector)
5060	serge	3695	* @connector: connector whose edid is used to build display info
1963	serge	3696	*
		3697	* Grab any available display info and stuff it into the drm_display_info
		3698	* structure that's part of the connector. Useful for tracking bpp and
		3699	* color spaces.
		3700	*/
		3701	static void drm_add_display_info(struct edid *edid,
5060	serge	3702	struct drm_display_info *info,
		3703	struct drm_connector *connector)
1963	serge	3704	{
2160	serge	3705	u8 *edid_ext;
		3706
1963	serge	3707	info->width_mm = edid->width_cm * 10;
		3708	info->height_mm = edid->height_cm * 10;
		3709
		3710	/* driver figures it out in this case */
		3711	info->bpc = 0;
		3712	info->color_formats = 0;
		3713
3031	serge	3714	if (edid->revision < 3)
1963	serge	3715	return;
		3716
		3717	if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
		3718	return;
		3719
3031	serge	3720	/* Get data from CEA blocks if present */
		3721	edid_ext = drm_find_cea_extension(edid);
		3722	if (edid_ext) {
		3723	info->cea_rev = edid_ext[1];
		3724
		3725	/* The existence of a CEA block should imply RGB support */
		3726	info->color_formats = DRM_COLOR_FORMAT_RGB444;
		3727	if (edid_ext[3] & EDID_CEA_YCRCB444)
		3728	info->color_formats \|= DRM_COLOR_FORMAT_YCRCB444;
		3729	if (edid_ext[3] & EDID_CEA_YCRCB422)
		3730	info->color_formats \|= DRM_COLOR_FORMAT_YCRCB422;
		3731	}
		3732
5060	serge	3733	/* HDMI deep color modes supported? Assign to info, if so */
		3734	drm_assign_hdmi_deep_color_info(edid, info, connector);
		3735
3031	serge	3736	/* Only defined for 1.4 with digital displays */
		3737	if (edid->revision < 4)
		3738	return;
		3739
1963	serge	3740	switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
		3741	case DRM_EDID_DIGITAL_DEPTH_6:
		3742	info->bpc = 6;
		3743	break;
		3744	case DRM_EDID_DIGITAL_DEPTH_8:
		3745	info->bpc = 8;
		3746	break;
		3747	case DRM_EDID_DIGITAL_DEPTH_10:
		3748	info->bpc = 10;
		3749	break;
		3750	case DRM_EDID_DIGITAL_DEPTH_12:
		3751	info->bpc = 12;
		3752	break;
		3753	case DRM_EDID_DIGITAL_DEPTH_14:
		3754	info->bpc = 14;
		3755	break;
		3756	case DRM_EDID_DIGITAL_DEPTH_16:
		3757	info->bpc = 16;
		3758	break;
		3759	case DRM_EDID_DIGITAL_DEPTH_UNDEF:
		3760	default:
		3761	info->bpc = 0;
		3762	break;
		3763	}
		3764
5060	serge	3765	DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
		3766	connector->name, info->bpc);
		3767
3031	serge	3768	info->color_formats \|= DRM_COLOR_FORMAT_RGB444;
		3769	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
		3770	info->color_formats \|= DRM_COLOR_FORMAT_YCRCB444;
		3771	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
		3772	info->color_formats \|= DRM_COLOR_FORMAT_YCRCB422;
1963	serge	3773	}
		3774
		3775	/**
1123	serge	3776	* drm_add_edid_modes - add modes from EDID data, if available
		3777	* @connector: connector we're probing
5060	serge	3778	* @edid: EDID data
1123	serge	3779	*
		3780	* Add the specified modes to the connector's mode list.
		3781	*
5060	serge	3782	* Return: The number of modes added or 0 if we couldn't find any.
1123	serge	3783	*/
		3784	int drm_add_edid_modes(struct drm_connector connector, struct edid edid)
		3785	{
		3786	int num_modes = 0;
		3787	u32 quirks;
		3788
		3789	if (edid == NULL) {
		3790	return 0;
		3791	}
1430	serge	3792	if (!drm_edid_is_valid(edid)) {
1963	serge	3793	dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
5060	serge	3794	connector->name);
1123	serge	3795	return 0;
		3796	}
		3797
		3798	quirks = edid_get_quirks(edid);
		3799
1963	serge	3800	/*
		3801	* EDID spec says modes should be preferred in this order:
		3802	* - preferred detailed mode
		3803	* - other detailed modes from base block
		3804	* - detailed modes from extension blocks
		3805	* - CVT 3-byte code modes
		3806	* - standard timing codes
		3807	* - established timing codes
		3808	* - modes inferred from GTF or CVT range information
		3809	*
		3810	* We get this pretty much right.
		3811	*
		3812	* XXX order for additional mode types in extension blocks?
		3813	*/
		3814	num_modes += add_detailed_modes(connector, edid, quirks);
		3815	num_modes += add_cvt_modes(connector, edid);
		3816	num_modes += add_standard_modes(connector, edid);
1123	serge	3817	num_modes += add_established_modes(connector, edid);
3031	serge	3818	num_modes += add_cea_modes(connector, edid);
4075	Serge	3819	num_modes += add_alternate_cea_modes(connector, edid);
6084	serge	3820	if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
		3821	num_modes += add_inferred_modes(connector, edid);
1123	serge	3822
		3823	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 \| EDID_QUIRK_PREFER_LARGE_75))
		3824	edid_fixup_preferred(connector, quirks);
		3825
5060	serge	3826	drm_add_display_info(edid, &connector->display_info, connector);
1123	serge	3827
6660	serge	3828	if (quirks & EDID_QUIRK_FORCE_6BPC)
		3829	connector->display_info.bpc = 6;
		3830
4539	Serge	3831	if (quirks & EDID_QUIRK_FORCE_8BPC)
		3832	connector->display_info.bpc = 8;
		3833
5060	serge	3834	if (quirks & EDID_QUIRK_FORCE_12BPC)
		3835	connector->display_info.bpc = 12;
		3836
1123	serge	3837	return num_modes;
		3838	}
		3839	EXPORT_SYMBOL(drm_add_edid_modes);
1179	serge	3840
		3841	/**
		3842	* drm_add_modes_noedid - add modes for the connectors without EDID
		3843	* @connector: connector we're probing
		3844	* @hdisplay: the horizontal display limit
		3845	* @vdisplay: the vertical display limit
		3846	*
		3847	* Add the specified modes to the connector's mode list. Only when the
		3848	* hdisplay/vdisplay is not beyond the given limit, it will be added.
		3849	*
5060	serge	3850	* Return: The number of modes added or 0 if we couldn't find any.
1179	serge	3851	*/
		3852	int drm_add_modes_noedid(struct drm_connector *connector,
		3853	int hdisplay, int vdisplay)
		3854	{
		3855	int i, count, num_modes = 0;
1963	serge	3856	struct drm_display_mode *mode;
1179	serge	3857	struct drm_device *dev = connector->dev;
		3858
6084	serge	3859	count = ARRAY_SIZE(drm_dmt_modes);
1179	serge	3860	if (hdisplay < 0)
		3861	hdisplay = 0;
		3862	if (vdisplay < 0)
		3863	vdisplay = 0;
		3864
		3865	for (i = 0; i < count; i++) {
1963	serge	3866	const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1179	serge	3867	if (hdisplay && vdisplay) {
		3868	/*
		3869	* Only when two are valid, they will be used to check
		3870	* whether the mode should be added to the mode list of
		3871	* the connector.
		3872	*/
		3873	if (ptr->hdisplay > hdisplay \|\|
		3874	ptr->vdisplay > vdisplay)
		3875	continue;
		3876	}
1321	serge	3877	if (drm_mode_vrefresh(ptr) > 61)
		3878	continue;
1179	serge	3879	mode = drm_mode_duplicate(dev, ptr);
		3880	if (mode) {
		3881	drm_mode_probed_add(connector, mode);
		3882	num_modes++;
		3883	}
		3884	}
		3885	return num_modes;
		3886	}
		3887	EXPORT_SYMBOL(drm_add_modes_noedid);
3192	Serge	3888
5060	serge	3889	/**
		3890	* drm_set_preferred_mode - Sets the preferred mode of a connector
		3891	* @connector: connector whose mode list should be processed
		3892	* @hpref: horizontal resolution of preferred mode
		3893	* @vpref: vertical resolution of preferred mode
		3894	*
		3895	* Marks a mode as preferred if it matches the resolution specified by @hpref
		3896	* and @vpref.
		3897	*/
4560	Serge	3898	void drm_set_preferred_mode(struct drm_connector *connector,
		3899	int hpref, int vpref)
		3900	{
		3901	struct drm_display_mode *mode;
		3902
		3903	list_for_each_entry(mode, &connector->probed_modes, head) {
6084	serge	3904	if (mode->hdisplay == hpref &&
5060	serge	3905	mode->vdisplay == vpref)
4560	Serge	3906	mode->type \|= DRM_MODE_TYPE_PREFERRED;
		3907	}
		3908	}
		3909	EXPORT_SYMBOL(drm_set_preferred_mode);
		3910
3192	Serge	3911	/**
3480	Serge	3912	* drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
		3913	* data from a DRM display mode
		3914	* @frame: HDMI AVI infoframe
		3915	* @mode: DRM display mode
3192	Serge	3916	*
5060	serge	3917	* Return: 0 on success or a negative error code on failure.
3192	Serge	3918	*/
3480	Serge	3919	int
		3920	drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
		3921	const struct drm_display_mode *mode)
3192	Serge	3922	{
3480	Serge	3923	int err;
3192	Serge	3924
3480	Serge	3925	if (!frame \|\| !mode)
		3926	return -EINVAL;
3192	Serge	3927
3480	Serge	3928	err = hdmi_avi_infoframe_init(frame);
		3929	if (err < 0)
		3930	return err;
		3931
4104	Serge	3932	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
		3933	frame->pixel_repeat = 1;
		3934
3480	Serge	3935	frame->video_code = drm_match_cea_mode(mode);
		3936
		3937	frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
5060	serge	3938
		3939	/*
		3940	* Populate picture aspect ratio from either
		3941	* user input (if specified) or from the CEA mode list.
		3942	*/
		3943	if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 \|\|
		3944	mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
		3945	frame->picture_aspect = mode->picture_aspect_ratio;
		3946	else if (frame->video_code > 0)
		3947	frame->picture_aspect = drm_get_cea_aspect_ratio(
		3948	frame->video_code);
		3949
3480	Serge	3950	frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
5060	serge	3951	frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
3480	Serge	3952
3192	Serge	3953	return 0;
		3954	}
3480	Serge	3955	EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
4104	Serge	3956
4560	Serge	3957	static enum hdmi_3d_structure
		3958	s3d_structure_from_display_mode(const struct drm_display_mode *mode)
		3959	{
		3960	u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
		3961
		3962	switch (layout) {
		3963	case DRM_MODE_FLAG_3D_FRAME_PACKING:
		3964	return HDMI_3D_STRUCTURE_FRAME_PACKING;
		3965	case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
		3966	return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
		3967	case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
		3968	return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
		3969	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
		3970	return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
		3971	case DRM_MODE_FLAG_3D_L_DEPTH:
		3972	return HDMI_3D_STRUCTURE_L_DEPTH;
		3973	case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
		3974	return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
		3975	case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
		3976	return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
		3977	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
		3978	return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
		3979	default:
		3980	return HDMI_3D_STRUCTURE_INVALID;
		3981	}
		3982	}
		3983
4104	Serge	3984	/**
		3985	* drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
		3986	* data from a DRM display mode
		3987	* @frame: HDMI vendor infoframe
		3988	* @mode: DRM display mode
		3989	*
		3990	* Note that there's is a need to send HDMI vendor infoframes only when using a
		3991	* 4k or stereoscopic 3D mode. So when giving any other mode as input this
		3992	* function will return -EINVAL, error that can be safely ignored.
		3993	*
5060	serge	3994	* Return: 0 on success or a negative error code on failure.
4104	Serge	3995	*/
		3996	int
		3997	drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
		3998	const struct drm_display_mode *mode)
		3999	{
		4000	int err;
4560	Serge	4001	u32 s3d_flags;
4104	Serge	4002	u8 vic;
		4003
		4004	if (!frame \|\| !mode)
		4005	return -EINVAL;
		4006
		4007	vic = drm_match_hdmi_mode(mode);
4560	Serge	4008	s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
		4009
		4010	if (!vic && !s3d_flags)
4104	Serge	4011	return -EINVAL;
		4012
4560	Serge	4013	if (vic && s3d_flags)
		4014	return -EINVAL;
		4015
4104	Serge	4016	err = hdmi_vendor_infoframe_init(frame);
		4017	if (err < 0)
		4018	return err;
		4019
4560	Serge	4020	if (vic)
6084	serge	4021	frame->vic = vic;
4560	Serge	4022	else
		4023	frame->s3d_struct = s3d_structure_from_display_mode(mode);
4104	Serge	4024
		4025	return 0;
		4026	}
		4027	EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
5271	serge	4028
		4029	static int drm_parse_display_id(struct drm_connector *connector,
		4030	u8 *displayid, int length,
		4031	bool is_edid_extension)
		4032	{
		4033	/* if this is an EDID extension the first byte will be 0x70 */
		4034	int idx = 0;
		4035	struct displayid_hdr *base;
		4036	struct displayid_block *block;
		4037	u8 csum = 0;
		4038	int i;
		4039
		4040	if (is_edid_extension)
		4041	idx = 1;
		4042
		4043	base = (struct displayid_hdr *)&displayid[idx];
		4044
		4045	DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
		4046	base->rev, base->bytes, base->prod_id, base->ext_count);
		4047
		4048	if (base->bytes + 5 > length - idx)
		4049	return -EINVAL;
		4050
		4051	for (i = idx; i <= base->bytes + 5; i++) {
		4052	csum += displayid[i];
		4053	}
		4054	if (csum) {
		4055	DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
		4056	return -EINVAL;
		4057	}
		4058
		4059	block = (struct displayid_block *)&displayid[idx + 4];
		4060	DRM_DEBUG_KMS("block id %d, rev %d, len %d\n",
		4061	block->tag, block->rev, block->num_bytes);
		4062
		4063	switch (block->tag) {
		4064	case DATA_BLOCK_TILED_DISPLAY: {
		4065	struct displayid_tiled_block tile = (struct displayid_tiled_block )block;
		4066
		4067	u16 w, h;
		4068	u8 tile_v_loc, tile_h_loc;
		4069	u8 num_v_tile, num_h_tile;
		4070	struct drm_tile_group *tg;
		4071
		4072	w = tile->tile_size[0] \| tile->tile_size[1] << 8;
		4073	h = tile->tile_size[2] \| tile->tile_size[3] << 8;
		4074
		4075	num_v_tile = (tile->topo[0] & 0xf) \| (tile->topo[2] & 0x30);
		4076	num_h_tile = (tile->topo[0] >> 4) \| ((tile->topo[2] >> 2) & 0x30);
		4077	tile_v_loc = (tile->topo[1] & 0xf) \| ((tile->topo[2] & 0x3) << 4);
		4078	tile_h_loc = (tile->topo[1] >> 4) \| (((tile->topo[2] >> 2) & 0x3) << 4);
		4079
		4080	connector->has_tile = true;
		4081	if (tile->tile_cap & 0x80)
		4082	connector->tile_is_single_monitor = true;
		4083
		4084	connector->num_h_tile = num_h_tile + 1;
		4085	connector->num_v_tile = num_v_tile + 1;
		4086	connector->tile_h_loc = tile_h_loc;
		4087	connector->tile_v_loc = tile_v_loc;
		4088	connector->tile_h_size = w + 1;
		4089	connector->tile_v_size = h + 1;
		4090
		4091	DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
		4092	DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
		4093	DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
		4094	num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
		4095	DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
		4096
		4097	tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
		4098	if (!tg) {
		4099	tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
		4100	}
		4101	if (!tg)
		4102	return -ENOMEM;
		4103
		4104	if (connector->tile_group != tg) {
		4105	/* if we haven't got a pointer,
		4106	take the reference, drop ref to old tile group */
		4107	if (connector->tile_group) {
		4108	drm_mode_put_tile_group(connector->dev, connector->tile_group);
		4109	}
		4110	connector->tile_group = tg;
		4111	} else
		4112	/* if same tile group, then release the ref we just took. */
		4113	drm_mode_put_tile_group(connector->dev, tg);
		4114	}
		4115	break;
		4116	default:
		4117	printk("unknown displayid tag %d\n", block->tag);
		4118	break;
		4119	}
		4120	return 0;
		4121	}
		4122
		4123	static void drm_get_displayid(struct drm_connector *connector,
		4124	struct edid *edid)
		4125	{
		4126	void *displayid = NULL;
		4127	int ret;
		4128	connector->has_tile = false;
		4129	displayid = drm_find_displayid_extension(edid);
		4130	if (!displayid) {
		4131	/* drop reference to any tile group we had */
		4132	goto out_drop_ref;
		4133	}
		4134
		4135	ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
		4136	if (ret < 0)
		4137	goto out_drop_ref;
		4138	if (!connector->has_tile)
		4139	goto out_drop_ref;
		4140	return;
		4141	out_drop_ref:
		4142	if (connector->tile_group) {
		4143	drm_mode_put_tile_group(connector->dev, connector->tile_group);
		4144	connector->tile_group = NULL;
		4145	}
		4146	return;
		4147	}

Subversion Repositories Kolibri OS

(root)/drivers/video/drm/drm_edid.c @ 4560 – Rev 6660