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3192 | Serge | 1 | /* |
2 | * Copyright © 2009 Keith Packard |
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3 | * |
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4 | * Permission to use, copy, modify, distribute, and sell this software and its |
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5 | * documentation for any purpose is hereby granted without fee, provided that |
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6 | * the above copyright notice appear in all copies and that both that copyright |
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7 | * notice and this permission notice appear in supporting documentation, and |
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8 | * that the name of the copyright holders not be used in advertising or |
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9 | * publicity pertaining to distribution of the software without specific, |
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10 | * written prior permission. The copyright holders make no representations |
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11 | * about the suitability of this software for any purpose. It is provided "as |
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12 | * is" without express or implied warranty. |
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13 | * |
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14 | * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, |
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15 | * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO |
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16 | * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR |
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17 | * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, |
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18 | * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
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19 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE |
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20 | * OF THIS SOFTWARE. |
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21 | */ |
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22 | |||
23 | #include |
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24 | #include |
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6103 | serge | 25 | #include |
6088 | serge | 26 | #include |
3192 | Serge | 27 | #include |
28 | #include |
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29 | #include |
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5271 | serge | 30 | #include |
5060 | serge | 31 | #include |
3192 | Serge | 32 | |
33 | /** |
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34 | * DOC: dp helpers |
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35 | * |
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36 | * These functions contain some common logic and helpers at various abstraction |
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37 | * levels to deal with Display Port sink devices and related things like DP aux |
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38 | * channel transfers, EDID reading over DP aux channels, decoding certain DPCD |
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39 | * blocks, ... |
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40 | */ |
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41 | |||
42 | /* Helpers for DP link training */ |
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4560 | Serge | 43 | static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r) |
3192 | Serge | 44 | { |
45 | return link_status[r - DP_LANE0_1_STATUS]; |
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46 | } |
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47 | |||
4560 | Serge | 48 | static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE], |
3192 | Serge | 49 | int lane) |
50 | { |
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51 | int i = DP_LANE0_1_STATUS + (lane >> 1); |
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52 | int s = (lane & 1) * 4; |
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53 | u8 l = dp_link_status(link_status, i); |
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54 | return (l >> s) & 0xf; |
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55 | } |
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56 | |||
4560 | Serge | 57 | bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
3192 | Serge | 58 | int lane_count) |
59 | { |
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60 | u8 lane_align; |
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61 | u8 lane_status; |
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62 | int lane; |
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63 | |||
64 | lane_align = dp_link_status(link_status, |
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65 | DP_LANE_ALIGN_STATUS_UPDATED); |
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66 | if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0) |
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67 | return false; |
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68 | for (lane = 0; lane < lane_count; lane++) { |
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69 | lane_status = dp_get_lane_status(link_status, lane); |
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70 | if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS) |
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71 | return false; |
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72 | } |
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73 | return true; |
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74 | } |
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75 | EXPORT_SYMBOL(drm_dp_channel_eq_ok); |
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76 | |||
4560 | Serge | 77 | bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
3192 | Serge | 78 | int lane_count) |
79 | { |
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80 | int lane; |
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81 | u8 lane_status; |
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82 | |||
83 | for (lane = 0; lane < lane_count; lane++) { |
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84 | lane_status = dp_get_lane_status(link_status, lane); |
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85 | if ((lane_status & DP_LANE_CR_DONE) == 0) |
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86 | return false; |
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87 | } |
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88 | return true; |
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89 | } |
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90 | EXPORT_SYMBOL(drm_dp_clock_recovery_ok); |
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91 | |||
4560 | Serge | 92 | u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], |
3192 | Serge | 93 | int lane) |
94 | { |
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95 | int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); |
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96 | int s = ((lane & 1) ? |
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97 | DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT : |
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98 | DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT); |
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99 | u8 l = dp_link_status(link_status, i); |
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100 | |||
101 | return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT; |
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102 | } |
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103 | EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage); |
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104 | |||
4560 | Serge | 105 | u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE], |
3192 | Serge | 106 | int lane) |
107 | { |
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108 | int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); |
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109 | int s = ((lane & 1) ? |
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110 | DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT : |
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111 | DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT); |
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112 | u8 l = dp_link_status(link_status, i); |
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113 | |||
114 | return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT; |
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115 | } |
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116 | EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis); |
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117 | |||
4560 | Serge | 118 | void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { |
3192 | Serge | 119 | if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) |
120 | udelay(100); |
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121 | else |
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122 | mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); |
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123 | } |
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124 | EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay); |
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125 | |||
4560 | Serge | 126 | void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { |
3192 | Serge | 127 | if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) |
128 | udelay(400); |
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129 | else |
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130 | mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); |
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131 | } |
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132 | EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); |
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133 | |||
134 | u8 drm_dp_link_rate_to_bw_code(int link_rate) |
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135 | { |
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136 | switch (link_rate) { |
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137 | case 162000: |
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138 | default: |
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139 | return DP_LINK_BW_1_62; |
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140 | case 270000: |
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141 | return DP_LINK_BW_2_7; |
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142 | case 540000: |
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143 | return DP_LINK_BW_5_4; |
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144 | } |
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145 | } |
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146 | EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code); |
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147 | |||
148 | int drm_dp_bw_code_to_link_rate(u8 link_bw) |
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149 | { |
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150 | switch (link_bw) { |
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151 | case DP_LINK_BW_1_62: |
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152 | default: |
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153 | return 162000; |
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154 | case DP_LINK_BW_2_7: |
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155 | return 270000; |
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156 | case DP_LINK_BW_5_4: |
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157 | return 540000; |
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158 | } |
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159 | } |
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160 | EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate); |
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5060 | serge | 161 | |
6084 | serge | 162 | #define AUX_RETRY_INTERVAL 500 /* us */ |
163 | |||
5060 | serge | 164 | /** |
165 | * DOC: dp helpers |
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166 | * |
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167 | * The DisplayPort AUX channel is an abstraction to allow generic, driver- |
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168 | * independent access to AUX functionality. Drivers can take advantage of |
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169 | * this by filling in the fields of the drm_dp_aux structure. |
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170 | * |
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171 | * Transactions are described using a hardware-independent drm_dp_aux_msg |
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172 | * structure, which is passed into a driver's .transfer() implementation. |
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173 | * Both native and I2C-over-AUX transactions are supported. |
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174 | */ |
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175 | |||
176 | static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request, |
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177 | unsigned int offset, void *buffer, size_t size) |
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178 | { |
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179 | struct drm_dp_aux_msg msg; |
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180 | unsigned int retry; |
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6660 | serge | 181 | int err = 0; |
5060 | serge | 182 | |
183 | memset(&msg, 0, sizeof(msg)); |
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184 | msg.address = offset; |
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185 | msg.request = request; |
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186 | msg.buffer = buffer; |
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187 | msg.size = size; |
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188 | |||
6660 | serge | 189 | mutex_lock(&aux->hw_mutex); |
190 | |||
5060 | serge | 191 | /* |
192 | * The specification doesn't give any recommendation on how often to |
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5271 | serge | 193 | * retry native transactions. We used to retry 7 times like for |
194 | * aux i2c transactions but real world devices this wasn't |
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195 | * sufficient, bump to 32 which makes Dell 4k monitors happier. |
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5060 | serge | 196 | */ |
5271 | serge | 197 | for (retry = 0; retry < 32; retry++) { |
5060 | serge | 198 | |
199 | err = aux->transfer(aux, &msg); |
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200 | if (err < 0) { |
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201 | if (err == -EBUSY) |
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202 | continue; |
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203 | |||
6660 | serge | 204 | goto unlock; |
5060 | serge | 205 | } |
206 | |||
207 | |||
208 | switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) { |
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209 | case DP_AUX_NATIVE_REPLY_ACK: |
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210 | if (err < size) |
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6660 | serge | 211 | err = -EPROTO; |
212 | goto unlock; |
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5060 | serge | 213 | |
214 | case DP_AUX_NATIVE_REPLY_NACK: |
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6660 | serge | 215 | err = -EIO; |
216 | goto unlock; |
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5060 | serge | 217 | |
218 | case DP_AUX_NATIVE_REPLY_DEFER: |
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6088 | serge | 219 | usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); |
5060 | serge | 220 | break; |
221 | } |
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222 | } |
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223 | |||
224 | DRM_DEBUG_KMS("too many retries, giving up\n"); |
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6660 | serge | 225 | err = -EIO; |
226 | |||
227 | unlock: |
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228 | mutex_unlock(&aux->hw_mutex); |
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229 | return err; |
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5060 | serge | 230 | } |
231 | |||
232 | /** |
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233 | * drm_dp_dpcd_read() - read a series of bytes from the DPCD |
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234 | * @aux: DisplayPort AUX channel |
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235 | * @offset: address of the (first) register to read |
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236 | * @buffer: buffer to store the register values |
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237 | * @size: number of bytes in @buffer |
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238 | * |
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239 | * Returns the number of bytes transferred on success, or a negative error |
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240 | * code on failure. -EIO is returned if the request was NAKed by the sink or |
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241 | * if the retry count was exceeded. If not all bytes were transferred, this |
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242 | * function returns -EPROTO. Errors from the underlying AUX channel transfer |
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243 | * function, with the exception of -EBUSY (which causes the transaction to |
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244 | * be retried), are propagated to the caller. |
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245 | */ |
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246 | ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, |
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247 | void *buffer, size_t size) |
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248 | { |
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249 | return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer, |
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250 | size); |
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251 | } |
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252 | EXPORT_SYMBOL(drm_dp_dpcd_read); |
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253 | |||
254 | /** |
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255 | * drm_dp_dpcd_write() - write a series of bytes to the DPCD |
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256 | * @aux: DisplayPort AUX channel |
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257 | * @offset: address of the (first) register to write |
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258 | * @buffer: buffer containing the values to write |
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259 | * @size: number of bytes in @buffer |
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260 | * |
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261 | * Returns the number of bytes transferred on success, or a negative error |
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262 | * code on failure. -EIO is returned if the request was NAKed by the sink or |
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263 | * if the retry count was exceeded. If not all bytes were transferred, this |
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264 | * function returns -EPROTO. Errors from the underlying AUX channel transfer |
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265 | * function, with the exception of -EBUSY (which causes the transaction to |
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266 | * be retried), are propagated to the caller. |
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267 | */ |
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268 | ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, |
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269 | void *buffer, size_t size) |
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270 | { |
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271 | return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, |
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272 | size); |
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273 | } |
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274 | EXPORT_SYMBOL(drm_dp_dpcd_write); |
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275 | |||
276 | /** |
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277 | * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207) |
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278 | * @aux: DisplayPort AUX channel |
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279 | * @status: buffer to store the link status in (must be at least 6 bytes) |
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280 | * |
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281 | * Returns the number of bytes transferred on success or a negative error |
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282 | * code on failure. |
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283 | */ |
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284 | int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, |
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285 | u8 status[DP_LINK_STATUS_SIZE]) |
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286 | { |
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287 | return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status, |
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288 | DP_LINK_STATUS_SIZE); |
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289 | } |
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290 | EXPORT_SYMBOL(drm_dp_dpcd_read_link_status); |
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291 | |||
292 | /** |
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293 | * drm_dp_link_probe() - probe a DisplayPort link for capabilities |
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294 | * @aux: DisplayPort AUX channel |
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295 | * @link: pointer to structure in which to return link capabilities |
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296 | * |
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297 | * The structure filled in by this function can usually be passed directly |
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298 | * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and |
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299 | * configure the link based on the link's capabilities. |
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300 | * |
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301 | * Returns 0 on success or a negative error code on failure. |
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302 | */ |
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303 | int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link) |
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304 | { |
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305 | u8 values[3]; |
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306 | int err; |
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307 | |||
308 | memset(link, 0, sizeof(*link)); |
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309 | |||
310 | err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values)); |
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311 | if (err < 0) |
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312 | return err; |
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313 | |||
314 | link->revision = values[0]; |
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315 | link->rate = drm_dp_bw_code_to_link_rate(values[1]); |
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316 | link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK; |
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317 | |||
318 | if (values[2] & DP_ENHANCED_FRAME_CAP) |
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319 | link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING; |
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320 | |||
321 | return 0; |
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322 | } |
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323 | EXPORT_SYMBOL(drm_dp_link_probe); |
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324 | |||
325 | /** |
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326 | * drm_dp_link_power_up() - power up a DisplayPort link |
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327 | * @aux: DisplayPort AUX channel |
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328 | * @link: pointer to a structure containing the link configuration |
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329 | * |
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330 | * Returns 0 on success or a negative error code on failure. |
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331 | */ |
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332 | int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link) |
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333 | { |
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334 | u8 value; |
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335 | int err; |
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336 | |||
337 | /* DP_SET_POWER register is only available on DPCD v1.1 and later */ |
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338 | if (link->revision < 0x11) |
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339 | return 0; |
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340 | |||
341 | err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); |
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342 | if (err < 0) |
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343 | return err; |
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344 | |||
345 | value &= ~DP_SET_POWER_MASK; |
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346 | value |= DP_SET_POWER_D0; |
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347 | |||
348 | err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); |
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349 | if (err < 0) |
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350 | return err; |
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351 | |||
352 | /* |
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353 | * According to the DP 1.1 specification, a "Sink Device must exit the |
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354 | * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink |
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355 | * Control Field" (register 0x600). |
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356 | */ |
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6088 | serge | 357 | usleep_range(1000, 2000); |
5060 | serge | 358 | |
359 | return 0; |
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360 | } |
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361 | EXPORT_SYMBOL(drm_dp_link_power_up); |
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362 | |||
363 | /** |
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6084 | serge | 364 | * drm_dp_link_power_down() - power down a DisplayPort link |
365 | * @aux: DisplayPort AUX channel |
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366 | * @link: pointer to a structure containing the link configuration |
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367 | * |
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368 | * Returns 0 on success or a negative error code on failure. |
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369 | */ |
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370 | int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link) |
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371 | { |
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372 | u8 value; |
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373 | int err; |
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374 | |||
375 | /* DP_SET_POWER register is only available on DPCD v1.1 and later */ |
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376 | if (link->revision < 0x11) |
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377 | return 0; |
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378 | |||
379 | err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); |
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380 | if (err < 0) |
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381 | return err; |
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382 | |||
383 | value &= ~DP_SET_POWER_MASK; |
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384 | value |= DP_SET_POWER_D3; |
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385 | |||
386 | err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); |
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387 | if (err < 0) |
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388 | return err; |
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389 | |||
390 | return 0; |
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391 | } |
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392 | EXPORT_SYMBOL(drm_dp_link_power_down); |
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393 | |||
394 | /** |
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5060 | serge | 395 | * drm_dp_link_configure() - configure a DisplayPort link |
396 | * @aux: DisplayPort AUX channel |
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397 | * @link: pointer to a structure containing the link configuration |
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398 | * |
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399 | * Returns 0 on success or a negative error code on failure. |
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400 | */ |
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401 | int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link) |
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402 | { |
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403 | u8 values[2]; |
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404 | int err; |
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405 | |||
406 | values[0] = drm_dp_link_rate_to_bw_code(link->rate); |
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407 | values[1] = link->num_lanes; |
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408 | |||
409 | if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING) |
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410 | values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; |
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411 | |||
412 | err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); |
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413 | if (err < 0) |
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414 | return err; |
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415 | |||
416 | return 0; |
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417 | } |
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418 | EXPORT_SYMBOL(drm_dp_link_configure); |
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419 | |||
420 | /* |
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421 | * I2C-over-AUX implementation |
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422 | */ |
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423 | |||
424 | static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter) |
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425 | { |
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426 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | |
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427 | I2C_FUNC_SMBUS_READ_BLOCK_DATA | |
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428 | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | |
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429 | I2C_FUNC_10BIT_ADDR; |
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430 | } |
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431 | |||
6084 | serge | 432 | static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg *msg) |
433 | { |
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434 | /* |
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435 | * In case of i2c defer or short i2c ack reply to a write, |
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436 | * we need to switch to WRITE_STATUS_UPDATE to drain the |
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437 | * rest of the message |
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438 | */ |
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439 | if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) { |
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440 | msg->request &= DP_AUX_I2C_MOT; |
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441 | msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE; |
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442 | } |
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443 | } |
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444 | |||
445 | #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */ |
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446 | #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */ |
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447 | #define AUX_STOP_LEN 4 |
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448 | #define AUX_CMD_LEN 4 |
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449 | #define AUX_ADDRESS_LEN 20 |
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450 | #define AUX_REPLY_PAD_LEN 4 |
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451 | #define AUX_LENGTH_LEN 8 |
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452 | |||
5060 | serge | 453 | /* |
6084 | serge | 454 | * Calculate the duration of the AUX request/reply in usec. Gives the |
455 | * "best" case estimate, ie. successful while as short as possible. |
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456 | */ |
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457 | static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg *msg) |
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458 | { |
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459 | int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN + |
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460 | AUX_CMD_LEN + AUX_ADDRESS_LEN + AUX_LENGTH_LEN; |
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461 | |||
462 | if ((msg->request & DP_AUX_I2C_READ) == 0) |
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463 | len += msg->size * 8; |
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464 | |||
465 | return len; |
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466 | } |
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467 | |||
468 | static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg *msg) |
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469 | { |
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470 | int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN + |
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471 | AUX_CMD_LEN + AUX_REPLY_PAD_LEN; |
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472 | |||
473 | /* |
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474 | * For read we expect what was asked. For writes there will |
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475 | * be 0 or 1 data bytes. Assume 0 for the "best" case. |
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476 | */ |
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477 | if (msg->request & DP_AUX_I2C_READ) |
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478 | len += msg->size * 8; |
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479 | |||
480 | return len; |
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481 | } |
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482 | |||
483 | #define I2C_START_LEN 1 |
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484 | #define I2C_STOP_LEN 1 |
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485 | #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */ |
||
486 | #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */ |
||
487 | |||
488 | /* |
||
489 | * Calculate the length of the i2c transfer in usec, assuming |
||
490 | * the i2c bus speed is as specified. Gives the the "worst" |
||
491 | * case estimate, ie. successful while as long as possible. |
||
492 | * Doesn't account the the "MOT" bit, and instead assumes each |
||
493 | * message includes a START, ADDRESS and STOP. Neither does it |
||
494 | * account for additional random variables such as clock stretching. |
||
495 | */ |
||
496 | static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg *msg, |
||
497 | int i2c_speed_khz) |
||
498 | { |
||
499 | /* AUX bitrate is 1MHz, i2c bitrate as specified */ |
||
500 | return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN + |
||
501 | msg->size * I2C_DATA_LEN + |
||
502 | I2C_STOP_LEN) * 1000, i2c_speed_khz); |
||
503 | } |
||
504 | |||
505 | /* |
||
506 | * Deterine how many retries should be attempted to successfully transfer |
||
507 | * the specified message, based on the estimated durations of the |
||
508 | * i2c and AUX transfers. |
||
509 | */ |
||
510 | static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg *msg, |
||
511 | int i2c_speed_khz) |
||
512 | { |
||
513 | int aux_time_us = drm_dp_aux_req_duration(msg) + |
||
514 | drm_dp_aux_reply_duration(msg); |
||
515 | int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz); |
||
516 | |||
517 | return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL); |
||
518 | } |
||
519 | |||
520 | /* |
||
521 | * FIXME currently assumes 10 kHz as some real world devices seem |
||
522 | * to require it. We should query/set the speed via DPCD if supported. |
||
523 | */ |
||
524 | static int dp_aux_i2c_speed_khz __read_mostly = 10; |
||
525 | module_param_unsafe(dp_aux_i2c_speed_khz, int, 0644); |
||
526 | MODULE_PARM_DESC(dp_aux_i2c_speed_khz, |
||
527 | "Assumed speed of the i2c bus in kHz, (1-400, default 10)"); |
||
528 | |||
529 | /* |
||
5060 | serge | 530 | * Transfer a single I2C-over-AUX message and handle various error conditions, |
531 | * retrying the transaction as appropriate. It is assumed that the |
||
532 | * aux->transfer function does not modify anything in the msg other than the |
||
533 | * reply field. |
||
6084 | serge | 534 | * |
535 | * Returns bytes transferred on success, or a negative error code on failure. |
||
5060 | serge | 536 | */ |
537 | static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) |
||
538 | { |
||
6084 | serge | 539 | unsigned int retry, defer_i2c; |
540 | int ret; |
||
5060 | serge | 541 | /* |
542 | * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device |
||
543 | * is required to retry at least seven times upon receiving AUX_DEFER |
||
544 | * before giving up the AUX transaction. |
||
6084 | serge | 545 | * |
546 | * We also try to account for the i2c bus speed. |
||
5060 | serge | 547 | */ |
6084 | serge | 548 | int max_retries = max(7, drm_dp_i2c_retry_count(msg, dp_aux_i2c_speed_khz)); |
549 | |||
550 | for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c); retry++) { |
||
551 | ret = aux->transfer(aux, msg); |
||
552 | if (ret < 0) { |
||
553 | if (ret == -EBUSY) |
||
5060 | serge | 554 | continue; |
555 | |||
6084 | serge | 556 | DRM_DEBUG_KMS("transaction failed: %d\n", ret); |
557 | return ret; |
||
5060 | serge | 558 | } |
559 | |||
560 | |||
561 | switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) { |
||
562 | case DP_AUX_NATIVE_REPLY_ACK: |
||
563 | /* |
||
564 | * For I2C-over-AUX transactions this isn't enough, we |
||
565 | * need to check for the I2C ACK reply. |
||
566 | */ |
||
567 | break; |
||
568 | |||
569 | case DP_AUX_NATIVE_REPLY_NACK: |
||
6084 | serge | 570 | DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size); |
5060 | serge | 571 | return -EREMOTEIO; |
572 | |||
573 | case DP_AUX_NATIVE_REPLY_DEFER: |
||
6084 | serge | 574 | DRM_DEBUG_KMS("native defer\n"); |
5060 | serge | 575 | /* |
576 | * We could check for I2C bit rate capabilities and if |
||
577 | * available adjust this interval. We could also be |
||
578 | * more careful with DP-to-legacy adapters where a |
||
579 | * long legacy cable may force very low I2C bit rates. |
||
580 | * |
||
581 | * For now just defer for long enough to hopefully be |
||
582 | * safe for all use-cases. |
||
583 | */ |
||
6088 | serge | 584 | usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); |
5060 | serge | 585 | continue; |
586 | |||
587 | default: |
||
588 | DRM_ERROR("invalid native reply %#04x\n", msg->reply); |
||
589 | return -EREMOTEIO; |
||
590 | } |
||
591 | |||
592 | switch (msg->reply & DP_AUX_I2C_REPLY_MASK) { |
||
593 | case DP_AUX_I2C_REPLY_ACK: |
||
594 | /* |
||
595 | * Both native ACK and I2C ACK replies received. We |
||
596 | * can assume the transfer was successful. |
||
597 | */ |
||
6084 | serge | 598 | if (ret != msg->size) |
599 | drm_dp_i2c_msg_write_status_update(msg); |
||
600 | return ret; |
||
5060 | serge | 601 | |
602 | case DP_AUX_I2C_REPLY_NACK: |
||
6084 | serge | 603 | DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size); |
604 | aux->i2c_nack_count++; |
||
5060 | serge | 605 | return -EREMOTEIO; |
606 | |||
607 | case DP_AUX_I2C_REPLY_DEFER: |
||
608 | DRM_DEBUG_KMS("I2C defer\n"); |
||
6084 | serge | 609 | /* DP Compliance Test 4.2.2.5 Requirement: |
610 | * Must have at least 7 retries for I2C defers on the |
||
611 | * transaction to pass this test |
||
612 | */ |
||
613 | aux->i2c_defer_count++; |
||
614 | if (defer_i2c < 7) |
||
615 | defer_i2c++; |
||
6088 | serge | 616 | usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); |
6084 | serge | 617 | drm_dp_i2c_msg_write_status_update(msg); |
618 | |||
5060 | serge | 619 | continue; |
620 | |||
621 | default: |
||
622 | DRM_ERROR("invalid I2C reply %#04x\n", msg->reply); |
||
623 | return -EREMOTEIO; |
||
624 | } |
||
625 | } |
||
626 | |||
627 | DRM_DEBUG_KMS("too many retries, giving up\n"); |
||
628 | return -EREMOTEIO; |
||
629 | } |
||
630 | |||
6084 | serge | 631 | static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg *msg, |
632 | const struct i2c_msg *i2c_msg) |
||
633 | { |
||
634 | msg->request = (i2c_msg->flags & I2C_M_RD) ? |
||
635 | DP_AUX_I2C_READ : DP_AUX_I2C_WRITE; |
||
636 | msg->request |= DP_AUX_I2C_MOT; |
||
637 | } |
||
638 | |||
639 | /* |
||
640 | * Keep retrying drm_dp_i2c_do_msg until all data has been transferred. |
||
641 | * |
||
642 | * Returns an error code on failure, or a recommended transfer size on success. |
||
643 | */ |
||
644 | static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg) |
||
645 | { |
||
646 | int err, ret = orig_msg->size; |
||
647 | struct drm_dp_aux_msg msg = *orig_msg; |
||
648 | |||
649 | while (msg.size > 0) { |
||
650 | err = drm_dp_i2c_do_msg(aux, &msg); |
||
651 | if (err <= 0) |
||
652 | return err == 0 ? -EPROTO : err; |
||
653 | |||
654 | if (err < msg.size && err < ret) { |
||
655 | DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n", |
||
656 | msg.size, err); |
||
657 | ret = err; |
||
658 | } |
||
659 | |||
660 | msg.size -= err; |
||
661 | msg.buffer += err; |
||
662 | } |
||
663 | |||
664 | return ret; |
||
665 | } |
||
666 | |||
667 | /* |
||
668 | * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX |
||
669 | * packets to be as large as possible. If not, the I2C transactions never |
||
670 | * succeed. Hence the default is maximum. |
||
671 | */ |
||
672 | static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES; |
||
673 | module_param_unsafe(dp_aux_i2c_transfer_size, int, 0644); |
||
674 | MODULE_PARM_DESC(dp_aux_i2c_transfer_size, |
||
675 | "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)"); |
||
676 | |||
5060 | serge | 677 | static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, |
678 | int num) |
||
679 | { |
||
680 | struct drm_dp_aux *aux = adapter->algo_data; |
||
681 | unsigned int i, j; |
||
6084 | serge | 682 | unsigned transfer_size; |
5060 | serge | 683 | struct drm_dp_aux_msg msg; |
684 | int err = 0; |
||
685 | |||
6084 | serge | 686 | dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES); |
687 | |||
5060 | serge | 688 | memset(&msg, 0, sizeof(msg)); |
689 | |||
6660 | serge | 690 | mutex_lock(&aux->hw_mutex); |
691 | |||
5060 | serge | 692 | for (i = 0; i < num; i++) { |
693 | msg.address = msgs[i].addr; |
||
6084 | serge | 694 | drm_dp_i2c_msg_set_request(&msg, &msgs[i]); |
5060 | serge | 695 | /* Send a bare address packet to start the transaction. |
696 | * Zero sized messages specify an address only (bare |
||
697 | * address) transaction. |
||
698 | */ |
||
699 | msg.buffer = NULL; |
||
700 | msg.size = 0; |
||
701 | err = drm_dp_i2c_do_msg(aux, &msg); |
||
6084 | serge | 702 | |
703 | /* |
||
704 | * Reset msg.request in case in case it got |
||
705 | * changed into a WRITE_STATUS_UPDATE. |
||
706 | */ |
||
707 | drm_dp_i2c_msg_set_request(&msg, &msgs[i]); |
||
708 | |||
5060 | serge | 709 | if (err < 0) |
710 | break; |
||
6084 | serge | 711 | /* We want each transaction to be as large as possible, but |
712 | * we'll go to smaller sizes if the hardware gives us a |
||
713 | * short reply. |
||
5060 | serge | 714 | */ |
6084 | serge | 715 | transfer_size = dp_aux_i2c_transfer_size; |
716 | for (j = 0; j < msgs[i].len; j += msg.size) { |
||
5060 | serge | 717 | msg.buffer = msgs[i].buf + j; |
6084 | serge | 718 | msg.size = min(transfer_size, msgs[i].len - j); |
5060 | serge | 719 | |
6084 | serge | 720 | err = drm_dp_i2c_drain_msg(aux, &msg); |
721 | |||
722 | /* |
||
723 | * Reset msg.request in case in case it got |
||
724 | * changed into a WRITE_STATUS_UPDATE. |
||
725 | */ |
||
726 | drm_dp_i2c_msg_set_request(&msg, &msgs[i]); |
||
727 | |||
5060 | serge | 728 | if (err < 0) |
729 | break; |
||
6084 | serge | 730 | transfer_size = err; |
5060 | serge | 731 | } |
732 | if (err < 0) |
||
733 | break; |
||
734 | } |
||
735 | if (err >= 0) |
||
736 | err = num; |
||
737 | /* Send a bare address packet to close out the transaction. |
||
738 | * Zero sized messages specify an address only (bare |
||
739 | * address) transaction. |
||
740 | */ |
||
741 | msg.request &= ~DP_AUX_I2C_MOT; |
||
742 | msg.buffer = NULL; |
||
743 | msg.size = 0; |
||
744 | (void)drm_dp_i2c_do_msg(aux, &msg); |
||
745 | |||
6660 | serge | 746 | mutex_unlock(&aux->hw_mutex); |
747 | |||
5060 | serge | 748 | return err; |
749 | } |
||
750 | |||
751 | static const struct i2c_algorithm drm_dp_i2c_algo = { |
||
752 | .functionality = drm_dp_i2c_functionality, |
||
753 | .master_xfer = drm_dp_i2c_xfer, |
||
754 | }; |
||
755 | |||
756 | /** |
||
757 | * drm_dp_aux_register() - initialise and register aux channel |
||
758 | * @aux: DisplayPort AUX channel |
||
759 | * |
||
760 | * Returns 0 on success or a negative error code on failure. |
||
761 | */ |
||
762 | int drm_dp_aux_register(struct drm_dp_aux *aux) |
||
763 | { |
||
764 | mutex_init(&aux->hw_mutex); |
||
765 | |||
766 | aux->ddc.algo = &drm_dp_i2c_algo; |
||
767 | aux->ddc.algo_data = aux; |
||
768 | aux->ddc.retries = 3; |
||
769 | |||
770 | aux->ddc.class = I2C_CLASS_DDC; |
||
771 | aux->ddc.owner = THIS_MODULE; |
||
772 | aux->ddc.dev.parent = aux->dev; |
||
773 | // aux->ddc.dev.of_node = aux->dev->of_node; |
||
774 | |||
6084 | serge | 775 | strlcpy(aux->ddc.name, aux->name ? aux->name : "aux", |
5060 | serge | 776 | sizeof(aux->ddc.name)); |
777 | |||
778 | return i2c_add_adapter(&aux->ddc); |
||
779 | } |
||
780 | EXPORT_SYMBOL(drm_dp_aux_register); |
||
781 | |||
782 | /** |
||
783 | * drm_dp_aux_unregister() - unregister an AUX adapter |
||
784 | * @aux: DisplayPort AUX channel |
||
785 | */ |
||
786 | void drm_dp_aux_unregister(struct drm_dp_aux *aux) |
||
787 | { |
||
788 | i2c_del_adapter(&aux->ddc); |
||
789 | } |
||
790 | EXPORT_SYMBOL(drm_dp_aux_unregister);>>>>>>>=>>>>>>>>>>>>>>>><>><>>> |