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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 4251 | Serge | 1 | /* |
| 2 | * Copyright (c) 2013 Intel Corporation |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice (including the next |
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| 12 | * paragraph) shall be included in all copies or substantial portions of the |
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| 13 | * Software. |
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| 14 | * |
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| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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| 21 | * SOFTWARE. |
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| 22 | * |
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| 23 | * Authors: |
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| 24 | * Chris Wilson |
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| 25 | * |
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| 26 | */ |
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| 27 | |||
| 28 | #ifdef HAVE_CONFIG_H |
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| 29 | #include "config.h" |
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| 30 | #endif |
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| 31 | |||
| 32 | #include "sna.h" |
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| 33 | #include "sna_cpuid.h" |
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| 34 | |||
| 35 | #define xgetbv(index,eax,edx) \ |
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| 36 | __asm__ ("xgetbv" : "=a"(eax), "=d"(edx) : "c" (index)) |
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| 37 | |||
| 38 | #define has_YMM 0x1 |
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| 39 | |||
| 40 | unsigned sna_cpu_detect(void) |
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| 41 | { |
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| 42 | unsigned max = __get_cpuid_max(BASIC_CPUID, NULL); |
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| 43 | unsigned int eax, ebx, ecx, edx; |
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| 44 | unsigned features = 0; |
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| 45 | unsigned extra = 0; |
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| 46 | |||
| 47 | if (max >= 1) { |
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| 48 | __cpuid(1, eax, ebx, ecx, edx); |
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| 49 | if (ecx & bit_SSE3) |
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| 50 | features |= SSE3; |
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| 51 | |||
| 52 | if (ecx & bit_SSSE3) |
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| 53 | features |= SSSE3; |
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| 54 | |||
| 55 | if (ecx & bit_SSE4_1) |
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| 56 | features |= SSE4_1; |
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| 57 | |||
| 58 | if (ecx & bit_SSE4_2) |
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| 59 | features |= SSE4_2; |
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| 60 | |||
| 61 | if (ecx & bit_OSXSAVE) { |
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| 62 | unsigned int bv_eax, bv_ecx; |
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| 63 | xgetbv(0, bv_eax, bv_ecx); |
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| 64 | if ((bv_eax & 6) == 6) |
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| 65 | extra |= has_YMM; |
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| 66 | } |
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| 67 | |||
| 68 | if ((extra & has_YMM) && (ecx & bit_AVX)) |
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| 69 | features |= AVX; |
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| 70 | |||
| 71 | if (edx & bit_MMX) |
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| 72 | features |= MMX; |
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| 73 | |||
| 74 | if (edx & bit_SSE) |
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| 75 | features |= SSE; |
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| 76 | |||
| 77 | if (edx & bit_SSE2) |
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| 78 | features |= SSE2; |
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| 79 | } |
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| 80 | |||
| 81 | if (max >= 7) { |
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| 82 | __cpuid_count(7, 0, eax, ebx, ecx, edx); |
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| 83 | if ((extra & has_YMM) && (ebx & bit_AVX2)) |
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| 84 | features |= AVX2; |
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| 85 | } |
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| 86 | |||
| 87 | return features; |
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| 88 | } |
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| 89 | |||
| 90 | char *sna_cpu_features_to_string(unsigned features, char *line) |
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| 91 | { |
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| 92 | char *ret = line; |
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| 93 | |||
| 94 | #ifdef __x86_64__ |
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| 95 | line += sprintf (line, "x86-64"); |
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| 96 | #else |
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| 97 | line += sprintf (line, "x86"); |
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| 98 | #endif |
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| 99 | |||
| 100 | if (features & SSE2) |
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| 101 | line += sprintf (line, ", sse2"); |
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| 102 | if (features & SSE3) |
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| 103 | line += sprintf (line, ", sse3"); |
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| 104 | if (features & SSSE3) |
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| 105 | line += sprintf (line, ", ssse3"); |
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| 106 | if (features & SSE4_1) |
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| 107 | line += sprintf (line, ", sse4.1"); |
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| 108 | if (features & SSE4_2) |
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| 109 | line += sprintf (line, ", sse4.2"); |
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| 110 | if (features & AVX) |
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| 111 | line += sprintf (line, ", avx"); |
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| 112 | if (features & AVX2) |
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| 113 | line += sprintf (line, ", avx2"); |
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| 114 | |||
| 115 | return ret; |
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| 116 | } |