Rev 1029 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
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1029 | serge | 1 | |
2 | |||
3 | { |
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1600 | serge | 4 | int offset; |
1029 | serge | 5 | u32_t addr1; |
6 | u32_t addr2; |
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7 | u32_t mask1; |
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8 | u32_t mask2; |
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9 | int bits = 0; |
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10 | |||
11 | /* |
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12 | |||
13 | * the 6 base address registers, and 6 is the ROM base address register. |
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14 | */ |
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15 | if (index < 0 || index > 6) |
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16 | return 0; |
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17 | |||
18 | if (min) |
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19 | |||
20 | |||
21 | /* Get the PCI offset */ |
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22 | |||
23 | offset = PCI_MAP_ROM_REG; |
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24 | else |
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25 | offset = PCI_MAP_REG_START + (index << 2); |
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26 | |||
27 | addr1 = PciRead32(bus, devfn, offset); |
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28 | |||
29 | * Check if this is the second part of a 64 bit address. |
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30 | * XXX need to check how endianness affects 64 bit addresses. |
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31 | */ |
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32 | if (index > 0 && index < 6) { |
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33 | addr2 = PciRead32(bus, devfn, offset - 4); |
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34 | if (PCI_MAP_IS_MEM(addr2) && PCI_MAP_IS64BITMEM(addr2)) |
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35 | return 0; |
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36 | } |
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37 | |||
38 | if (destructive) { |
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39 | |||
40 | mask1 = PciRead32(bus, devfn, offset); |
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41 | PciWrite32(bus, devfn, offset, addr1); |
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42 | } else { |
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43 | mask1 = addr1; |
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44 | } |
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45 | |||
46 | /* Check if this is the first part of a 64 bit address. */ |
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47 | |||
48 | { |
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49 | if (PCIGETMEMORY(mask1) == 0) |
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50 | { |
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51 | addr2 = PciRead32(bus, devfn, offset + 4); |
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52 | if (destructive) |
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53 | { |
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54 | PciWrite32(bus, devfn, offset + 4, 0xffffffff); |
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55 | mask2 = PciRead32(bus, devfn, offset + 4); |
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56 | PciWrite32(bus, devfn, offset + 4, addr2); |
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57 | } |
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58 | else |
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59 | { |
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60 | mask2 = addr2; |
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61 | } |
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62 | if (mask2 == 0) |
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63 | return 0; |
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64 | bits = 32; |
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65 | while ((mask2 & 1) == 0) |
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66 | { |
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67 | bits++; |
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68 | mask2 >>= 1; |
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69 | } |
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70 | if (bits > 32) |
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71 | return bits; |
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72 | } |
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73 | } |
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74 | if (index < 6) |
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75 | if (PCI_MAP_IS_MEM(mask1)) |
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76 | mask1 = PCIGETMEMORY(mask1); |
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77 | else |
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78 | mask1 = PCIGETIO(mask1); |
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79 | else |
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80 | mask1 = PCIGETROM(mask1); |
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81 | if (mask1 == 0) |
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82 | return 0; |
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83 | bits = 0; |
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84 | while ((mask1 & 1) == 0) { |
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85 | bits++; |
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86 | mask1 >>= 1; |
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87 | } |
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88 | /* I/O maps can be no larger than 8 bits */ |
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89 | |||
90 | if ((index < 6) && PCI_MAP_IS_IO(addr1) && bits > 8) |
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91 | |||
92 | /* ROM maps can be no larger than 24 bits */ |
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93 | if (index == 6 && bits > 24) |
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94 | bits = 24; |
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95 | return bits; |
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96 | }>>>>><>> |
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97 |