Subversion Repositories Kolibri OS

Rev

Rev 5066 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
4522 hidnplayr 1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2
;;                                                                 ;;
3
;; Copyright (C) KolibriOS team 2004-2014. All rights reserved.    ;;
4
;; Distributed under terms of the GNU General Public License       ;;
5
;;                                                                 ;;
6
;;          GNU GENERAL PUBLIC LICENSE                             ;;
7
;;             Version 2, June 1991                                ;;
8
;;                                                                 ;;
9
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
10
 
11
struct  PCI_header
12
 
5066 hidnplayr 13
        vendor_id       dw ?    ; 0x00
14
        device_id       dw ?    ; 0x02
15
        command         dw ?    ; 0x04
16
        status          dw ?    ; 0x06
17
        revision_id     db ?    ; 0x08
18
        prog_if         db ?    ; 0x09
19
        subclass        db ?    ; 0x0A
20
        class_code      db ?    ; 0x0B
21
        cache_line_size db ?    ; 0x0C
22
        latency_timer   db ?    ; 0x0D
23
        header_type     db ?    ; 0x0E
24
        bist            db ?    ; 0x0F
4522 hidnplayr 25
 
26
ends
27
 
28
struct  PCI_header00    PCI_header
29
 
5066 hidnplayr 30
        base_addr_0     dd ?    ; 0x10
31
        base_addr_1     dd ?    ; 0x14
32
        base_addr_2     dd ?    ; 0x18
33
        base_addr_3     dd ?    ; 0x1C
34
        base_addr_4     dd ?    ; 0x20
35
        base_addr_5     dd ?    ; 0x24
36
        cardbus_cis_ptr dd ?    ; 0x28
37
        subsys_vendor   dw ?    ; 0x2C
38
        subsys_id       dw ?    ; 0x2E
39
        exp_rom_addr    dd ?    ; 0x30
40
        cap_ptr         db ?    ; 0x34
41
                        rb 7    ; reserved
42
        interrupt_line  db ?    ; 0x3C
43
        interrupt_pin   db ?    ; 0x3D
44
        min_grant       db ?    ; 0x3E
45
        max_latency     db ?    ; 0x3F
4522 hidnplayr 46
 
47
ends
48
 
5066 hidnplayr 49
struct  PCI_header01    PCI_header
50
 
51
        base_addr_0     dd ?    ; 0x10
52
        base_addr_1     dd ?    ; 0x14
53
        prim_bus_nr     db ?    ; 0x18
54
        sec_bus_nr      db ?    ; 0x19
55
        sub_bus_nr      db ?    ; 0x1A
56
        sec_lat_tmr     db ?    ; 0x1B
57
        io_base         db ?    ; 0x1C
58
        io_limit        db ?    ; 0x1D
59
        sec_status      dw ?    ; 0x1E
60
        mem_base        dw ?    ; 0x20
61
        mem_limit       dw ?    ; 0x22
62
        pref_mem_base   dw ?    ; 0x24
63
        pref_mem_limit  dw ?    ; 0x26
64
        pref_base_up    dd ?    ; 0x28
65
        pref_limit_up   dd ?    ; 0x2C
66
        io_base_up      dw ?    ; 0x30
67
        io_limit_up     dw ?    ; 0x32
68
        cap_ptr         db ?    ; 0x34
69
                        rb 3    ; reserved
70
        exp_rom_addr    dd ?    ; 0x38
71
        interrupt_line  db ?    ; 0x3C
72
        interrupt_pin   db ?    ; 0x3E
73
        bridge_ctrl     dw ?    ; 0x3F
74
 
75
ends
76
 
77
struct  PCI_header02    PCI_header
78
 
79
        base_addr       dd ?    ; 0x10
80
        cap_list_offs   db ?    ; 0x14
81
                        rb 1    ; reserved
82
        sec_stat        dw ?    ; 0x16
83
        pci_bus_nr      db ?    ; 0x18
84
        cardbus_bus_nr  db ?    ; 0x19
85
        sub_bus_nr      db ?    ; 0x1A
86
        cardbus_lat_tmr db ?    ; 0x1B
87
        mbar_0          dd ?    ; 0x1C
88
        mlimit_0        dd ?    ; 0x20
89
        mbar_1          dd ?    ; 0x24
90
        mlimit_1        dd ?    ; 0x28
91
        iobar_0         dd ?    ; 0x2C
92
        iolimit_0       dd ?    ; 0x30
93
        iobar_1         dd ?    ; 0x34
94
        iolimit_1       dd ?    ; 0x38
95
        interrupt_line  db ?    ; 0x3C
96
        interrupt_pin   db ?    ; 0x3D
97
        bridge_ctrl     dw ?    ; 0x3E
98
        subs_did        dw ?    ; 0x40
99
        subs_vid        dw ?    ; 0x42
100
        legacy_bar      dd ?    ; 0x44
101
 
102
ends
103
 
4522 hidnplayr 104
; Base address bits
105
        PCI_BASE_ADDRESS_SPACE_IO       = 0x01
106
        PCI_BASE_ADDRESS_IO_MASK        = 0xFFFFFFFC
107
        PCI_BASE_ADDRESS_MEM_MASK       = 0xFFFFFFF0
108
 
109
; command bits
5073 hidnplayr 110
        PCI_CMD_PIO                     = 0x01          ; bit0: io space control
111
        PCI_CMD_MMIO                    = 0x02          ; bit1: memory space control
112
        PCI_CMD_MASTER                  = 0x04          ; bit2: device acts as a PCI master
4522 hidnplayr 113
 
5073 hidnplayr 114
; status bits
115
        PCI_STATUS_CAPA                 = 0x10          ; bit4: new capabilities available
4522 hidnplayr 116
 
5073 hidnplayr 117
 
4522 hidnplayr 118
if used PCI_find_io
119
proc PCI_find_io stdcall bus, dev
120
 
121
        push    esi
122
        xor     eax, eax
4532 hidnplayr 123
        mov     esi, PCI_header00.base_addr_0
4522 hidnplayr 124
  .check:
125
        invoke  PciRead32, [bus], [dev], esi
126
        test    eax, PCI_BASE_ADDRESS_IO_MASK
127
        jz      .inc
128
        test    eax, PCI_BASE_ADDRESS_SPACE_IO
129
        jz      .inc
130
        and     eax, PCI_BASE_ADDRESS_IO_MASK
131
        pop     esi
132
        ret
133
 
134
  .inc:
135
        add     esi, 4
4532 hidnplayr 136
        cmp     esi, PCI_header00.base_addr_5
4522 hidnplayr 137
        jbe     .check
138
        pop     esi
139
        xor     eax, eax
140
        ret
141
 
142
endp
143
end if
144
 
145
 
146
if used PCI_find_mmio32
147
proc PCI_find_mmio32 stdcall bus, dev
148
 
149
        push    esi
150
        mov     esi, PCI_header00.base_addr_0
151
  .check:
152
        invoke  PciRead32, [bus], [dev], esi
153
        test    eax, PCI_BASE_ADDRESS_SPACE_IO  ; mmio address?
154
        jnz     .inc
155
        test    eax, 100b       ; 64 bit?
156
        jnz     .inc
157
        and     eax, not 1111b
158
        pop     esi
159
        ret
160
 
161
  .inc:
162
        add     esi, 4
163
        cmp     esi, PCI_header00.base_addr_5
164
        jbe     .check
165
        xor     eax, eax
166
        pop     esi
167
        ret
168
 
169
endp
170
end if