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5270 serge 1
/*
2
 * Copyright (c) 2007 Dave Airlie 
3
 * Copyright (c) 2007 Jakob Bornecrantz 
4
 * Copyright (c) 2008 Red Hat Inc.
5
 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
6
 * Copyright (c) 2007-2008 Intel Corporation
7
 *
8
 * Permission is hereby granted, free of charge, to any person obtaining a
9
 * copy of this software and associated documentation files (the "Software"),
10
 * to deal in the Software without restriction, including without limitation
11
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12
 * and/or sell copies of the Software, and to permit persons to whom the
13
 * Software is furnished to do so, subject to the following conditions:
14
 *
15
 * The above copyright notice and this permission notice shall be included in
16
 * all copies or substantial portions of the Software.
17
 *
18
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
23
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24
 * IN THE SOFTWARE.
25
 */
26
 
27
#ifndef _DRM_MODE_H
28
#define _DRM_MODE_H
29
 
6936 serge 30
#include "drm.h"
5270 serge 31
 
32
#define DRM_DISPLAY_INFO_LEN	32
33
#define DRM_CONNECTOR_NAME_LEN	32
34
#define DRM_DISPLAY_MODE_LEN	32
35
#define DRM_PROP_NAME_LEN	32
36
 
37
#define DRM_MODE_TYPE_BUILTIN	(1<<0)
38
#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN)
39
#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN)
40
#define DRM_MODE_TYPE_PREFERRED	(1<<3)
41
#define DRM_MODE_TYPE_DEFAULT	(1<<4)
42
#define DRM_MODE_TYPE_USERDEF	(1<<5)
43
#define DRM_MODE_TYPE_DRIVER	(1<<6)
44
 
45
/* Video mode flags */
46
/* bit compatible with the xorg definitions. */
47
#define DRM_MODE_FLAG_PHSYNC			(1<<0)
48
#define DRM_MODE_FLAG_NHSYNC			(1<<1)
49
#define DRM_MODE_FLAG_PVSYNC			(1<<2)
50
#define DRM_MODE_FLAG_NVSYNC			(1<<3)
51
#define DRM_MODE_FLAG_INTERLACE			(1<<4)
52
#define DRM_MODE_FLAG_DBLSCAN			(1<<5)
53
#define DRM_MODE_FLAG_CSYNC			(1<<6)
54
#define DRM_MODE_FLAG_PCSYNC			(1<<7)
55
#define DRM_MODE_FLAG_NCSYNC			(1<<8)
56
#define DRM_MODE_FLAG_HSKEW			(1<<9) /* hskew provided */
57
#define DRM_MODE_FLAG_BCAST			(1<<10)
58
#define DRM_MODE_FLAG_PIXMUX			(1<<11)
59
#define DRM_MODE_FLAG_DBLCLK			(1<<12)
60
#define DRM_MODE_FLAG_CLKDIV2			(1<<13)
61
 /*
62
  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
63
  * (define not exposed to user space).
64
  */
65
#define DRM_MODE_FLAG_3D_MASK			(0x1f<<14)
66
#define  DRM_MODE_FLAG_3D_NONE			(0<<14)
67
#define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
68
#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2<<14)
69
#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3<<14)
70
#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4<<14)
71
#define  DRM_MODE_FLAG_3D_L_DEPTH		(5<<14)
72
#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6<<14)
73
#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
74
#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
75
 
76
 
77
/* DPMS flags */
78
/* bit compatible with the xorg definitions. */
79
#define DRM_MODE_DPMS_ON	0
80
#define DRM_MODE_DPMS_STANDBY	1
81
#define DRM_MODE_DPMS_SUSPEND	2
82
#define DRM_MODE_DPMS_OFF	3
83
 
84
/* Scaling mode options */
85
#define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
86
					     software can still scale) */
87
#define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
88
#define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
89
#define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
90
 
91
/* Picture aspect ratio options */
92
#define DRM_MODE_PICTURE_ASPECT_NONE	0
93
#define DRM_MODE_PICTURE_ASPECT_4_3	1
94
#define DRM_MODE_PICTURE_ASPECT_16_9	2
95
 
96
/* Dithering mode options */
97
#define DRM_MODE_DITHERING_OFF	0
98
#define DRM_MODE_DITHERING_ON	1
99
#define DRM_MODE_DITHERING_AUTO 2
100
 
101
/* Dirty info options */
102
#define DRM_MODE_DIRTY_OFF      0
103
#define DRM_MODE_DIRTY_ON       1
104
#define DRM_MODE_DIRTY_ANNOTATE 2
105
 
106
struct drm_mode_modeinfo {
107
	__u32 clock;
6082 serge 108
	__u16 hdisplay;
109
	__u16 hsync_start;
110
	__u16 hsync_end;
111
	__u16 htotal;
112
	__u16 hskew;
113
	__u16 vdisplay;
114
	__u16 vsync_start;
115
	__u16 vsync_end;
116
	__u16 vtotal;
117
	__u16 vscan;
5270 serge 118
 
119
	__u32 vrefresh;
120
 
121
	__u32 flags;
122
	__u32 type;
123
	char name[DRM_DISPLAY_MODE_LEN];
124
};
125
 
126
struct drm_mode_card_res {
127
	__u64 fb_id_ptr;
128
	__u64 crtc_id_ptr;
129
	__u64 connector_id_ptr;
130
	__u64 encoder_id_ptr;
131
	__u32 count_fbs;
132
	__u32 count_crtcs;
133
	__u32 count_connectors;
134
	__u32 count_encoders;
6082 serge 135
	__u32 min_width;
136
	__u32 max_width;
137
	__u32 min_height;
138
	__u32 max_height;
5270 serge 139
};
140
 
141
struct drm_mode_crtc {
142
	__u64 set_connectors_ptr;
143
	__u32 count_connectors;
144
 
145
	__u32 crtc_id; /**< Id */
146
	__u32 fb_id; /**< Id of framebuffer */
147
 
6082 serge 148
	__u32 x; /**< x Position on the framebuffer */
149
	__u32 y; /**< y Position on the framebuffer */
5270 serge 150
 
151
	__u32 gamma_size;
152
	__u32 mode_valid;
153
	struct drm_mode_modeinfo mode;
154
};
155
 
156
#define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
157
#define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)
158
 
159
/* Planes blend with or override other bits on the CRTC */
160
struct drm_mode_set_plane {
161
	__u32 plane_id;
162
	__u32 crtc_id;
163
	__u32 fb_id; /* fb object contains surface format type */
164
	__u32 flags; /* see above flags */
165
 
166
	/* Signed dest location allows it to be partially off screen */
6082 serge 167
	__s32 crtc_x;
168
	__s32 crtc_y;
169
	__u32 crtc_w;
170
	__u32 crtc_h;
5270 serge 171
 
172
	/* Source values are 16.16 fixed point */
6082 serge 173
	__u32 src_x;
174
	__u32 src_y;
175
	__u32 src_h;
176
	__u32 src_w;
5270 serge 177
};
178
 
179
struct drm_mode_get_plane {
180
	__u32 plane_id;
181
 
182
	__u32 crtc_id;
183
	__u32 fb_id;
184
 
185
	__u32 possible_crtcs;
186
	__u32 gamma_size;
187
 
188
	__u32 count_format_types;
189
	__u64 format_type_ptr;
190
};
191
 
192
struct drm_mode_get_plane_res {
193
	__u64 plane_id_ptr;
194
	__u32 count_planes;
195
};
196
 
197
#define DRM_MODE_ENCODER_NONE	0
198
#define DRM_MODE_ENCODER_DAC	1
199
#define DRM_MODE_ENCODER_TMDS	2
200
#define DRM_MODE_ENCODER_LVDS	3
201
#define DRM_MODE_ENCODER_TVDAC	4
202
#define DRM_MODE_ENCODER_VIRTUAL 5
203
#define DRM_MODE_ENCODER_DSI	6
204
#define DRM_MODE_ENCODER_DPMST	7
205
 
206
struct drm_mode_get_encoder {
207
	__u32 encoder_id;
208
	__u32 encoder_type;
209
 
210
	__u32 crtc_id; /**< Id of crtc */
211
 
212
	__u32 possible_crtcs;
213
	__u32 possible_clones;
214
};
215
 
216
/* This is for connectors with multiple signal types. */
217
/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
218
#define DRM_MODE_SUBCONNECTOR_Automatic	0
219
#define DRM_MODE_SUBCONNECTOR_Unknown	0
220
#define DRM_MODE_SUBCONNECTOR_DVID	3
221
#define DRM_MODE_SUBCONNECTOR_DVIA	4
222
#define DRM_MODE_SUBCONNECTOR_Composite	5
223
#define DRM_MODE_SUBCONNECTOR_SVIDEO	6
224
#define DRM_MODE_SUBCONNECTOR_Component	8
225
#define DRM_MODE_SUBCONNECTOR_SCART	9
226
 
227
#define DRM_MODE_CONNECTOR_Unknown	0
228
#define DRM_MODE_CONNECTOR_VGA		1
229
#define DRM_MODE_CONNECTOR_DVII		2
230
#define DRM_MODE_CONNECTOR_DVID		3
231
#define DRM_MODE_CONNECTOR_DVIA		4
232
#define DRM_MODE_CONNECTOR_Composite	5
233
#define DRM_MODE_CONNECTOR_SVIDEO	6
234
#define DRM_MODE_CONNECTOR_LVDS		7
235
#define DRM_MODE_CONNECTOR_Component	8
236
#define DRM_MODE_CONNECTOR_9PinDIN	9
237
#define DRM_MODE_CONNECTOR_DisplayPort	10
238
#define DRM_MODE_CONNECTOR_HDMIA	11
239
#define DRM_MODE_CONNECTOR_HDMIB	12
240
#define DRM_MODE_CONNECTOR_TV		13
241
#define DRM_MODE_CONNECTOR_eDP		14
242
#define DRM_MODE_CONNECTOR_VIRTUAL      15
243
#define DRM_MODE_CONNECTOR_DSI		16
244
 
245
struct drm_mode_get_connector {
246
 
247
	__u64 encoders_ptr;
248
	__u64 modes_ptr;
249
	__u64 props_ptr;
250
	__u64 prop_values_ptr;
251
 
252
	__u32 count_modes;
253
	__u32 count_props;
254
	__u32 count_encoders;
255
 
256
	__u32 encoder_id; /**< Current Encoder */
257
	__u32 connector_id; /**< Id */
258
	__u32 connector_type;
259
	__u32 connector_type_id;
260
 
261
	__u32 connection;
6082 serge 262
	__u32 mm_width;  /**< width in millimeters */
263
	__u32 mm_height; /**< height in millimeters */
5270 serge 264
	__u32 subpixel;
265
 
266
	__u32 pad;
267
};
268
 
269
#define DRM_MODE_PROP_PENDING	(1<<0)
270
#define DRM_MODE_PROP_RANGE	(1<<1)
271
#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
272
#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
273
#define DRM_MODE_PROP_BLOB	(1<<4)
274
#define DRM_MODE_PROP_BITMASK	(1<<5) /* bitmask of enumerated types */
275
 
276
/* non-extended types: legacy bitmask, one bit per type: */
277
#define DRM_MODE_PROP_LEGACY_TYPE  ( \
278
		DRM_MODE_PROP_RANGE | \
279
		DRM_MODE_PROP_ENUM | \
280
		DRM_MODE_PROP_BLOB | \
281
		DRM_MODE_PROP_BITMASK)
282
 
283
/* extended-types: rather than continue to consume a bit per type,
284
 * grab a chunk of the bits to use as integer type id.
285
 */
286
#define DRM_MODE_PROP_EXTENDED_TYPE	0x0000ffc0
287
#define DRM_MODE_PROP_TYPE(n)		((n) << 6)
288
#define DRM_MODE_PROP_OBJECT		DRM_MODE_PROP_TYPE(1)
289
#define DRM_MODE_PROP_SIGNED_RANGE	DRM_MODE_PROP_TYPE(2)
290
 
6082 serge 291
/* the PROP_ATOMIC flag is used to hide properties from userspace that
292
 * is not aware of atomic properties.  This is mostly to work around
293
 * older userspace (DDX drivers) that read/write each prop they find,
294
 * witout being aware that this could be triggering a lengthy modeset.
295
 */
296
#define DRM_MODE_PROP_ATOMIC        0x80000000
297
 
5270 serge 298
struct drm_mode_property_enum {
299
	__u64 value;
300
	char name[DRM_PROP_NAME_LEN];
301
};
302
 
303
struct drm_mode_get_property {
304
	__u64 values_ptr; /* values and blob lengths */
305
	__u64 enum_blob_ptr; /* enum and blob id ptrs */
306
 
307
	__u32 prop_id;
308
	__u32 flags;
309
	char name[DRM_PROP_NAME_LEN];
310
 
311
	__u32 count_values;
312
	/* This is only used to count enum values, not blobs. The _blobs is
313
	 * simply because of a historical reason, i.e. backwards compat. */
314
	__u32 count_enum_blobs;
315
};
316
 
317
struct drm_mode_connector_set_property {
318
	__u64 value;
319
	__u32 prop_id;
320
	__u32 connector_id;
321
};
322
 
323
struct drm_mode_obj_get_properties {
324
	__u64 props_ptr;
325
	__u64 prop_values_ptr;
326
	__u32 count_props;
327
	__u32 obj_id;
328
	__u32 obj_type;
329
};
330
 
331
struct drm_mode_obj_set_property {
332
	__u64 value;
333
	__u32 prop_id;
334
	__u32 obj_id;
335
	__u32 obj_type;
336
};
337
 
338
struct drm_mode_get_blob {
339
	__u32 blob_id;
340
	__u32 length;
341
	__u64 data;
342
};
343
 
344
struct drm_mode_fb_cmd {
345
	__u32 fb_id;
6082 serge 346
	__u32 width;
347
	__u32 height;
5270 serge 348
	__u32 pitch;
349
	__u32 bpp;
350
	__u32 depth;
351
	/* driver specific handle */
352
	__u32 handle;
353
};
354
 
355
#define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
6082 serge 356
#define DRM_MODE_FB_MODIFIERS	(1<<1) /* enables ->modifer[] */
5270 serge 357
 
358
struct drm_mode_fb_cmd2 {
359
	__u32 fb_id;
6082 serge 360
	__u32 width;
361
	__u32 height;
5270 serge 362
	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
363
	__u32 flags; /* see above flags */
364
 
365
	/*
366
	 * In case of planar formats, this ioctl allows up to 4
6082 serge 367
	 * buffer objects with offsets and pitches per plane.
5270 serge 368
	 * The pitch and offset order is dictated by the fourcc,
369
	 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
370
	 *
371
	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
372
	 *   followed by an interleaved U/V plane containing
373
	 *   8 bit 2x2 subsampled colour difference samples.
374
	 *
6082 serge 375
	 * So it would consist of Y as offsets[0] and UV as
376
	 * offsets[1].  Note that offsets[0] will generally
377
	 * be 0 (but this is not required).
378
	 *
379
	 * To accommodate tiled, compressed, etc formats, a per-plane
380
	 * modifier can be specified.  The default value of zero
381
	 * indicates "native" format as specified by the fourcc.
382
	 * Vendor specific modifier token.  This allows, for example,
383
	 * different tiling/swizzling pattern on different planes.
384
	 * See discussion above of DRM_FORMAT_MOD_xxx.
5270 serge 385
	 */
386
	__u32 handles[4];
387
	__u32 pitches[4]; /* pitch for each plane */
388
	__u32 offsets[4]; /* offset of each plane */
6082 serge 389
	__u64 modifier[4]; /* ie, tiling, compressed (per plane) */
5270 serge 390
};
391
 
392
#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
393
#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
394
#define DRM_MODE_FB_DIRTY_FLAGS         0x03
395
 
396
#define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
397
 
398
/*
399
 * Mark a region of a framebuffer as dirty.
400
 *
401
 * Some hardware does not automatically update display contents
402
 * as a hardware or software draw to a framebuffer. This ioctl
403
 * allows userspace to tell the kernel and the hardware what
404
 * regions of the framebuffer have changed.
405
 *
406
 * The kernel or hardware is free to update more then just the
407
 * region specified by the clip rects. The kernel or hardware
408
 * may also delay and/or coalesce several calls to dirty into a
409
 * single update.
410
 *
411
 * Userspace may annotate the updates, the annotates are a
412
 * promise made by the caller that the change is either a copy
413
 * of pixels or a fill of a single color in the region specified.
414
 *
415
 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
416
 * the number of updated regions are half of num_clips given,
417
 * where the clip rects are paired in src and dst. The width and
418
 * height of each one of the pairs must match.
419
 *
420
 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
421
 * promises that the region specified of the clip rects is filled
422
 * completely with a single color as given in the color argument.
423
 */
424
 
425
struct drm_mode_fb_dirty_cmd {
426
	__u32 fb_id;
427
	__u32 flags;
428
	__u32 color;
429
	__u32 num_clips;
430
	__u64 clips_ptr;
431
};
432
 
433
struct drm_mode_mode_cmd {
434
	__u32 connector_id;
435
	struct drm_mode_modeinfo mode;
436
};
437
 
438
#define DRM_MODE_CURSOR_BO	0x01
439
#define DRM_MODE_CURSOR_MOVE	0x02
440
#define DRM_MODE_CURSOR_FLAGS	0x03
441
 
442
/*
443
 * depending on the value in flags different members are used.
444
 *
445
 * CURSOR_BO uses
446
 *    crtc_id
447
 *    width
448
 *    height
449
 *    handle - if 0 turns the cursor off
450
 *
451
 * CURSOR_MOVE uses
452
 *    crtc_id
453
 *    x
454
 *    y
455
 */
456
struct drm_mode_cursor {
457
	__u32 flags;
458
	__u32 crtc_id;
459
	__s32 x;
460
	__s32 y;
461
	__u32 width;
462
	__u32 height;
463
	/* driver specific handle */
464
	__u32 handle;
465
};
466
 
467
struct drm_mode_cursor2 {
468
	__u32 flags;
469
	__u32 crtc_id;
470
	__s32 x;
471
	__s32 y;
472
	__u32 width;
473
	__u32 height;
474
	/* driver specific handle */
475
	__u32 handle;
476
	__s32 hot_x;
477
	__s32 hot_y;
478
};
479
 
480
struct drm_mode_crtc_lut {
481
	__u32 crtc_id;
482
	__u32 gamma_size;
483
 
484
	/* pointers to arrays */
485
	__u64 red;
486
	__u64 green;
487
	__u64 blue;
488
};
489
 
490
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
491
#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
492
#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
493
 
494
/*
495
 * Request a page flip on the specified crtc.
496
 *
497
 * This ioctl will ask KMS to schedule a page flip for the specified
498
 * crtc.  Once any pending rendering targeting the specified fb (as of
499
 * ioctl time) has completed, the crtc will be reprogrammed to display
500
 * that fb after the next vertical refresh.  The ioctl returns
501
 * immediately, but subsequent rendering to the current fb will block
502
 * in the execbuffer ioctl until the page flip happens.  If a page
503
 * flip is already pending as the ioctl is called, EBUSY will be
504
 * returned.
505
 *
506
 * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
507
 * event (see drm.h: struct drm_event_vblank) when the page flip is
508
 * done.  The user_data field passed in with this ioctl will be
509
 * returned as the user_data field in the vblank event struct.
510
 *
511
 * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
512
 * 'as soon as possible', meaning that it not delay waiting for vblank.
513
 * This may cause tearing on the screen.
514
 *
515
 * The reserved field must be zero until we figure out something
516
 * clever to use it for.
517
 */
518
 
519
struct drm_mode_crtc_page_flip {
520
	__u32 crtc_id;
521
	__u32 fb_id;
522
	__u32 flags;
523
	__u32 reserved;
524
	__u64 user_data;
525
};
526
 
527
/* create a dumb scanout buffer */
528
struct drm_mode_create_dumb {
6936 serge 529
	__u32 height;
530
	__u32 width;
531
	__u32 bpp;
532
	__u32 flags;
5270 serge 533
	/* handle, pitch, size will be returned */
6936 serge 534
	__u32 handle;
535
	__u32 pitch;
536
	__u64 size;
5270 serge 537
};
538
 
539
/* set up for mmap of a dumb scanout buffer */
540
struct drm_mode_map_dumb {
541
	/** Handle for the object being mapped. */
542
	__u32 handle;
543
	__u32 pad;
544
	/**
545
	 * Fake offset to use for subsequent mmap call
546
	 *
547
	 * This is a fixed-size type for 32/64 compatibility.
548
	 */
549
	__u64 offset;
550
};
551
 
552
struct drm_mode_destroy_dumb {
6936 serge 553
	__u32 handle;
5270 serge 554
};
555
 
6082 serge 556
/* page-flip flags are valid, plus: */
557
#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
558
#define DRM_MODE_ATOMIC_NONBLOCK  0x0200
559
#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
560
 
561
#define DRM_MODE_ATOMIC_FLAGS (\
562
		DRM_MODE_PAGE_FLIP_EVENT |\
563
		DRM_MODE_PAGE_FLIP_ASYNC |\
564
		DRM_MODE_ATOMIC_TEST_ONLY |\
565
		DRM_MODE_ATOMIC_NONBLOCK |\
566
		DRM_MODE_ATOMIC_ALLOW_MODESET)
567
 
568
struct drm_mode_atomic {
569
	__u32 flags;
570
	__u32 count_objs;
571
	__u64 objs_ptr;
572
	__u64 count_props_ptr;
573
	__u64 props_ptr;
574
	__u64 prop_values_ptr;
575
	__u64 reserved;
576
	__u64 user_data;
577
};
578
 
579
/**
580
 * Create a new 'blob' data property, copying length bytes from data pointer,
581
 * and returning new blob ID.
582
 */
583
struct drm_mode_create_blob {
584
	/** Pointer to data to copy. */
585
	__u64 data;
586
	/** Length of data to copy. */
587
	__u32 length;
588
	/** Return: new property ID. */
589
	__u32 blob_id;
590
};
591
 
592
/**
593
 * Destroy a user-created blob property.
594
 */
595
struct drm_mode_destroy_blob {
596
	__u32 blob_id;
597
};
598
 
5270 serge 599
#endif